[llvm] [Hexagon] Fix KCFI check truncating type id (PR #211854)

[Santanu Das via llvm-commits]

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@@ -0,0 +1,190 @@
+;; KCFI checks next to instructions with their own packetization constraints.
+;;
+;; The check is three hand-built packets spliced in just ahead of an indirect
+;; call, so whatever the packetizer does with the surrounding code has to
+;; compose with them: slot-restricted cache operations, HVX vector ops that
+;; occupy slots 0/1, multiply-accumulates, loop compare-and-branch pairs, and
+;; register pressure high enough to push the call target out of the scratch
+;; registers the lowering prefers.
+;;
+;; Target-specific intrinsics are used deliberately -- they are the only way to
+;; place a *particular* instruction next to the check from IR, rather than
+;; whatever the scheduler happens to pick.
+;;
+;; Every case is checked at the object level, and then re-checked by round
+;; tripping through the assembler, because the two paths build these packets
+;; independently (see kcfi-obj-vs-asm.ll).
+
+; RUN: llc -mtriple=hexagon -mattr=+hvxv68,+hvx-length128b -filetype=obj < %s \
+; RUN:   | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
+
+; RUN: llc -mtriple=hexagon -mattr=+hvxv68,+hvx-length128b --disable-packetizer \
+; RUN:   -filetype=obj < %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
+
+; RUN: llc -mtriple=hexagon -mattr=+hvxv68,+hvx-length128b -filetype=obj < %s -o %t.o
+; RUN: llc -mtriple=hexagon -mattr=+hvxv68,+hvx-length128b -filetype=asm < %s -o %t.s
+; RUN: llvm-mc -triple=hexagon -mattr=+hvxv68,+hvx-length128b -filetype=obj %t.s -o %t.a.o
+; RUN: llvm-objcopy -O binary --only-section=.text %t.o %t.bin
+; RUN: llvm-objcopy -O binary --only-section=.text %t.a.o %t.a.bin
+; RUN: cmp %t.bin %t.a.bin
+
+declare void @llvm.hexagon.Y2.dccleana(ptr)
+declare i32 @llvm.hexagon.A2.abs(i32)
+declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32, i32, i32)
+declare <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32>, <32 x i32>)
+declare <32 x i32> @llvm.hexagon.V6.vmpyiwb.128B(<32 x i32>, i32)
+declare void @llvm.prefetch.p0(ptr, i32, i32, i32)
+
+;; Cache operations are restricted to a single slot, so the packetizer cannot
+;; fold them into the check's packets.
+define void @cache_ops(ptr noundef %fp, ptr %p) {
+; CHECK-LABEL: <cache_ops>:
+; CHECK:        dccleana(r{{[0-9]+}})
+; CHECK:        immext(#
+; CHECK-NEXT:   r{{[0-9]+}} = ##0xbc614e
+; CHECK-NEXT:   r{{[0-9]+}} = memw(r0+#-0x4) }
+; CHECK:        immext(#0xbadc0fc0)
+; CHECK-NEXT:   r{{[0-9]+}}:{{[0-9]+}} = memd(##0xbadc0fee)
+; CHECK:        callr r0
+; CHECK:        dccleana(r{{[0-9]+}})
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quic-santdas wrote:

Probably a { to denote new packet start?

https://github.com/llvm/llvm-project/pull/211854