[llvm] [LLVM][CodeGen][SVE] Add lowering for single type constrained operations. (PR #215232)

[Paul Walker via llvm-commits]

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@@ -0,0 +1,1084 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mattr=+sve < %s -o - | FileCheck %s
+; RUN: llc -mattr=+sme --force-streaming < %s -o - | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+;
+; constrained.ceil
+;
+
+define <vscale x 2 x half> @ceil_nxv2f16(<vscale x 2 x half> %a) {
+; CHECK-LABEL: ceil_nxv2f16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ptrue p0.d
+; CHECK-NEXT:    frintp z0.h, p0/m, z0.h
+; CHECK-NEXT:    ret
+  %r = call <vscale x 2 x half> @llvm.experimental.constrained.ceil(<vscale x 2 x half> %a, metadata !"fpexcept.strict")
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paulwalker-arm wrote:

Yes `STRICT` nodes are still used. My guess is the code generator is not going to introduce such a state change and assumes the IR will already be optimal.

https://github.com/llvm/llvm-project/pull/215232