[llvm] [AArch64] Adjust cost for min/max intrinsics using v2i8 and v2i16 (PR #212801)

[Jack Styles via llvm-commits]

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@@ -711,6 +711,14 @@ AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
                                         MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32,
                                         MVT::nxv2i64};
     auto LT = getTypeLegalizationCost(RetTy);
+    // Type promotion for v2i8 and v2i16 types have a heavy cost when
+    // vectorising. Account for this cost to avoid vectorising unprofitable
+    // examples when vectorising loops with low trip counts.
+    bool IsSigned =
+        ICA.getID() == Intrinsic::smin || ICA.getID() == Intrinsic::smax;
+    MVT VT = MVT::getVT(RetTy);
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Stylie777 wrote:

I've swapped it out now

https://github.com/llvm/llvm-project/pull/212801