[llvm] [AArch64][GlobalISel] Use integer types for atomic cmpxchg lowering. (PR #215461)

[David Green via llvm-commits]

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/215461

None

>From f0605741a33fe7968f09183daf1712deb97d3d17 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Tue, 11 Aug 2026 06:57:20 +0100
Subject: [PATCH] [AArch64][GlobalISel] Use integer types for atomic cmpxchg
 lowering.

---
 llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |  2 +-
 .../AArch64/GlobalISel/legalize-cmpxchg-128.mir        | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 2263712120de8..850bc93754913 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -2514,7 +2514,7 @@ bool AArch64LegalizerInfo::legalizeAtomicCmpxchg128(
       break;
     }
 
-    LLT s128 = LLT::scalar(128);
+    LLT s128 = LLT::integer(128);
     auto CASDst = MRI.createGenericVirtualRegister(s128);
     auto CASDesired = MRI.createGenericVirtualRegister(s128);
     auto CASNew = MRI.createGenericVirtualRegister(s128);
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
index 61b3f1230ebe0..09b5ed5bd8548 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
@@ -39,11 +39,11 @@ body:             |
     ; CHECK-LSE-NEXT: [[COPY2:%[0-9]+]]:_(i64) = COPY $x2
     ; CHECK-LSE-NEXT: [[COPY3:%[0-9]+]]:_(i64) = COPY $x3
     ; CHECK-LSE-NEXT: [[COPY4:%[0-9]+]]:_(i64) = COPY $x4
-    ; CHECK-LSE-NEXT: [[REG_SEQUENCE:%[0-9]+]]:xseqpairsclass(s128) = REG_SEQUENCE [[COPY1]](i64), %subreg.sube64, [[COPY2]](i64), %subreg.subo64
-    ; CHECK-LSE-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:xseqpairsclass(s128) = REG_SEQUENCE [[COPY3]](i64), %subreg.sube64, [[COPY4]](i64), %subreg.subo64
-    ; CHECK-LSE-NEXT: [[CASPAX:%[0-9]+]]:xseqpairsclass(s128) = CASPAX [[REG_SEQUENCE]](s128), [[REG_SEQUENCE1]](s128), [[COPY]](p0) :: (load store acquire acquire (i128))
-    ; CHECK-LSE-NEXT: [[EXTRACT:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](s128), 0
-    ; CHECK-LSE-NEXT: [[EXTRACT1:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](s128), 64
+    ; CHECK-LSE-NEXT: [[REG_SEQUENCE:%[0-9]+]]:xseqpairsclass(i128) = REG_SEQUENCE [[COPY1]](i64), %subreg.sube64, [[COPY2]](i64), %subreg.subo64
+    ; CHECK-LSE-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:xseqpairsclass(i128) = REG_SEQUENCE [[COPY3]](i64), %subreg.sube64, [[COPY4]](i64), %subreg.subo64
+    ; CHECK-LSE-NEXT: [[CASPAX:%[0-9]+]]:xseqpairsclass(i128) = CASPAX [[REG_SEQUENCE]](i128), [[REG_SEQUENCE1]](i128), [[COPY]](p0) :: (load store acquire acquire (i128))
+    ; CHECK-LSE-NEXT: [[EXTRACT:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](i128), 0
+    ; CHECK-LSE-NEXT: [[EXTRACT1:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](i128), 64
     ; CHECK-LSE-NEXT: [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES [[EXTRACT]](i64), [[EXTRACT1]](i64)
     ; CHECK-LSE-NEXT: [[COPY5:%[0-9]+]]:_(i128) = COPY [[MV]](i128)
     ; CHECK-LSE-NEXT: G_STORE [[COPY5]](i128), [[COPY]](p0) :: (store (i128))