[llvm] [AMDGPU][DAG] Allow extract_subvector for free register copy (PR #214152)

[via llvm-commits]

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@@ -235,6 +235,7 @@ class SITargetLowering final : public AMDGPUTargetLowering {
   SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
   SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;
   SDValue performExtractVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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Shoreshen wrote:

Hi @arsenm do you mean the `extract_vector_elt (extract_subvector X, I), J -> extract_vector_elt X, I + J` combine?

https://github.com/llvm/llvm-project/pull/214152