https://github.com/patrickswedish updated https://github.com/llvm/llvm-project/pull/215076
>From 04fed57c007159fdd806c893ffc8ad2de86a3bff Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <233187023+patrickswedish at users.noreply.github.com>
Date: Mon, 10 Aug 2026 11:42:28 +0000
Subject: [PATCH 1/6] [X86] Vectorize non-power-of-two integer division
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 22 +++++++++++++++----
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 13 +++++++++++
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c74d342fed1cb..51545e354c491 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50643,10 +50643,24 @@ static SDValue combineIntDivRem(SDNode *N, SelectionDAG &DAG,
bool IsSigned = Opc == ISD::SDIV || Opc == ISD::SREM;
// If the result is only read back as scalar extracts, scalarization computes
- // just the demanded lanes.
- if (all_of(N->users(), [](const SDNode *U) {
- return U->getOpcode() == ISD::EXTRACT_VECTOR_ELT;
- }))
+ // just the demanded lanes. Keep the vector operation when every lane is
+ // extracted, which occurs when non-power-of-two vectors are returned.
+ APInt ExtractedElts = APInt::getZero(VT.getVectorNumElements());
+ bool OnlyExtracts = true;
+ for (const SDNode *U : N->users()) {
+ if (U->getOpcode() != ISD::EXTRACT_VECTOR_ELT) {
+ OnlyExtracts = false;
+ break;
+ }
+ auto *Idx = dyn_cast<ConstantSDNode>(U->getOperand(1));
+ if (!Idx)
+ continue;
+ const APInt &IdxVal = Idx->getAPIntValue();
+ if (IdxVal.uge(VT.getVectorNumElements()))
+ continue;
+ ExtractedElts.setBit(IdxVal.getZExtValue());
+ }
+ if (OnlyExtracts && !ExtractedElts.isAllOnes())
return SDValue();
// Magic multiply lowers constant divisors cheaper than a divide.
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
index 7ca985872b875..e3ffa7895e813 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
@@ -443,6 +443,19 @@ define <8 x i32> @test_divv_8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
ret <8 x i32> %res
}
+
+define <7 x i32> @test_divv_7i32(<7 x i32> %a, <7 x i32> %b) nounwind {
+ %res = udiv <7 x i32> %a, %b
+ ret <7 x i32> %res
+}
+
+define i32 @test_divv_7i32_extract0(<7 x i32> %a, <7 x i32> %b) nounwind {
+ %res = udiv <7 x i32> %a, %b
+ %elt = extractelement <7 x i32> %res, i32 0
+ ret i32 %elt
+}
+
+
;
; urem by 7
;
>From 7cf00be6cead121da9d6008edfcc6a056419cb0f Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <patrickswedish at gmail.com>
Date: Mon, 10 Aug 2026 14:06:56 +0200
Subject: [PATCH 2/6] ci: finalize X86 review fixes
---
.github/workflows/finalize-x86-pr.yml | 64 +++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
create mode 100644 .github/workflows/finalize-x86-pr.yml
diff --git a/.github/workflows/finalize-x86-pr.yml b/.github/workflows/finalize-x86-pr.yml
new file mode 100644
index 0000000000000..4472c9c08f7c0
--- /dev/null
+++ b/.github/workflows/finalize-x86-pr.yml
@@ -0,0 +1,64 @@
+name: Finalize X86 PR
+
+on:
+ push:
+ branches:
+ - agent/x86-non-pow2-int-div
+
+permissions:
+ contents: write
+
+jobs:
+ finalize:
+ runs-on: ubuntu-24.04
+ timeout-minutes: 90
+ steps:
+ - name: Checkout contribution branch
+ uses: actions/checkout at v4
+ with:
+ ref: agent/x86-non-pow2-int-div
+ fetch-depth: 0
+
+ - name: Configure repository
+ run: |
+ git config user.name "Patrick Ribbsaeter"
+ git config user.email "233187023+patrickswedish at users.noreply.github.com"
+ git remote add upstream https://github.com/llvm/llvm-project.git || true
+ git fetch upstream main
+
+ - name: Configure LLVM
+ run: |
+ cmake -S llvm -B build -G Ninja \
+ -DCMAKE_BUILD_TYPE=Release \
+ -DLLVM_TARGETS_TO_BUILD=X86 \
+ -DLLVM_ENABLE_ASSERTIONS=ON
+
+ - name: Build llc and llvm-lit dependencies
+ run: cmake --build build --target llc -j2
+
+ - name: Regenerate canonical FileCheck assertions
+ run: |
+ python3 llvm/utils/update_llc_test_checks.py \
+ --llc-binary build/bin/llc \
+ llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+
+ - name: Run focused X86 regression suite
+ run: |
+ build/bin/llvm-lit -v \
+ llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll \
+ llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll \
+ llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll \
+ llvm/test/CodeGen/X86/vector-idiv-v2i32.ll \
+ llvm/test/CodeGen/X86/vector-idiv.ll \
+ llvm/test/CodeGen/X86/scalar_widen_div.ll
+ git diff --check
+
+ - name: Remove temporary workflow and squash contribution
+ run: |
+ rm -f .github/workflows/finalize-x86-pr.yml
+ BASE=$(git merge-base HEAD upstream/main)
+ git add -A
+ git reset --soft "$BASE"
+ git add -A
+ git commit -m "[X86] Vectorize non-power-of-two integer division"
+ git push --force origin HEAD:agent/x86-non-pow2-int-div
>From 07091443c662f2c48f73794fd5d4a735e5a45da8 Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <patrickswedish at gmail.com>
Date: Mon, 10 Aug 2026 15:10:03 +0200
Subject: [PATCH 3/6] chore: remove temporary validation workflow
---
.github/workflows/finalize-x86-pr.yml | 64 ---------------------------
1 file changed, 64 deletions(-)
delete mode 100644 .github/workflows/finalize-x86-pr.yml
diff --git a/.github/workflows/finalize-x86-pr.yml b/.github/workflows/finalize-x86-pr.yml
deleted file mode 100644
index 4472c9c08f7c0..0000000000000
--- a/.github/workflows/finalize-x86-pr.yml
+++ /dev/null
@@ -1,64 +0,0 @@
-name: Finalize X86 PR
-
-on:
- push:
- branches:
- - agent/x86-non-pow2-int-div
-
-permissions:
- contents: write
-
-jobs:
- finalize:
- runs-on: ubuntu-24.04
- timeout-minutes: 90
- steps:
- - name: Checkout contribution branch
- uses: actions/checkout at v4
- with:
- ref: agent/x86-non-pow2-int-div
- fetch-depth: 0
-
- - name: Configure repository
- run: |
- git config user.name "Patrick Ribbsaeter"
- git config user.email "233187023+patrickswedish at users.noreply.github.com"
- git remote add upstream https://github.com/llvm/llvm-project.git || true
- git fetch upstream main
-
- - name: Configure LLVM
- run: |
- cmake -S llvm -B build -G Ninja \
- -DCMAKE_BUILD_TYPE=Release \
- -DLLVM_TARGETS_TO_BUILD=X86 \
- -DLLVM_ENABLE_ASSERTIONS=ON
-
- - name: Build llc and llvm-lit dependencies
- run: cmake --build build --target llc -j2
-
- - name: Regenerate canonical FileCheck assertions
- run: |
- python3 llvm/utils/update_llc_test_checks.py \
- --llc-binary build/bin/llc \
- llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
-
- - name: Run focused X86 regression suite
- run: |
- build/bin/llvm-lit -v \
- llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll \
- llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll \
- llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll \
- llvm/test/CodeGen/X86/vector-idiv-v2i32.ll \
- llvm/test/CodeGen/X86/vector-idiv.ll \
- llvm/test/CodeGen/X86/scalar_widen_div.ll
- git diff --check
-
- - name: Remove temporary workflow and squash contribution
- run: |
- rm -f .github/workflows/finalize-x86-pr.yml
- BASE=$(git merge-base HEAD upstream/main)
- git add -A
- git reset --soft "$BASE"
- git add -A
- git commit -m "[X86] Vectorize non-power-of-two integer division"
- git push --force origin HEAD:agent/x86-non-pow2-int-div
>From 5aa851672246e25ea89b916f1482b74ba721b61f Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <patrickswedish at gmail.com>
Date: Mon, 10 Aug 2026 15:40:45 +0200
Subject: [PATCH 4/6] Add workflow to generate CHECK lines and push changes
This workflow generates CHECK lines for LLVM tests and commits changes.
---
.github/workflows/generate-checks.yml | 62 +++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 .github/workflows/generate-checks.yml
diff --git a/.github/workflows/generate-checks.yml b/.github/workflows/generate-checks.yml
new file mode 100644
index 0000000000000..faecb9048cfa9
--- /dev/null
+++ b/.github/workflows/generate-checks.yml
@@ -0,0 +1,62 @@
+name: Generate CHECK lines and push
+
+on:
+ workflow_dispatch:
+
+ permissions:
+ contents: write
+
+ jobs:
+ generate:
+ runs-on: ubuntu-latest
+ steps:
+ - uses: actions/checkout at v4
+ with:
+ ref: agent/x86-non-pow2-int-div
+ fetch-depth: 0
+
+ - name: Install build dependencies
+ run: |
+ sudo apt-get update
+ sudo apt-get install -y cmake ninja-build python3
+
+ - name: Configure LLVM (X86 only)
+ run: |
+ cmake -S llvm -B build -G Ninja \
+ -DCMAKE_BUILD_TYPE=Release \
+ -DLLVM_TARGETS_TO_BUILD=X86 \
+ -DLLVM_ENABLE_PROJECTS="" \
+ -DLLVM_BUILD_TOOLS=ON \
+ -DLLVM_INCLUDE_TESTS=OFF \
+ -DLLVM_INCLUDE_BENCHMARKS=OFF \
+ -DLLVM_INCLUDE_EXAMPLES=OFF
+
+ - name: Build llc and FileCheck
+ run: ninja -C build llc FileCheck count not
+
+ - name: Regenerate FileCheck assertions
+ run: |
+ python3 llvm/utils/update_llc_test_checks.py \
+ --llc-binary build/bin/llc \
+ llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+
+ - name: Show generated diff
+ run: git diff llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+
+ - name: Remove this workflow and commit
+ run: |
+ git config user.name "patrickswedish"
+ git config user.email "patrickswedish at users.noreply.github.com"
+ rm -f .github/workflows/generate-checks.yml
+ git add llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll .github/workflows/generate-checks.yml
+ if git diff --cached --quiet; then
+ echo "No changes to commit"
+ else
+ git commit -m "[X86] Regenerate test CHECK lines via update_llc_test_checks.py
+
+ Run update_llc_test_checks.py to generate proper FileCheck assertions
+ for the non-power-of-two vector udiv test functions in
+ vector-idiv-udiv-256.ll, covering AVX1, AVX2, and AVX512BW targets."
+ git push origin agent/x86-non-pow2-int-div
+ fi
+
>From 07cf30bd825554d4b3e71e9a563127a6485c0d49 Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <patrickswedish at gmail.com>
Date: Tue, 11 Aug 2026 03:06:38 +0200
Subject: [PATCH 5/6] [X86] Remove temporary CHECK-generation workflow
---
.github/workflows/generate-checks.yml | 62 ---------------------------
1 file changed, 62 deletions(-)
delete mode 100644 .github/workflows/generate-checks.yml
diff --git a/.github/workflows/generate-checks.yml b/.github/workflows/generate-checks.yml
deleted file mode 100644
index faecb9048cfa9..0000000000000
--- a/.github/workflows/generate-checks.yml
+++ /dev/null
@@ -1,62 +0,0 @@
-name: Generate CHECK lines and push
-
-on:
- workflow_dispatch:
-
- permissions:
- contents: write
-
- jobs:
- generate:
- runs-on: ubuntu-latest
- steps:
- - uses: actions/checkout at v4
- with:
- ref: agent/x86-non-pow2-int-div
- fetch-depth: 0
-
- - name: Install build dependencies
- run: |
- sudo apt-get update
- sudo apt-get install -y cmake ninja-build python3
-
- - name: Configure LLVM (X86 only)
- run: |
- cmake -S llvm -B build -G Ninja \
- -DCMAKE_BUILD_TYPE=Release \
- -DLLVM_TARGETS_TO_BUILD=X86 \
- -DLLVM_ENABLE_PROJECTS="" \
- -DLLVM_BUILD_TOOLS=ON \
- -DLLVM_INCLUDE_TESTS=OFF \
- -DLLVM_INCLUDE_BENCHMARKS=OFF \
- -DLLVM_INCLUDE_EXAMPLES=OFF
-
- - name: Build llc and FileCheck
- run: ninja -C build llc FileCheck count not
-
- - name: Regenerate FileCheck assertions
- run: |
- python3 llvm/utils/update_llc_test_checks.py \
- --llc-binary build/bin/llc \
- llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
-
- - name: Show generated diff
- run: git diff llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
-
- - name: Remove this workflow and commit
- run: |
- git config user.name "patrickswedish"
- git config user.email "patrickswedish at users.noreply.github.com"
- rm -f .github/workflows/generate-checks.yml
- git add llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll .github/workflows/generate-checks.yml
- if git diff --cached --quiet; then
- echo "No changes to commit"
- else
- git commit -m "[X86] Regenerate test CHECK lines via update_llc_test_checks.py
-
- Run update_llc_test_checks.py to generate proper FileCheck assertions
- for the non-power-of-two vector udiv test functions in
- vector-idiv-udiv-256.ll, covering AVX1, AVX2, and AVX512BW targets."
- git push origin agent/x86-non-pow2-int-div
- fi
-
>From 9b11be7cdbee699e2c8c4b87c2a146f4bb2f1e83 Mon Sep 17 00:00:00 2001
From: Patrick Ribbsaeter <patrickswedish at gmail.com>
Date: Tue, 11 Aug 2026 03:07:16 +0200
Subject: [PATCH 6/6] [X86] Add full-lane v2i8 extract regression
---
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
index e3ffa7895e813..d0d2ef5ade7b2 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
@@ -455,6 +455,18 @@ define i32 @test_divv_7i32_extract0(<7 x i32> %a, <7 x i32> %b) nounwind {
ret i32 %elt
}
+define void @div_extract(ptr %dst, ptr %lhs, ptr %rhs) nounwind {
+ %a = load <2 x i8>, ptr %lhs
+ %b = load <2 x i8>, ptr %rhs
+ %quot = udiv <2 x i8> %a, %b
+ %elt0 = extractelement <2 x i8> %quot, i64 0
+ store i8 %elt0, ptr %dst, align 1
+ %next = getelementptr inbounds nuw i8, ptr %dst, i64 1
+ %elt1 = extractelement <2 x i8> %quot, i64 1
+ store i8 %elt1, ptr %next, align 1
+ ret void
+}
+
;
; urem by 7