[llvm] Verify operand size for shift operation. (PR #215245)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,22 @@
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -O0 < %s | FileCheck %s
+
+; Test that isExtractHiElt in SelectVOP3PMadMixModsImpl does not fold a 64-bit
+; source into V_FMA_MIX_F32 which expects a 32-bit source operand.
+; At -O0 the DAG combiner does not decompose i64 to i32, so the pattern
+; trunc(srl(i64, 16)) survives to isel. isExtractHiElt must reject it because
+; V_FMA_MIX_F32 reads hi16 from a 32-bit register via op_sel.
+
+; CHECK-LABEL: _amdgpu_cs_main:
+; CHECK: s_load_b64
+; CHECK: v_fma_mix_f32
+; CHECK: global_store_b64
+; CHECK: ; return to shader part epilog
+define amdgpu_cs float @_amdgpu_cs_main(ptr addrspace(4) inreg %p, ptr addrspace(1) %out) {
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arsenm wrote:

Can you add this into an existing fma mix test with optnone 

https://github.com/llvm/llvm-project/pull/215245