[llvm] X86: Add baseline test for computeKnownBits poison+vector handling (PR #213325)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/213325

>From 5312a830d52769e8301be5deb5eec61bea1d2988 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 31 Jul 2026 19:40:19 +0200
Subject: [PATCH] X86: Add baseline test for computeKnownBits poison+vector
 handling

Currently computeKnownBits is too conservative with poison inputs.
---
 .../X86/build-vector-known-bits-poison.ll     | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll

diff --git a/llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll b/llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll
new file mode 100644
index 0000000000000..a410a0d0a9c67
--- /dev/null
+++ b/llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+
+; Test that computeKnownBits treats poison elements aggressively.
+
+define <4 x i8> @poison_build_vector_known_bits(<4 x i32> %v) {
+; CHECK-LABEL: poison_build_vector_known_bits:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    packssdw %xmm0, %xmm0
+; CHECK-NEXT:    packsswb %xmm0, %xmm0
+; CHECK-NEXT:    psllw $5, %xmm0
+; CHECK-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    paddb %xmm0, %xmm0
+; CHECK-NEXT:    paddb %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm1
+; CHECK-NEXT:    pcmpgtb %xmm0, %xmm1
+; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [11,11,11,11,u,u,u,u,u,u,u,u,u,u,u,u]
+; CHECK-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-NEXT:    paddb %xmm0, %xmm2
+; CHECK-NEXT:    pand %xmm1, %xmm2
+; CHECK-NEXT:    pandn %xmm0, %xmm1
+; CHECK-NEXT:    por %xmm2, %xmm1
+; CHECK-NEXT:    por %xmm0, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %icmp = icmp ugt <4 x i32> %v, splat (i32 -9)
+  %zext8 = zext <4 x i1> %icmp to <4 x i8>
+  %shl = shl <4 x i8> splat (i8 11), %zext8
+  %or = or <4 x i8> %shl, splat (i8 11)
+  ret <4 x i8> %or
+}