[llvm] 90cc2a4 - [AMDGPU] Fix an AMDGPU disassembler crash (#214914)

[via llvm-commits]

Author: Shilei Tian
Date: 2026-08-08T03:11:58Z
New Revision: 90cc2a4c147db94a3cf1b7bd31a7db858da017e5

URL: https://github.com/llvm/llvm-project/commit/90cc2a4c147db94a3cf1b7bd31a7db858da017e5
DIFF: https://github.com/llvm/llvm-project/commit/90cc2a4c147db94a3cf1b7bd31a7db858da017e5.diff

LOG: [AMDGPU] Fix an AMDGPU disassembler crash (#214914)

Fixes #214909.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
    llvm/test/MC/Disassembler/AMDGPU/decode-err.txt

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 1322aac689800..d4d71f2792819 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -489,6 +489,8 @@ DecodeStatus AMDGPUDisassembler::tryDecodeInst(const uint8_t *Table, MCInst &MI,
 
   DecodeStatus Res =
       decodeInstruction(Table, TmpInst, Inst, Address, this, STI);
+  if (Res != MCDisassembler::Fail && !decodeImmOperands(TmpInst, *MCII))
+    Res = MCDisassembler::Fail;
 
   CommentStream = nullptr;
 
@@ -541,7 +543,7 @@ static inline std::bitset<128> eat16Bytes(ArrayRef<uint8_t> &Bytes) {
   return (Hi << 64) | Lo;
 }
 
-void AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
+bool AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
                                            const MCInstrInfo &MCII) const {
   const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
   for (auto [OpNo, OpDesc] : enumerate(Desc.operands())) {
@@ -567,6 +569,8 @@ void AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
 
     if (Imm == AMDGPU::EncValues::LITERAL_CONST) {
       Op = decodeLiteralConstant(Desc, OpDesc);
+      if (!Op.isValid())
+        return false;
       continue;
     }
 
@@ -614,6 +618,7 @@ void AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
       Op.setImm(Imm);
     }
   }
+  return true;
 }
 
 DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
@@ -835,8 +840,6 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
 
   DecodeStatus Status = MCDisassembler::Success;
 
-  decodeImmOperands(MI, *MCII);
-
   if (SIInstrFlags::isDPP(*MCII, MI)) {
     if (isMacDPP(MI))
       convertMacDPPInst(MI);

diff  --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
index 5e1f307a7c4fd..d0859d144722f 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
@@ -54,7 +54,7 @@ class AMDGPUDisassembler : public MCDisassembler {
 
   const MCExpr *createConstantSymbolExpr(StringRef Id, int64_t Val);
 
-  void decodeImmOperands(MCInst &MI, const MCInstrInfo &MCII) const;
+  bool decodeImmOperands(MCInst &MI, const MCInstrInfo &MCII) const;
 
 public:
   AMDGPUDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,

diff  --git a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
index 31712667290f6..25ed1347cb54f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
@@ -2,6 +2,7 @@
 # RUN: llvm-mc -triple=amdgpu11.00 -disassemble -show-encoding < %s | FileCheck -check-prefixes=W32 %s
 # RUN: llvm-mc -triple=amdgpu11.00 -mattr=+wavefrontsize64 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=W64 %s
 # RUN: llvm-mc -triple=amdgpu12.00 -disassemble -filetype=null < %s 2>&1 | FileCheck -check-prefix=GFX12-ERR %s
+# RUN: llvm-mc -triple=amdgpu12.50 -disassemble -filetype=null < %s 2>&1 | FileCheck -check-prefix=GFX1250-ERR %s
 
 # GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
 0xdf,0x00,0x00,0x02
@@ -57,3 +58,7 @@
 # This is ds_read_b32 with gds bit which is not valid on gfx90a.
 # GFX90A: [[@LINE+1]]:1: warning: invalid instruction encoding
 0x00,0x00,0x6d,0xd8,0x01,0x00,0x00,0x00
+
+# This encoding references a missing trailing literal.
+# GFX1250-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
+0x00,0x00,0x33,0xcc,0xff,0x68,0x02,0x02