[llvm] [X86][PartialReduction] Lower zext-byte add reductions to vpsadbw (PR #201076)

[via llvm-commits]

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mbhade-amd wrote:

Currently tryByteSumReplacement relies on matchAddReduction which matches the expanded shuffle+add tree — it doesn't match @llvm.vector.reduce.add directly. That's why we need expand-reductions in the pipeline. Do you want me to add intrinsic matching so the pass works without expand-reductions and the output keeps the intrinsic form?

https://github.com/llvm/llvm-project/pull/201076