[llvm] [AMDGPU] Fix sign of zero in fpround(fmul) -> V_{MAD,FMA}_MIX{LO,HI} (PR #214544)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 6 16:48:17 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Dmitry Sidorov (MrSidims)
<details>
<summary>Changes</summary>
The isel patterns lowering `fptrunc (fmul float %a, %b)` to a mix instruction passed +0.0 as the FMA addend. Under round-to-nearest fma(a, b, +0.0) is +0.0 whenever a * b is -0.0, so the sign of zero was lost: on gfx90a, `(half)(-1.0f * 0.0f)` returned +0.0.
Use a -0.0 addend instead, which is the correct multiplicative identity for an FMA and is what the f32 sibling pattern in MadFmaMixFP32Pats has always done.
Verified on gfx90a: (half)(-1.0f * 0.0f) now returns 0x8000.
---
Patch is 57.74 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/214544.diff
5 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/VOP3PInstructions.td (+3-3)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.log.ll (+76-76)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.log10.ll (+76-76)
- (modified) llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll (+4-4)
- (modified) llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll (+11-11)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index b4021b411bc37..6af74a3a7e1c4 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -330,7 +330,7 @@ multiclass MadFmaMixFP16Pats<SDPatternOperator fma_like,
(f32 (VOP3PMadMixModsPat f32:$src1, i32:$src1_modifiers))))),
(mixlo_inst $src0_modifiers, $src0,
$src1_modifiers, $src1,
- (i32 SRCMODS.NONE), (i32 0),
+ (i32 SRCMODS.NEG), (i32 0),
DSTCLAMP.NONE,
(i32 (IMPLICIT_DEF)))
>;
@@ -340,7 +340,7 @@ multiclass MadFmaMixFP16Pats<SDPatternOperator fma_like,
(f32 (VOP3PMadMixModsPat f32:$src1, i32:$src1_modifiers)))))),
(vecVT (mixhi_inst $src0_modifiers, $src0,
$src1_modifiers, $src1,
- (i32 SRCMODS.NONE), (i32 0),
+ (i32 SRCMODS.NEG), (i32 0),
DSTCLAMP.NONE,
VGPR_32:$elt0))
>;
@@ -394,7 +394,7 @@ multiclass MadFmaMixFP16Pats_t16<SDPatternOperator fma_like,
(f32 (VOP3PMadMixModsPat f32:$src1, i32:$src1_modifiers))))),
(mix_inst_16 $src0_modifiers, $src0,
$src1_modifiers, $src1,
- (i32 SRCMODS.NONE), (i32 0),
+ (i32 SRCMODS.NEG), (i32 0),
DSTCLAMP.NONE)
>;
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.log.ll b/llvm/test/CodeGen/AMDGPU/llvm.log.ll
index a5894a0761d49..ee51803a1df50 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.log.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.log.ll
@@ -6675,7 +6675,7 @@ define half @v_log_f16(half %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_f16:
@@ -6686,7 +6686,7 @@ define half @v_log_f16(half %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_f16:
@@ -6697,7 +6697,7 @@ define half @v_log_f16(half %in) {
; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_f16:
@@ -6708,7 +6708,7 @@ define half @v_log_f16(half %in) {
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; R600-LABEL: v_log_f16:
@@ -6742,7 +6742,7 @@ define half @v_log_fabs_f16(half %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fabs_f16:
@@ -6753,7 +6753,7 @@ define half @v_log_fabs_f16(half %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fabs_f16:
@@ -6764,7 +6764,7 @@ define half @v_log_fabs_f16(half %in) {
; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fabs_f16:
@@ -6775,7 +6775,7 @@ define half @v_log_fabs_f16(half %in) {
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; R600-LABEL: v_log_fabs_f16:
@@ -6810,7 +6810,7 @@ define half @v_log_fneg_fabs_f16(half %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_fabs_f16:
@@ -6821,7 +6821,7 @@ define half @v_log_fneg_fabs_f16(half %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_fabs_f16:
@@ -6832,7 +6832,7 @@ define half @v_log_fneg_fabs_f16(half %in) {
; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_fabs_f16:
@@ -6843,7 +6843,7 @@ define half @v_log_fneg_fabs_f16(half %in) {
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; R600-LABEL: v_log_fneg_fabs_f16:
@@ -6879,7 +6879,7 @@ define half @v_log_fneg_f16(half %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_f16:
@@ -6890,7 +6890,7 @@ define half @v_log_fneg_f16(half %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_f16:
@@ -6901,7 +6901,7 @@ define half @v_log_fneg_f16(half %in) {
; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_f16:
@@ -6912,7 +6912,7 @@ define half @v_log_fneg_f16(half %in) {
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; R600-LABEL: v_log_fneg_f16:
@@ -7158,8 +7158,8 @@ define <2 x half> @v_log_v2f16(<2 x half> %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_v2f16:
@@ -7174,8 +7174,8 @@ define <2 x half> @v_log_v2f16(<2 x half> %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, 0
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, neg(0)
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_v2f16:
@@ -7188,8 +7188,8 @@ define <2 x half> @v_log_v2f16(<2 x half> %in) {
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, 0
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, neg(0)
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_v2f16:
@@ -7204,8 +7204,8 @@ define <2 x half> @v_log_v2f16(<2 x half> %in) {
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, 0
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, neg(0)
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -7330,8 +7330,8 @@ define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fabs_v2f16:
@@ -7346,8 +7346,8 @@ define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, 0
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, neg(0)
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fabs_v2f16:
@@ -7362,8 +7362,8 @@ define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, 0
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, neg(0)
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fabs_v2f16:
@@ -7379,8 +7379,8 @@ define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, 0
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, neg(0)
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
@@ -7508,8 +7508,8 @@ define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_fabs_v2f16:
@@ -7524,8 +7524,8 @@ define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, 0
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, neg(0)
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_fabs_v2f16:
@@ -7540,8 +7540,8 @@ define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, 0
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, neg(0)
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_fabs_v2f16:
@@ -7557,8 +7557,8 @@ define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, 0
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, neg(0)
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
@@ -7687,8 +7687,8 @@ define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v1, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_v2f16:
@@ -7703,8 +7703,8 @@ define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {
; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, 0
-; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, 0
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixlo_f16 v0, v1, s0, neg(0)
+; GFX1100-SDAG-FAKE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, neg(0)
; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_v2f16:
@@ -7719,8 +7719,8 @@ define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v2, v0
; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, 0
-; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, 0
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixlo_f16 v0, v1, v3, neg(0)
+; GFX1100-GISEL-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, v3, neg(0)
; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_v2f16:
@@ -7736,8 +7736,8 @@ define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v0
; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, 0
-; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, 0
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v2, neg(0)
+; GFX1100-GISEL-FAKE16-NEXT: v_fma_mixlo_f16 v1, v1, v2, neg(0)
; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
@@ -8019,10 +8019,10 @@ define <3 x half> @v_log_v3f16(<3 x half> %in) {
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v1, v1
; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v2, v2
; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v1, v1, s0, 0
-; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, 0
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixlo_f16 v1, v1, s0, neg(0)
+; GFX1100-SDAG-TRUE16-NEXT: v_fma_mixhi_f16 v0, v2, s0, neg(0)
; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/214544
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