[llvm] [AArch64][GISel] Recover ADDHN from OR comparison masks (PR #213925)

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 6 06:51:36 PDT 2026


================
@@ -385,6 +385,63 @@ void applyOrToBSP(MachineInstr &MI, MachineRegisterInfo &MRI,
   MI.eraseFromParent();
 }
 
+/// Match G_TRUNC (G_OR X, Y) => G_ADDHN X, Y when both inputs are sign
+/// extended from the result element type. The high half of the addition then
+/// equals the truncation of the OR.
+bool matchTruncOrToADDHN(MachineInstr &MI, MachineRegisterInfo &MRI,
+                         GISelValueTracking *VT,
+                         std::pair<Register, Register> &MatchInfo) {
+  assert(MI.getOpcode() == TargetOpcode::G_TRUNC && VT);
+
+  Register Dst = MI.getOperand(0).getReg();
+  Register Or = MI.getOperand(1).getReg();
+  MachineInstr *OrMI = getOpcodeDef(TargetOpcode::G_OR, Or, MRI);
+  if (!OrMI || !MRI.hasOneNonDBGUse(Or))
+    return false;
+
+  LLT DstTy = MRI.getType(Dst);
+  LLT SrcTy = MRI.getType(Or);
+  if (!((DstTy == LLT::fixed_vector(8, 8) &&
+         SrcTy == LLT::fixed_vector(8, 16)) ||
+        (DstTy == LLT::fixed_vector(4, 16) &&
+         SrcTy == LLT::fixed_vector(4, 32)) ||
+        (DstTy == LLT::fixed_vector(2, 32) &&
+         SrcTy == LLT::fixed_vector(2, 64))))
+    return false;
+
+  // ADDHN is not profitable if its narrow result is immediately widened
+  // again.
----------------
davemgreen wrote:

This might be a missing combine elsewhere.

https://github.com/llvm/llvm-project/pull/213925


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