[llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)

[Carl Ritson via llvm-commits]

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@@ -137,6 +142,143 @@ bool SIPostRABundler::canBundle(const MachineInstr &MI,
          !isDependentLoad(NextMI);
 }
 
+static Register getDef(MachineInstr &MI) {
+  assert(MI.getNumExplicitDefs() > 0);
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perlfu wrote:

Actually if this is `== 1` we get test failures.
This is an inherited limitation from the original code.
It does create a risk as we are relying on `Defs` modelling all defs.
So I have adjusted all the code to now handle multiple defs, and this function is removed entirely.

https://github.com/llvm/llvm-project/pull/102595