[llvm] [CostModel][X86] Update logic vector reduction costs to match llvm-mca estimates (PR #214191)

[via llvm-commits]

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@@ -5729,13 +5743,75 @@ X86TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
     { ISD::ADD,   MVT::v8i32,   {5, 5, 5, 5} },
     { ISD::ADD,   MVT::v16i16,  {5, 5, 5, 5} },
     { ISD::ADD,   MVT::v32i8,   {4, 4, 4, 4} },
+
+    { ISD::AND,   MVT::v4i64,   {3, 7, 5, 5} },
+    { ISD::AND,   MVT::v8i32,   {4, 9, 7, 7} },
+    { ISD::AND,   MVT::v16i16,  {5,11, 9, 9} },
+    { ISD::AND,   MVT::v8i16,   {4, 7, 7, 7} },
+    { ISD::AND,   MVT::v32i8,   {6,13,11,11} },
+    { ISD::AND,   MVT::v16i8,   {5,10, 9, 9} },
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ParkHanbum wrote:

I compared all the values, and this only happens for SSE2 and AVX512F `v16i8`: why is `5.5` rounded down to `5`, while `1.5` is rounded up to `2`?


https://github.com/llvm/llvm-project/pull/214191