[llvm] [AMDGPU][GISel] RegBankLegalize rules for s_incperflevel/s_decperflevel (PR #214327)

Chinmay Deshpande via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 5 13:00:31 PDT 2026


https://github.com/chinmaydd created https://github.com/llvm/llvm-project/pull/214327

None

>From 3d2991dbe082e4378b18a6a1475913f3dda6bf90 Mon Sep 17 00:00:00 2001
From: Chinmay Deshpande <chdeshpa at amd.com>
Date: Wed, 5 Aug 2026 11:57:21 -0700
Subject: [PATCH] [AMDGPU][GISel] RegBankLegalize rules for
 s_incperflevel/s_decperflevel

llvm.amdgcn.s.{inc,dec}perflevel reached AMDGPURegBankLegalize without a rule
and failed with "No AMDGPU RegBankLegalize rules defined for opcode". Their
only argument is an ImmArg, so like s_setprio and s_sleep they belong in the
existing no-register-operand intrinsic rule set.

Enable GlobalISel in the corresponding lit tests.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---
 llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp  | 2 ++
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll | 2 ++
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 499a018828957..3c8bbfa7a36e0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -1819,6 +1819,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
                     amdgcn_s_barrier_leave,
                     amdgcn_s_barrier_signal,
                     amdgcn_s_barrier_wait,
+                    amdgcn_s_decperflevel,
+                    amdgcn_s_incperflevel,
                     amdgcn_s_monitor_sleep,
                     amdgcn_s_nop,
                     amdgcn_s_sethalt,
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
index d4daa2abacdec..c88faefadcad1 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=GCN %s
 ; RUN: llc -mtriple=amdgpu8.02 < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -global-isel -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -global-isel -mtriple=amdgpu8.02 < %s | FileCheck -check-prefix=GCN %s
 
 declare void @llvm.amdgcn.s.decperflevel(i32) #0
 
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
index 91d3b4361d613..8e02b7de09b29 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=GCN %s
 ; RUN: llc -mtriple=amdgpu8.02 < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -global-isel -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -global-isel -mtriple=amdgpu8.02 < %s | FileCheck -check-prefix=GCN %s
 
 declare void @llvm.amdgcn.s.incperflevel(i32) #0
 



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