[llvm] [AMDGPU][GISel] RegBankLegalize rule for amdgcn_fdot2_f32_bf16 (PR #214326)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 5 13:00:20 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Chinmay Deshpande (chinmaydd)
<details>
<summary>Changes</summary>
---
Patch is 44.57 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/214326.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp (+3-1)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll (+644-197)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 499a018828957..8eaeaf6d7fdbb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -2656,7 +2656,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Div(S64, {{Vgpr64, Vcc}, {IntrId, Vgpr64, Vgpr64}})
.Uni(S64, {{UniInVgprS64, UniInVcc}, {IntrId, Vgpr64, Vgpr64}});
- addRulesForIOpcs({amdgcn_fdot2, amdgcn_sdot2, amdgcn_udot2}, Standard)
+ addRulesForIOpcs({amdgcn_fdot2, amdgcn_fdot2_f32_bf16, amdgcn_sdot2,
+ amdgcn_udot2},
+ Standard)
.Uni(S32, {{UniInVgprS32}, {IntrId, VgprV2S16, VgprV2S16, Vgpr32}})
.Div(S32, {{Vgpr32}, {IntrId, VgprV2S16, VgprV2S16, Vgpr32}});
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
index ec1aa4d72db81..aba6fa1b42448 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
@@ -1,7 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_wait" --filter-out "s_nop" --filter-out "s_delay_alu" --filter-out "s_setpc_b64" --version 6
-; RUN: llc -mtriple=amdgpu9.50 < %s | FileCheck %s --check-prefixes=GCN,GFX950
-; RUN: llc -mtriple=amdgpu11.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX11
-; RUN: llc -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX12
+; RUN: llc -global-isel=0 -mtriple=amdgpu9.50 < %s | FileCheck %s --check-prefixes=GCN,GFX950,GFX950-SDAG
+; RUN: llc -global-isel=1 -mtriple=amdgpu9.50 < %s | FileCheck %s --check-prefixes=GCN,GFX950,GFX950-GISEL
+; RUN: llc -global-isel=0 -mtriple=amdgpu11.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX11,GFX11-SDAG
+; RUN: llc -global-isel=1 -mtriple=amdgpu11.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX11,GFX11-GISEL
+; RUN: llc -global-isel=0 -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX12,GFX12-SDAG
+; RUN: llc -global-isel=1 -mtriple=amdgpu12.00 < %s | FileCheck %s --check-prefixes=GCN,GFX11PLUS,GFX12,GFX12-GISEL
declare float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %a, <2 x bfloat> %b, float %c, i1 %clamp)
@@ -28,20 +31,50 @@ define float @v_fdot2_f32_bf16_neg_a(<2 x bfloat> %a, <2 x bfloat> %b, float %c)
}
define float @v_fdot2_f32_bf16_neg_a_lo(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_neg_a_lo:
-; GFX950: ; %bb.0:
-; GFX950: v_xor_b32_e32 v3, 0x8000, v0
-; GFX950: s_mov_b32 s0, 0xffff
-; GFX950: v_bfi_b32 v0, s0, v3, v0
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: v_xor_b32_e32 v3, 0x8000, v0
+; GFX950-SDAG: s_mov_b32 s0, 0xffff
+; GFX950-SDAG: v_bfi_b32 v0, s0, v3, v0
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_neg_a_lo:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11PLUS: v_xor_b16 v0.l, 0x8000, v0.l
-; GFX11PLUS: v_mov_b16_e32 v0.h, v3.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: v_xor_b32_e32 v3, 0x8000, v0
+; GFX950-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX950-GISEL: v_mov_b32_e32 v4, 0xffff0000
+; GFX950-GISEL: v_and_or_b32 v0, v0, v4, v3
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
+;
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-SDAG: v_xor_b16 v0.l, 0x8000, v0.l
+; GFX11-SDAG: v_mov_b16_e32 v0.h, v3.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_xor_b16 v3.l, 0x8000, v0.l
+; GFX11-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX11-GISEL: v_and_or_b32 v0, 0xffff0000, v0, v3
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v3, 16, v0
+; GFX12-SDAG: v_xor_b16 v0.l, 0x8000, v0.l
+; GFX12-SDAG: v_mov_b16_e32 v0.h, v3.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_lo:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_xor_b16 v3.l, 0x8000, v0.l
+; GFX12-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX12-GISEL: v_and_or_b32 v0, 0xffff0000, v0, v3
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%a_lo = extractelement <2 x bfloat> %a, i32 0
%neg.a_lo = fneg bfloat %a_lo
%neg_lo.a = insertelement <2 x bfloat> %a, bfloat %neg.a_lo, i32 0
@@ -50,20 +83,55 @@ define float @v_fdot2_f32_bf16_neg_a_lo(<2 x bfloat> %a, <2 x bfloat> %b, float
}
define float @v_fdot2_f32_bf16_neg_a_hi(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_neg_a_hi:
-; GFX950: ; %bb.0:
-; GFX950: s_mov_b32 s0, 0x8000
-; GFX950: v_xor_b32_sdwa v3, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX950: s_mov_b32 s0, 0x5040100
-; GFX950: v_perm_b32 v0, v3, v0, s0
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: s_mov_b32 s0, 0x8000
+; GFX950-SDAG: v_xor_b32_sdwa v3, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX950-SDAG: s_mov_b32 s0, 0x5040100
+; GFX950-SDAG: v_perm_b32 v0, v3, v0, s0
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_neg_a_hi:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v3, 16, v0
-; GFX11PLUS: v_xor_b16 v0.h, 0x8000, v3.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: s_mov_b32 s0, 0x8000
+; GFX950-GISEL: v_xor_b32_sdwa v3, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX950-GISEL: v_mov_b32_e32 v4, 16
+; GFX950-GISEL: v_lshlrev_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX950-GISEL: v_mov_b32_e32 v4, 0xffff
+; GFX950-GISEL: v_and_or_b32 v0, v0, v4, v3
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
+;
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-SDAG: v_xor_b16 v0.h, 0x8000, v3.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_lshrrev_b32_e32 v3, 16, v0
+; GFX11-GISEL: v_xor_b16 v3.l, 0x8000, v3.l
+; GFX11-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX11-GISEL: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-GISEL: v_and_or_b32 v0, 0xffff, v0, v3
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v3, 16, v0
+; GFX12-SDAG: v_xor_b16 v0.h, 0x8000, v3.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_neg_a_hi:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_lshrrev_b32_e32 v3, 16, v0
+; GFX12-GISEL: v_xor_b16 v3.l, 0x8000, v3.l
+; GFX12-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX12-GISEL: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-GISEL: v_and_or_b32 v0, 0xffff, v0, v3
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%a_hi = extractelement <2 x bfloat> %a, i32 1
%neg.a_hi = fneg bfloat %a_hi
%neg_hi.a = insertelement <2 x bfloat> %a, bfloat %neg.a_hi, i32 1
@@ -81,20 +149,50 @@ define float @v_fdot2_f32_bf16_neg_b(<2 x bfloat> %a, <2 x bfloat> %b, float %c)
}
define float @v_fdot2_f32_bf16_neg_b_lo(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_neg_b_lo:
-; GFX950: ; %bb.0:
-; GFX950: v_xor_b32_e32 v3, 0x8000, v1
-; GFX950: s_mov_b32 s0, 0xffff
-; GFX950: v_bfi_b32 v1, s0, v3, v1
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: v_xor_b32_e32 v3, 0x8000, v1
+; GFX950-SDAG: s_mov_b32 s0, 0xffff
+; GFX950-SDAG: v_bfi_b32 v1, s0, v3, v1
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_neg_b_lo:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11PLUS: v_xor_b16 v1.l, 0x8000, v1.l
-; GFX11PLUS: v_mov_b16_e32 v1.h, v3.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: v_xor_b32_e32 v3, 0x8000, v1
+; GFX950-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX950-GISEL: v_mov_b32_e32 v4, 0xffff0000
+; GFX950-GISEL: v_and_or_b32 v1, v1, v4, v3
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
+;
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v3, 16, v1
+; GFX11-SDAG: v_xor_b16 v1.l, 0x8000, v1.l
+; GFX11-SDAG: v_mov_b16_e32 v1.h, v3.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_xor_b16 v3.l, 0x8000, v1.l
+; GFX11-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX11-GISEL: v_and_or_b32 v1, 0xffff0000, v1, v3
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v3, 16, v1
+; GFX12-SDAG: v_xor_b16 v1.l, 0x8000, v1.l
+; GFX12-SDAG: v_mov_b16_e32 v1.h, v3.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_lo:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_xor_b16 v3.l, 0x8000, v1.l
+; GFX12-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX12-GISEL: v_and_or_b32 v1, 0xffff0000, v1, v3
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%b_lo = extractelement <2 x bfloat> %b, i32 0
%neg.b_lo = fneg bfloat %b_lo
%neg_lo.b = insertelement <2 x bfloat> %b, bfloat %neg.b_lo, i32 0
@@ -103,20 +201,55 @@ define float @v_fdot2_f32_bf16_neg_b_lo(<2 x bfloat> %a, <2 x bfloat> %b, float
}
define float @v_fdot2_f32_bf16_neg_b_hi(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_neg_b_hi:
-; GFX950: ; %bb.0:
-; GFX950: s_mov_b32 s0, 0x8000
-; GFX950: v_xor_b32_sdwa v3, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX950: s_mov_b32 s0, 0x5040100
-; GFX950: v_perm_b32 v1, v3, v1, s0
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: s_mov_b32 s0, 0x8000
+; GFX950-SDAG: v_xor_b32_sdwa v3, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX950-SDAG: s_mov_b32 s0, 0x5040100
+; GFX950-SDAG: v_perm_b32 v1, v3, v1, s0
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_neg_b_hi:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v3, 16, v1
-; GFX11PLUS: v_xor_b16 v1.h, 0x8000, v3.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: s_mov_b32 s0, 0x8000
+; GFX950-GISEL: v_xor_b32_sdwa v3, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX950-GISEL: v_mov_b32_e32 v4, 16
+; GFX950-GISEL: v_lshlrev_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX950-GISEL: v_mov_b32_e32 v4, 0xffff
+; GFX950-GISEL: v_and_or_b32 v1, v1, v4, v3
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
+;
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v3, 16, v1
+; GFX11-SDAG: v_xor_b16 v1.h, 0x8000, v3.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_lshrrev_b32_e32 v3, 16, v1
+; GFX11-GISEL: v_xor_b16 v3.l, 0x8000, v3.l
+; GFX11-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX11-GISEL: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-GISEL: v_and_or_b32 v1, 0xffff, v1, v3
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v3, 16, v1
+; GFX12-SDAG: v_xor_b16 v1.h, 0x8000, v3.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_neg_b_hi:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_lshrrev_b32_e32 v3, 16, v1
+; GFX12-GISEL: v_xor_b16 v3.l, 0x8000, v3.l
+; GFX12-GISEL: v_bfe_u32 v3, v3, 0, 16
+; GFX12-GISEL: v_lshlrev_b32_e32 v3, 16, v3
+; GFX12-GISEL: v_and_or_b32 v1, 0xffff, v1, v3
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%b_hi = extractelement <2 x bfloat> %b, i32 1
%neg.b_hi = fneg bfloat %b_hi
%neg_hi.b = insertelement <2 x bfloat> %b, bfloat %neg.b_hi, i32 1
@@ -150,23 +283,46 @@ define float @v_fdot2_f32_bf16_opsel_lo_a(<2 x bfloat> %a, <2 x bfloat> %b, floa
; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
; GFX950: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_opsel_lo_a:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11PLUS: v_mov_b16_e32 v0.h, v0.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_a:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-SDAG: v_mov_b16_e32 v0.h, v0.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_a:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_mov_b16_e32 v0.l, v0.h
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_a:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v0, 16, v0
+; GFX12-SDAG: v_mov_b16_e32 v0.h, v0.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_a:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_mov_b16_e32 v0.l, v0.h
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%shuf = shufflevector <2 x bfloat> %a, <2 x bfloat> poison, <2 x i32> <i32 1, i32 1>
%r = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %shuf, <2 x bfloat> %b, float %c, i1 false)
ret float %r
}
define float @v_fdot2_f32_bf16_opsel_hi_a(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_opsel_hi_a:
-; GFX950: ; %bb.0:
-; GFX950: s_mov_b32 s0, 0x5040100
-; GFX950: v_perm_b32 v0, v0, v0, s0
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_opsel_hi_a:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: s_mov_b32 s0, 0x5040100
+; GFX950-SDAG: v_perm_b32 v0, v0, v0, s0
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
+;
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_opsel_hi_a:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: v_lshlrev_b32_e32 v3, 16, v0
+; GFX950-GISEL: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
;
; GFX11PLUS-LABEL: v_fdot2_f32_bf16_opsel_hi_a:
; GFX11PLUS: ; %bb.0:
@@ -185,23 +341,46 @@ define float @v_fdot2_f32_bf16_opsel_lo_b(<2 x bfloat> %a, <2 x bfloat> %b, floa
; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
; GFX950: v_mov_b32_e32 v0, v2
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_opsel_lo_b:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v1, 16, v1
-; GFX11PLUS: v_mov_b16_e32 v1.h, v1.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_b:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-SDAG: v_mov_b16_e32 v1.h, v1.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_b:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_mov_b16_e32 v1.l, v1.h
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_b:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v1, 16, v1
+; GFX12-SDAG: v_mov_b16_e32 v1.h, v1.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_b:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_mov_b16_e32 v1.l, v1.h
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2
%shuf = shufflevector <2 x bfloat> %b, <2 x bfloat> poison, <2 x i32> <i32 1, i32 1>
%r = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %a, <2 x bfloat> %shuf, float %c, i1 false)
ret float %r
}
define float @v_fdot2_f32_bf16_opsel_hi_b(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_opsel_hi_b:
-; GFX950: ; %bb.0:
-; GFX950: s_mov_b32 s0, 0x5040100
-; GFX950: v_perm_b32 v1, v1, v1, s0
-; GFX950: v_dot2c_f32_bf16_e32 v2, v0, v1
-; GFX950: v_mov_b32_e32 v0, v2
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_opsel_hi_b:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: s_mov_b32 s0, 0x5040100
+; GFX950-SDAG: v_perm_b32 v1, v1, v1, s0
+; GFX950-SDAG: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-SDAG: v_mov_b32_e32 v0, v2
+;
+; GFX950-GISEL-LABEL: v_fdot2_f32_bf16_opsel_hi_b:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL: v_lshlrev_b32_e32 v3, 16, v1
+; GFX950-GISEL: v_or_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+; GFX950-GISEL: v_dot2c_f32_bf16_e32 v2, v0, v1
+; GFX950-GISEL: v_mov_b32_e32 v0, v2
;
; GFX11PLUS-LABEL: v_fdot2_f32_bf16_opsel_hi_b:
; GFX11PLUS: ; %bb.0:
@@ -303,22 +482,44 @@ define float @v_fdot2_f32_bf16_opsel_lo_a_clamp(<2 x bfloat> %a, <2 x bfloat> %b
; GFX950: v_perm_b32 v0, v0, v0, s0
; GFX950: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
;
-; GFX11PLUS-LABEL: v_fdot2_f32_bf16_opsel_lo_a_clamp:
-; GFX11PLUS: ; %bb.0:
-; GFX11PLUS: v_lshrrev_b32_e32 v0, 16, v0
-; GFX11PLUS: v_mov_b16_e32 v0.h, v0.l
-; GFX11PLUS: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+; GFX11-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_a_clamp:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG: v_lshrrev_b32_e32 v0, 16, v0
+; GFX11-SDAG: v_mov_b16_e32 v0.h, v0.l
+; GFX11-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+;
+; GFX11-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_a_clamp:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL: v_mov_b16_e32 v0.l, v0.h
+; GFX11-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+;
+; GFX12-SDAG-LABEL: v_fdot2_f32_bf16_opsel_lo_a_clamp:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG: v_lshrrev_b32_e32 v0, 16, v0
+; GFX12-SDAG: v_mov_b16_e32 v0.h, v0.l
+; GFX12-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+;
+; GFX12-GISEL-LABEL: v_fdot2_f32_bf16_opsel_lo_a_clamp:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL: v_mov_b16_e32 v0.l, v0.h
+; GFX12-GISEL: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
%shuf = shufflevector <2 x bfloat> %a, <2 x bfloat> poison, <2 x i32> <i32 1, i32 1>
%r = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x bfloat> %shuf, <2 x bfloat> %b, float %c, i1 true)
ret float %r
}
define float @v_fdot2_f32_bf16_opsel_hi_a_clamp(<2 x bfloat> %a, <2 x bfloat> %b, float %c) {
-; GFX950-LABEL: v_fdot2_f32_bf16_opsel_hi_a_clamp:
-; GFX950: ; %bb.0:
-; GFX950: s_mov_b32 s0, 0x5040100
-; GFX950: v_perm_b32 v0, v0, v0, s0
-; GFX950: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+; GFX950-SDAG-LABEL: v_fdot2_f32_bf16_opsel_hi_a_clamp:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG: s_mov_b32 s0, 0x5040100
+; GFX950-SDAG: v_perm_b32 v0, v0, v0, s0
+; GFX950-SDAG: v_dot2_f32_bf16 v0, v0, v1, v2 clamp
+...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/214326
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