[llvm] [DAGCombiner] Expose CSE for shifts of logic operations (PR #213091)

[Hao Ren via llvm-commits]

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nvidia-moomoo wrote:

Even if we emit a bunch of same factor-out SHL, the get-node will deduplicate for us. The reason we match siblings is that we want to make it profitable (at least eliminate one shift). 

https://github.com/llvm/llvm-project/pull/213091