[llvm] PPC: Fix EXTSW elimination promoting a subregister operand (PR #208051)

[via llvm-commits]

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@@ -5499,6 +5499,13 @@ void PPCInstrInfo::promoteInstr32To64ForElimEXTSW(const Register &Reg,
     if (!OperandReg.isVirtual())
       continue;
 
+    // An operand that reads the sub_32 subregister of a 64-bit register already
+    // holds the value in a full 64-bit register.
+    if (Operand.getSubReg() == PPC::sub_32) {
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RolandF77 wrote:

Maybe I am misreading but it looks like you are using the corresponding full 64-bit register directly in the new instruction if the old instruction used a 32-bit subreg. That would change something because previously that operand in the new instruction was grown to 64-bits only if the new instruction says the class for that operand is different from the class of the corresponding old instruction operand.

https://github.com/llvm/llvm-project/pull/208051