[llvm] 0c4fda8 - [AMDGPU][GlobalISel] RegBankLegalize rules for amdgcn_permlane16 (#214062)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 5 09:50:10 PDT 2026
Author: Chinmay Deshpande
Date: 2026-08-05T09:50:05-07:00
New Revision: 0c4fda86643a5b95066a452d8c2c2c6c16303cc1
URL: https://github.com/llvm/llvm-project/commit/0c4fda86643a5b95066a452d8c2c2c6c16303cc1
DIFF: https://github.com/llvm/llvm-project/commit/0c4fda86643a5b95066a452d8c2c2c6c16303cc1.diff
LOG: [AMDGPU][GlobalISel] RegBankLegalize rules for amdgcn_permlane16 (#214062)
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 4bdbce7c2aa8e..0b1a9e4904078 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -1940,9 +1940,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Uni(V2S16, {{UniInVgprV2S16}, {IntrId, VgprV2S16, VgprV2S16, VgprV2S16}})
.Div(V2S16, {{VgprV2S16}, {IntrId, VgprV2S16, VgprV2S16, VgprV2S16}});
- addRulesForIOpcs({amdgcn_permlane16, amdgcn_permlanex16}, Standard)
- .Div(S32, {{Vgpr32},
- {IntrId, Vgpr32, Vgpr32, SgprB32_ReadFirstLane,
+ addRulesForIOpcs({amdgcn_permlane16, amdgcn_permlanex16}, StandardB)
+ .Div(B32, {{VgprB32},
+ {IntrId, VgprB32, VgprB32, SgprB32_ReadFirstLane,
SgprB32_ReadFirstLane}});
addRulesForIOpcs({amdgcn_permlane_bcast, amdgcn_permlane_up,
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
index c757e17339d14..99240b29d2a9e 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
@@ -1,15 +1,15 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s
-;xUN: llc -global-isel=1 -global-isel-abort=2 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu11.00 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG %s
-; RUN: llc -global-isel=1 -global-isel-abort=2 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu11.00 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu11.00 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
-; RUN: llc -global-isel=1 -global-isel-abort=2 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu13.10 < %s | FileCheck -check-prefixes=GFX13,GFX13-SDAG %s
-;xUN: llc -global-isel=1 -global-isel-abort=2 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu13.10 < %s | FileCheck -check-prefixes=GFX13,GFX13-GISEL %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu13.10 < %s | FileCheck -check-prefixes=GFX13,GFX13-GISEL %s
; RUN: not llc -global-isel=0 -mtriple=amdgpu9.00 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
-;xUN: not llc -global-isel=1 -global-isel-abort=0 -mtriple=amdgpu9.00 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -global-isel=1 -global-isel-abort=0 -mtriple=amdgpu9.00 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
; ERR: error: <unknown>:0:0: in function @v_permlane16_b32_vss_i32 void (ptr addrspace(1), i32, i32, i32): llvm.amdgcn.permlane16 requires target feature 'permlane16-insts'
@@ -125,19 +125,33 @@ define amdgpu_kernel void @v_permlane16_b32_vss_f32(ptr addrspace(1) %out, float
}
define amdgpu_kernel void @v_permlane16_b32_vss_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_i64:
; GFX11-SDAG: ; %bb.0:
@@ -195,32 +209,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_i64(ptr addrspace(1) %out, i64 %
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -240,19 +242,35 @@ define amdgpu_kernel void @v_permlane16_b32_vss_i64(ptr addrspace(1) %out, i64 %
}
define amdgpu_kernel void @v_permlane16_b32_vss_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_f64:
; GFX11-SDAG: ; %bb.0:
@@ -312,34 +330,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -458,17 +462,29 @@ define amdgpu_kernel void @v_permlane16_b32_vii_f32(ptr addrspace(1) %out, float
}
define amdgpu_kernel void @v_permlane16_b32_vii_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlane16_b32_vii_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, 1, 2
-; GFX10-NEXT: v_permlane16_b32 v0, v0, 1, 2
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vii_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vii_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vii_i64:
; GFX11-SDAG: ; %bb.0:
@@ -518,28 +534,18 @@ define amdgpu_kernel void @v_permlane16_b32_vii_i64(ptr addrspace(1) %out, i64 %
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vii_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, 1, 2
-; GFX13-NEXT: v_permlane16_b32 v0, v0, 1, 2
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vii_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, 1, 2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, 1, 2
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vii_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vii_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -557,17 +563,31 @@ define amdgpu_kernel void @v_permlane16_b32_vii_i64(ptr addrspace(1) %out, i64 %
}
define amdgpu_kernel void @v_permlane16_b32_vii_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlane16_b32_vii_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, 1, 2
-; GFX10-NEXT: v_permlane16_b32 v0, v0, 1, 2
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vii_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vii_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, 1, 2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, 1, 2
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vii_f64:
; GFX11-SDAG: ; %bb.0:
@@ -619,30 +639,18 @@ define amdgpu_kernel void @v_permlane16_b32_vii_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vii_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, 1, 2
-; GFX13-NEXT: v_permlane16_b32 v0, v0, 1, 2
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vii_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, 1, 2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, 1, 2
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vii_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, 1, 2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, 1, 2
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vii_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -716,18 +724,31 @@ define amdgpu_kernel void @v_permlane16_b32_vll_i32(ptr addrspace(1) %out, i32 %
}
define amdgpu_kernel void @v_permlane16_b32_vll_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlane16_b32_vll_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vll_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vll_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vll_i64:
; GFX11-SDAG: ; %bb.0:
@@ -785,31 +806,20 @@ define amdgpu_kernel void @v_permlane16_b32_vll_i64(ptr addrspace(1) %out, i64 %
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vll_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_movk_i32 s2, 0x1234
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vll_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vll_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vll_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -883,18 +893,33 @@ define amdgpu_kernel void @v_permlane16_b32_vll_f32(ptr addrspace(1) %out,float
}
define amdgpu_kernel void @v_permlane16_b32_vll_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlane16_b32_vll_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vll_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vll_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s2, 0xc1d1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s2, 0xc1d1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vll_f64:
; GFX11-SDAG: ; %bb.0:
@@ -954,33 +979,20 @@ define amdgpu_kernel void @v_permlane16_b32_vll_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vll_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_movk_i32 s2, 0x1234
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vll_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s2, 0xc1d1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s2, 0xc1d1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vll_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, 0xc1d1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s2, 0xc1d1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vll_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -1001,27 +1013,42 @@ define amdgpu_kernel void @v_permlane16_b32_vll_f64(ptr addrspace(1) %out, doubl
}
define amdgpu_kernel void @v_permlane16_b32_vvv_i32(ptr addrspace(1) %out, i32 %src0) {
-; GFX10-LABEL: v_permlane16_b32_vvv_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
;
-; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_i32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x2c
-; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
-; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
+;
+; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_i32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_clause 0x1
+; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x2c
+; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
@@ -1084,35 +1111,22 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_i32(ptr addrspace(1) %out, i32 %
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvv_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s3, v1
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvv_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s3, v1
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvv_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
@@ -1135,20 +1149,35 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_i32(ptr addrspace(1) %out, i32 %
}
define amdgpu_kernel void @v_permlane16_b32_vvv_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlane16_b32_vvv_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-LABEL: v_permlane16_b32_vvv_i64:
; GFX11: ; %bb.0:
@@ -1186,36 +1215,23 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_i64(ptr addrspace(1) %out, i64 %
; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvv_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s4, v1
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvv_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvv_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -1240,19 +1256,34 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_i64(ptr addrspace(1) %out, i64 %
}
define amdgpu_kernel void @v_permlane16_b32_vvv_f32(ptr addrspace(1) %out, float %src0) {
-; GFX10-LABEL: v_permlane16_b32_vvv_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_f32:
; GFX11-SDAG: ; %bb.0:
@@ -1323,35 +1354,22 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_f32(ptr addrspace(1) %out, float
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvv_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s3, v1
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvv_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s3, v1
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvv_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
@@ -1374,20 +1392,37 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_f32(ptr addrspace(1) %out, float
}
define amdgpu_kernel void @v_permlane16_b32_vvv_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlane16_b32_vvv_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvv_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s4, s5
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vvv_f64:
; GFX11-SDAG: ; %bb.0:
@@ -1463,38 +1498,23 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvv_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s4, v1
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvv_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s4, s5
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvv_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvv_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -1520,16 +1540,28 @@ define amdgpu_kernel void @v_permlane16_b32_vvv_f64(ptr addrspace(1) %out, doubl
}
define amdgpu_kernel void @v_permlane16_b32_vvs_i32(ptr addrspace(1) %out, i32 %src0, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vvs_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v0
-; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s2, s3
-; GFX10-NEXT: global_store_dword v0, v1, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
+; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vvs_i32:
; GFX11-SDAG: ; %bb.0:
@@ -1580,29 +1612,19 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_i32(ptr addrspace(1) %out, i32 %
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvs_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s2, s3
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvs_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvs_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -1622,21 +1644,37 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_i32(ptr addrspace(1) %out, i32 %
}
define amdgpu_kernel void @v_permlane16_b32_vvs_i64(ptr addrspace(1) %out, i64 %src0, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vvs_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s4, s6
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s4, s6
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s6
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s6
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s6
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s4, s6
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-LABEL: v_permlane16_b32_vvs_i64:
; GFX11: ; %bb.0:
@@ -1672,37 +1710,23 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_i64(ptr addrspace(1) %out, i64 %
; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvs_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s5, s4
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s5, s4
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s6
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s4, s6
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvs_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s5, s4
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s5, s4
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvs_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -1726,16 +1750,28 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_i64(ptr addrspace(1) %out, i64 %
}
define amdgpu_kernel void @v_permlane16_b32_vvs_f32(ptr addrspace(1) %out, float %src0, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vvs_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v0
-; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s2, s3
-; GFX10-NEXT: global_store_dword v0, v1, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
+; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vvs_f32:
; GFX11-SDAG: ; %bb.0:
@@ -1786,29 +1822,19 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_f32(ptr addrspace(1) %out, float
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvs_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s2, s3
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s4, s3
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvs_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s2, s3
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvs_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -1828,21 +1854,39 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_f32(ptr addrspace(1) %out, float
}
define amdgpu_kernel void @v_permlane16_b32_vvs_f64(ptr addrspace(1) %out, double %src0, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vvs_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s4, s6
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s4, s6
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vvs_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s6
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s6
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s4, s6
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s4, s6
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vvs_f64:
; GFX11-SDAG: ; %bb.0:
@@ -1914,39 +1958,23 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vvs_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s5, s4
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s5, s4
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vvs_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s4, s6
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s4, s6
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vvs_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s5, s4
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s5, s4
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vvs_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -1971,16 +1999,28 @@ define amdgpu_kernel void @v_permlane16_b32_vvs_f64(ptr addrspace(1) %out, doubl
}
define amdgpu_kernel void @v_permlane16_b32_vsv_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1) {
-; GFX10-LABEL: v_permlane16_b32_vsv_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_i32:
; GFX11-SDAG: ; %bb.0:
@@ -2035,29 +2075,19 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_i32(ptr addrspace(1) %out, i32 %
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vsv_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vsv_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vsv_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -2077,21 +2107,37 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_i32(ptr addrspace(1) %out, i32 %
}
define amdgpu_kernel void @v_permlane16_b32_vsv_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1) {
-; GFX10-LABEL: v_permlane16_b32_vsv_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s4
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s4
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s4
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s4
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s4
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s4
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_i64:
; GFX11-SDAG: ; %bb.0:
@@ -2161,37 +2207,23 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_i64(ptr addrspace(1) %out, i64 %
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vsv_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s4
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s4
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vsv_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vsv_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -2215,16 +2247,28 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_i64(ptr addrspace(1) %out, i64 %
}
define amdgpu_kernel void @v_permlane16_b32_vsv_f32(ptr addrspace(1) %out, float %src0, i32 %src1) {
-; GFX10-LABEL: v_permlane16_b32_vsv_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_f32:
; GFX11-SDAG: ; %bb.0:
@@ -2279,29 +2323,19 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_f32(ptr addrspace(1) %out, float
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vsv_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vsv_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vsv_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -2321,21 +2355,39 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_f32(ptr addrspace(1) %out, float
}
define amdgpu_kernel void @v_permlane16_b32_vsv_f64(ptr addrspace(1) %out, double %src0, i32 %src1) {
-; GFX10-LABEL: v_permlane16_b32_vsv_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s4
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s4
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vsv_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s4
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s4
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s4
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s4
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vsv_f64:
; GFX11-SDAG: ; %bb.0:
@@ -2407,39 +2459,23 @@ define amdgpu_kernel void @v_permlane16_b32_vsv_f64(ptr addrspace(1) %out, doubl
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vsv_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vsv_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s4
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s4
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vsv_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vsv_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -2517,19 +2553,33 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_i32(ptr addrspace(1) %out, i3
}
define amdgpu_kernel void @v_permlane16_b32_vss_fi_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_fi_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
; GFX11-SDAG: ; %bb.0:
@@ -2587,32 +2637,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_i64(ptr addrspace(1) %out, i6
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_fi_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_fi_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_fi_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -2685,19 +2723,35 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_f32(ptr addrspace(1) %out, fl
}
define amdgpu_kernel void @v_permlane16_b32_vss_fi_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_fi_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
; GFX11-SDAG: ; %bb.0:
@@ -2757,34 +2811,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_f64(ptr addrspace(1) %out, do
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_fi_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_fi_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_fi_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -2858,19 +2898,33 @@ define amdgpu_kernel void @v_permlane16_b32_vss_bc_i32(ptr addrspace(1) %out, i3
}
define amdgpu_kernel void @v_permlane16_b32_vss_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -2928,32 +2982,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_bc_i64(ptr addrspace(1) %out, i6
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3026,19 +3068,35 @@ define amdgpu_kernel void @v_permlane16_b32_vss_bc_f32(ptr addrspace(1) %out, fl
}
define amdgpu_kernel void @v_permlane16_b32_vss_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -3098,34 +3156,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_bc_f64(ptr addrspace(1) %out, do
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3199,19 +3243,33 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_i32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_fi_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -3269,32 +3327,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_fi_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3367,19 +3413,35 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_vss_fi_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -3439,34 +3501,20 @@ define amdgpu_kernel void @v_permlane16_b32_vss_fi_bc_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_vss_fi_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v2, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v3, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_vss_fi_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_vss_fi_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3593,22 +3641,36 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vss_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
;
-; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_i64:
-; GFX11-SDAG: ; %bb.0:
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
+;
+; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_i64:
+; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
@@ -3663,32 +3725,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_i64(ptr addrspace(1) %out, i64
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3708,19 +3758,35 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vss_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_f64:
; GFX11-SDAG: ; %bb.0:
@@ -3780,34 +3846,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -3926,17 +3978,29 @@ define amdgpu_kernel void @v_permlanex16_b32_vii_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vii_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vii_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, 1, 2
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, 1, 2
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vii_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vii_i64:
; GFX11-SDAG: ; %bb.0:
@@ -3986,28 +4050,18 @@ define amdgpu_kernel void @v_permlanex16_b32_vii_i64(ptr addrspace(1) %out, i64
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vii_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, 1, 2
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, 1, 2
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, 1, 2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, 1, 2
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vii_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vii_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4025,17 +4079,31 @@ define amdgpu_kernel void @v_permlanex16_b32_vii_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vii_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vii_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, 1, 2
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, 1, 2
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vii_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, 1, 2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, 1, 2
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vii_f64:
; GFX11-SDAG: ; %bb.0:
@@ -4087,30 +4155,18 @@ define amdgpu_kernel void @v_permlanex16_b32_vii_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vii_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, 1, 2
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, 1, 2
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vii_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, 1, 2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, 1, 2
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vii_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, 1, 2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, 1, 2
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vii_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4238,18 +4294,31 @@ define amdgpu_kernel void @v_permlanex16_b32_vll_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vll_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vll_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vll_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vll_i64:
; GFX11-SDAG: ; %bb.0:
@@ -4307,31 +4376,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vll_i64(ptr addrspace(1) %out, i64
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vll_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_movk_i32 s2, 0x1234
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vll_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vll_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4351,18 +4409,33 @@ define amdgpu_kernel void @v_permlanex16_b32_vll_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vll_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vll_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vll_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s2, 0xc1d1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s2, 0xc1d1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vll_f64:
; GFX11-SDAG: ; %bb.0:
@@ -4422,33 +4495,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vll_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vll_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_movk_i32 s2, 0x1234
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vll_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: s_movk_i32 s2, 0x1234
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s2, 0xc1d1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s2, 0xc1d1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vll_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_movk_i32 s2, 0x1234
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, 0xc1d1
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s2, 0xc1d1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vll_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4469,31 +4529,46 @@ define amdgpu_kernel void @v_permlanex16_b32_vll_f64(ptr addrspace(1) %out, doub
}
define amdgpu_kernel void @v_permlanex16_b32_vvv_i32(ptr addrspace(1) %out, i32 %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vvv_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
;
-; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x2c
-; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
-; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v1
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
+;
+; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_clause 0x1
+; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x2c
+; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX11-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s3, v1
+; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s2, v0
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
@@ -4552,35 +4627,22 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_i32(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvv_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s3, v1
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvv_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s3, v1
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvv_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
@@ -4603,19 +4665,34 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_i32(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlanex16_b32_vvv_f32(ptr addrspace(1) %out, float %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vvv_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_f32:
; GFX11-SDAG: ; %bb.0:
@@ -4686,35 +4763,22 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_f32(ptr addrspace(1) %out, floa
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvv_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s3, v1
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s3, v0
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvv_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s3, v1
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvv_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24 nv
@@ -4737,20 +4801,35 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vvv_i64(ptr addrspace(1) %out, i64 %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vvv_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-LABEL: v_permlanex16_b32_vvv_i64:
; GFX11: ; %bb.0:
@@ -4788,36 +4867,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_i64(ptr addrspace(1) %out, i64
; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvv_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s4, v1
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvv_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvv_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4842,20 +4908,37 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vvv_f64(ptr addrspace(1) %out, double %src0) {
-; GFX10-LABEL: v_permlanex16_b32_vvv_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvv_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s4, s5
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vvv_f64:
; GFX11-SDAG: ; %bb.0:
@@ -4931,38 +5014,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvv_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v0
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_readfirstlane_b32 s4, v1
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvv_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v1
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s4, s5
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvv_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvv_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -4988,16 +5056,28 @@ define amdgpu_kernel void @v_permlanex16_b32_vvv_f64(ptr addrspace(1) %out, doub
}
define amdgpu_kernel void @v_permlanex16_b32_vvs_i32(ptr addrspace(1) %out, i32 %src0, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vvs_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v0
-; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s2, s3
-; GFX10-NEXT: global_store_dword v0, v1, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
+; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
; GFX11-SDAG: ; %bb.0:
@@ -5048,29 +5128,19 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_i32(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvs_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s2, s3
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvs_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvs_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -5090,16 +5160,28 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_i32(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlanex16_b32_vvs_f32(ptr addrspace(1) %out, float %src0, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vvs_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v0
-; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s2, s3
-; GFX10-NEXT: global_store_dword v0, v1, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
+; GFX10-SDAG-NEXT: global_store_dword v0, v1, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
; GFX11-SDAG: ; %bb.0:
@@ -5150,29 +5232,19 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_f32(ptr addrspace(1) %out, floa
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvs_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s2, s3
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s3
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvs_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s2, s3
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvs_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -5192,21 +5264,37 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vvs_i64(ptr addrspace(1) %out, i64 %src0, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vvs_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s4, s6
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s4, s6
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s6
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s6
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s6
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s4, s6
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-LABEL: v_permlanex16_b32_vvs_i64:
; GFX11: ; %bb.0:
@@ -5242,37 +5330,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_i64(ptr addrspace(1) %out, i64
; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvs_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s5, s4
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s5, s4
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s4, s6
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s4, s6
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvs_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s5, s4
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s5, s4
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvs_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -5296,21 +5370,39 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vvs_f64(ptr addrspace(1) %out, double %src0, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vvs_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s4, s6
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s4, s6
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vvs_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s6
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s6
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s4, s6
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s4, s6
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vvs_f64:
; GFX11-SDAG: ; %bb.0:
@@ -5382,39 +5474,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vvs_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s5, s4
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s5, s4
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vvs_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s4, s6
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s4, s6
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vvs_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s5, s4
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s5, s4
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vvs_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -5439,16 +5515,28 @@ define amdgpu_kernel void @v_permlanex16_b32_vvs_f64(ptr addrspace(1) %out, doub
}
define amdgpu_kernel void @v_permlanex16_b32_vsv_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1) {
-; GFX10-LABEL: v_permlanex16_b32_vsv_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_i32:
; GFX11-SDAG: ; %bb.0:
@@ -5503,29 +5591,19 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_i32(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vsv_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vsv_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vsv_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -5545,16 +5623,28 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_i32(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlanex16_b32_vsv_f32(ptr addrspace(1) %out, float %src0, i32 %src1) {
-; GFX10-LABEL: v_permlanex16_b32_vsv_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_readfirstlane_b32 s2, v1
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s3, s2
-; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s2, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s3, s2
+; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
+; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_f32:
; GFX11-SDAG: ; %bb.0:
@@ -5609,29 +5699,19 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_f32(ptr addrspace(1) %out, floa
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vsv_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_mov_b32_e32 v1, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_readfirstlane_b32 s2, v0
-; GFX13-NEXT: v_mov_b32_e32 v0, 0
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s3, s2
-; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s3, s4
-; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vsv_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s2, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s3, s2
+; GFX13-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vsv_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
@@ -5651,21 +5731,37 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_f32(ptr addrspace(1) %out, floa
}
define amdgpu_kernel void @v_permlanex16_b32_vsv_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1) {
-; GFX10-LABEL: v_permlanex16_b32_vsv_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s4
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s4
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s4
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s4
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s4
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s4
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
; GFX11-SDAG: ; %bb.0:
@@ -5735,37 +5831,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_i64(ptr addrspace(1) %out, i64
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vsv_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s4
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s4
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vsv_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vsv_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -5789,21 +5871,39 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_i64(ptr addrspace(1) %out, i64
}
define amdgpu_kernel void @v_permlanex16_b32_vsv_f64(ptr addrspace(1) %out, double %src0, i32 %src1) {
-; GFX10-LABEL: v_permlanex16_b32_vsv_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-NEXT: s_mov_b32 null, 0
-; GFX10-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s4
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s4
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-SDAG-NEXT: s_mov_b32 null, 0
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s4
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s4
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_mov_b32 null, 0
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s4
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s4
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
; GFX11-SDAG: ; %bb.0:
@@ -5875,39 +5975,23 @@ define amdgpu_kernel void @v_permlanex16_b32_vsv_f64(ptr addrspace(1) %out, doub
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vsv_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
-; GFX13-NEXT: v_bfe_u32 v0, v0, 10, 10
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
-; GFX13-NEXT: v_readfirstlane_b32 s5, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dword s6, s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_mov_b32 null, 0
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v1
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s4
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s4
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vsv_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b32 s4, s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: v_bfe_u32 v0, v0, 10, 10
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s5, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vsv_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6038,19 +6122,33 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_f32(ptr addrspace(1) %out, f
}
define amdgpu_kernel void @v_permlanex16_b32_vss_fi_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_fi_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
; GFX11-SDAG: ; %bb.0:
@@ -6108,32 +6206,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_i64(ptr addrspace(1) %out, i
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_fi_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_fi_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_fi_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6153,19 +6239,35 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_i64(ptr addrspace(1) %out, i
}
define amdgpu_kernel void @v_permlanex16_b32_vss_fi_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_fi_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
; GFX11-SDAG: ; %bb.0:
@@ -6225,34 +6327,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_f64(ptr addrspace(1) %out, d
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_fi_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_fi_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_fi_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6379,19 +6467,33 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_bc_f32(ptr addrspace(1) %out, f
}
define amdgpu_kernel void @v_permlanex16_b32_vss_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -6449,32 +6551,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_bc_i64(ptr addrspace(1) %out, i
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6494,19 +6584,35 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_bc_i64(ptr addrspace(1) %out, i
}
define amdgpu_kernel void @v_permlanex16_b32_vss_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -6566,34 +6672,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_bc_f64(ptr addrspace(1) %out, d
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6720,19 +6812,33 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_f32(ptr addrspace(1) %out
}
define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_i64(ptr addrspace(1) %out, i64 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -6790,32 +6896,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_i64(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -6835,19 +6929,35 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_i64(ptr addrspace(1) %out
}
define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_f64(ptr addrspace(1) %out, double %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s6, s7 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -6907,34 +7017,20 @@ define amdgpu_kernel void @v_permlanex16_b32_vss_fi_bc_f64(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
-; GFX13-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
-; GFX13-NEXT: v_mov_b32_e32 v0, s2
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, s3
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v2, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v3, s6, s7 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 nv
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v0, s2
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s4, s5 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_vss_fi_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7064,18 +7160,31 @@ define amdgpu_kernel void @v_permlane16_b32_tid_tid_f32(ptr addrspace(1) %out, i
}
define amdgpu_kernel void @v_permlane16_b32_tid_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_tid_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -7133,31 +7242,20 @@ define amdgpu_kernel void @v_permlane16_b32_tid_tid_i64(ptr addrspace(1) %out, i
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_tid_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_tid_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_tid_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7179,18 +7277,31 @@ define amdgpu_kernel void @v_permlane16_b32_tid_tid_i64(ptr addrspace(1) %out, i
}
define amdgpu_kernel void @v_permlane16_b32_tid_tid_f64(ptr addrspace(1) %out, float %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_tid_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -7252,32 +7363,21 @@ define amdgpu_kernel void @v_permlane16_b32_tid_tid_f64(ptr addrspace(1) %out, f
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_tid_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_tid_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_tid_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -7412,17 +7512,29 @@ define amdgpu_kernel void @v_permlane16_b32_undef_tid_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_undef_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_undef_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v2, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -7480,30 +7592,20 @@ define amdgpu_kernel void @v_permlane16_b32_undef_tid_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_undef_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v2, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_undef_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_undef_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7526,18 +7628,31 @@ define amdgpu_kernel void @v_permlane16_b32_undef_tid_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_undef_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_undef_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -7599,32 +7714,21 @@ define amdgpu_kernel void @v_permlane16_b32_undef_tid_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_undef_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_undef_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_undef_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -7649,17 +7753,29 @@ define amdgpu_kernel void @v_permlane16_b32_undef_tid_f64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dword v2, v1, s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
; GFX11-SDAG: ; %bb.0:
@@ -7715,29 +7831,19 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_i32(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b32 v2, v1, s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7758,17 +7864,29 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_i32(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x449a5000
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dword v2, v1, s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x449a5000
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
; GFX11-SDAG: ; %bb.0:
@@ -7824,29 +7942,19 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_f32(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b32 v2, v1, s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7868,19 +7976,33 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_f32(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-NEXT: v_mov_b32_e32 v3, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -7938,33 +8060,21 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_i64(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v3, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v3, v[1:2], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v3, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -7987,20 +8097,35 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_i64(ptr addrspace(1) %out, i32
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v3, 0x40934a00
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: v_mov_b32_e32 v4, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v3, v1, s0, s1
-; GFX10-NEXT: v_permlane16_b32 v2, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x40934a00
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -8066,35 +8191,22 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_f64(ptr addrspace(1) %out, i32
; GFX12-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: v_mov_b32_e32 v4, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v3, v1, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v4, v[2:3], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v4, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -8230,17 +8342,29 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_fi_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
; GFX11-SDAG: ; %bb.0:
@@ -8298,30 +8422,20 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_fi_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_fi_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_fi_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -8344,18 +8458,31 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_fi_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
; GFX11-SDAG: ; %bb.0:
@@ -8417,32 +8544,21 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_fi_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_fi_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_fi_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -8578,17 +8694,29 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -8646,30 +8774,20 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -8692,18 +8810,31 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -8765,32 +8896,21 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_bc_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -8926,17 +9046,29 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_f32(ptr addrspace(1) %ou
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -8994,30 +9126,20 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -9040,18 +9162,31 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %ou
}
define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -9113,32 +9248,21 @@ define amdgpu_kernel void @v_permlane16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlane16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlane16_b32_i_tid_fi_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -9272,18 +9396,31 @@ define amdgpu_kernel void @v_permlanex16_b32_tid_tid_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_tid_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_tid_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -9341,31 +9478,20 @@ define amdgpu_kernel void @v_permlanex16_b32_tid_tid_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_tid_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_tid_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_tid_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -9387,18 +9513,31 @@ define amdgpu_kernel void @v_permlanex16_b32_tid_tid_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_tid_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_tid_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -9460,32 +9599,21 @@ define amdgpu_kernel void @v_permlanex16_b32_tid_tid_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_tid_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_tid_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_tid_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -9620,17 +9748,29 @@ define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f32(ptr addrspace(1) %out
}
define amdgpu_kernel void @v_permlanex16_b32_undef_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_undef_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v2, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -9688,30 +9828,20 @@ define amdgpu_kernel void @v_permlanex16_b32_undef_tid_i64(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_undef_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v2, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_undef_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_undef_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -9734,18 +9864,31 @@ define amdgpu_kernel void @v_permlanex16_b32_undef_tid_i64(ptr addrspace(1) %out
}
define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_undef_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -9807,32 +9950,21 @@ define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f64(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_undef_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_undef_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_undef_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -9857,17 +9989,29 @@ define amdgpu_kernel void @v_permlanex16_b32_undef_tid_f64(ptr addrspace(1) %out
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_i32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dword v2, v1, s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
; GFX11-SDAG: ; %bb.0:
@@ -9923,29 +10067,19 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_i32(ptr addrspace(1) %out, i3
; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b32 v2, v1, s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0x3039 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -9966,19 +10100,31 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_i32(ptr addrspace(1) %out, i3
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_f32(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x449a5000
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dword v2, v1, s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x449a5000
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dword v2, v1, s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
;
-; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
+;
+; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30
@@ -10032,29 +10178,19 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_f32(ptr addrspace(1) %out, i3
; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b32 v2, v1, s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x449a5000
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-GISEL-NEXT: global_store_dword v0, v1, s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v1, 0x449a5000 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b32 v2, v1, s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -10076,19 +10212,33 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_f32(ptr addrspace(1) %out, i3
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-NEXT: v_mov_b32_e32 v3, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
; GFX11-SDAG: ; %bb.0:
@@ -10146,33 +10296,21 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_i64(ptr addrspace(1) %out, i3
; GFX12-GISEL-NEXT: global_store_b64 v3, v[1:2], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: v_mov_b32_e32 v3, 0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v3, v[1:2], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x3039
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v3, v[1:2], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0x3039
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v3, 0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v3, v[1:2], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -10195,20 +10333,35 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_i64(ptr addrspace(1) %out, i3
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v3, 0x40934a00
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: v_mov_b32_e32 v4, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v3, v1, s0, s1
-; GFX10-NEXT: v_permlanex16_b32 v2, v0, s0, s1
-; GFX10-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x40934a00
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v1, s0, s1
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v0, s0, s1
+; GFX10-SDAG-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v0, s0, s1
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v1, s0, s1
+; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
; GFX11-SDAG: ; %bb.0:
@@ -10274,35 +10427,22 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_f64(ptr addrspace(1) %out, i3
; GFX12-GISEL-NEXT: global_store_b64 v4, v[2:3], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
-; GFX13-NEXT: v_mov_b32_e32 v4, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v3, v1, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v0, s0, s1
-; GFX13-NEXT: global_store_b64 v4, v[2:3], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x40934a00
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v0, s0, s1
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v1, s0, s1
-; GFX10-GISEL-NEXT: global_store_dwordx2 v4, v[2:3], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_dual_mov_b32 v3, 0x40934a00 :: v_dual_mov_b32 v2, 0
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v4, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v1, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v0, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v4, v[2:3], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -10438,17 +10578,29 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
; GFX11-SDAG: ; %bb.0:
@@ -10506,30 +10658,20 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_fi_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -10552,18 +10694,31 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
; GFX11-SDAG: ; %bb.0:
@@ -10625,32 +10780,21 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_fi_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,0]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -10786,17 +10930,29 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_f32(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -10854,30 +11010,20 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_i64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -10900,31 +11046,44 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_i64(ptr addrspace(1) %out,
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
;
-; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-SDAG-NEXT: s_clause 0x1
-; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30
-; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24
-; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
-; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
+;
+; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-SDAG-NEXT: s_clause 0x1
+; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30
+; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24
+; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX11-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
; GFX11-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX11-SDAG-NEXT: s_endpgm
;
@@ -10973,32 +11132,21 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_bc_f64(ptr addrspace(1) %out,
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[0,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -11134,17 +11282,29 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_f32(ptr addrspace(1) %o
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
; GFX11-SDAG: ; %bb.0:
@@ -11202,30 +11362,20 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %o
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v2, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_clause 0x1
@@ -11248,18 +11398,31 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_i64(ptr addrspace(1) %o
}
define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-NEXT: s_clause 0x1
-; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-NEXT: s_endpgm
+; GFX10-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-SDAG-NEXT: s_clause 0x1
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-SDAG-NEXT: s_endpgm
+;
+; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX10-GISEL-NEXT: s_clause 0x1
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
+; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
+; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
+; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
; GFX11-SDAG: ; %bb.0:
@@ -11321,32 +11484,21 @@ define amdgpu_kernel void @v_permlanex16_b32_i_tid_fi_bc_f64(ptr addrspace(1) %o
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX12-GISEL-NEXT: s_endpgm
;
-; GFX13-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
-; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
-; GFX13-NEXT: v_mov_b32_e32 v2, 0
-; GFX13-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX13-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX13-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX13-NEXT: s_endpgm
-; GFX10-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
-; GFX10-GISEL-NEXT: s_clause 0x1
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x30
-; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
-; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
-; GFX10-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
-; GFX10-GISEL-NEXT: s_endpgm
+; GFX13-SDAG-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x30 nv
+; GFX13-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX13-SDAG-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v1, v1, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v0, v0, s0, s1 op_sel:[1,1]
+; GFX13-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX13-SDAG-NEXT: s_endpgm
+;
; GFX13-GISEL-LABEL: v_permlanex16_b32_i_tid_fi_bc_f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
@@ -11795,15 +11947,25 @@ define void @v_permlanex16_v2f16(ptr addrspace(1) %out, <2 x half> %src0, i32 %s
}
define void @v_permlane16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v2f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v4
-; GFX10-NEXT: v_readfirstlane_b32 s5, v5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v2f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v2f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v2f32:
; GFX11-SDAG: ; %bb.0:
@@ -11859,29 +12021,21 @@ define void @v_permlane16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %s
; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v2f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v4
-; GFX13-NEXT: v_readfirstlane_b32 s1, v5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b64 v[0:1], v[2:3], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v2f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v2f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v4
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v2f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -11902,15 +12056,25 @@ define void @v_permlane16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %s
}
define void @v_permlanex16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v2f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v4
-; GFX10-NEXT: v_readfirstlane_b32 s5, v5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v2f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v2f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlanex16_v2f32:
; GFX11-SDAG: ; %bb.0:
@@ -11966,29 +12130,21 @@ define void @v_permlanex16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %
; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v2f32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v4
-; GFX13-NEXT: v_readfirstlane_b32 s1, v5
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b64 v[0:1], v[2:3], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v2f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v2f32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v4
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v5
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v2f32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12009,21 +12165,37 @@ define void @v_permlanex16_v2f32(ptr addrspace(1) %out, <2 x float> %src0, i32 %
}
define void @v_permlane16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v7i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v9
-; GFX10-NEXT: v_readfirstlane_b32 s5, v10
-; GFX10-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v7i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v9
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v10
+; GFX10-SDAG-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v7i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v7i32:
; GFX11-SDAG: ; %bb.0:
@@ -12107,42 +12279,28 @@ define void @v_permlane16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src
; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v7i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v9
-; GFX13-NEXT: v_readfirstlane_b32 s1, v10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v7i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v7i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v9
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v7i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12170,36 +12328,52 @@ define void @v_permlane16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src
}
define void @v_permlanex16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v7i32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v9
-; GFX10-NEXT: v_readfirstlane_b32 s5, v10
-; GFX10-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v7i32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v9
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v10
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-SDAG-LABEL: v_permlanex16_v7i32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v9
-; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v10
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX11-SDAG-NEXT: s_clause 0x1
+; GFX10-GISEL-LABEL: v_permlanex16_v7i32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_permlanex16_v7i32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v9
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v10
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -12268,42 +12442,28 @@ define void @v_permlanex16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %sr
; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v7i32:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v9
-; GFX13-NEXT: v_readfirstlane_b32 s1, v10
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v7i32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v9
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v10
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v7i32:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v9
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v10
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b96 v[0:1], v[6:8], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v7i32:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12331,147 +12491,279 @@ define void @v_permlanex16_v7i32(ptr addrspace(1) %out, <7 x i32> %src0, i32 %sr
}
define void @v_permlane16_v8i16(ptr addrspace(1) %out, <8 x i16> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v8i16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v8i16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v8i16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_permlane16_v8i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s0, v6
-; GFX11-NEXT: v_readfirstlane_b32 s1, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX11-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX11-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX11-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX11-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-SDAG-LABEL: v_permlane16_v8i16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX11-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_permlane16_v8i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_readfirstlane_b32 s0, v6
-; GFX12-NEXT: v_readfirstlane_b32 s1, v7
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX12-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX12-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX12-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX12-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX11-GISEL-LABEL: v_permlane16_v8i16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v8i16:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v6
-; GFX13-NEXT: v_readfirstlane_b32 s1, v7
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_permlane16_v8i16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX12-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_v8i16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX13-SDAG-LABEL: v_permlane16_v8i16:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX13-GISEL-LABEL: v_permlane16_v8i16:
+; GFX13-GISEL: ; %bb.0:
+; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX13-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX13-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX13-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX13-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-GISEL-NEXT: s_set_pc_i64 s[30:31]
%v = call <8 x i16> @llvm.amdgcn.permlane16.v8i16(<8 x i16> %src0, <8 x i16> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <8 x i16> %v, ptr addrspace(1) %out
ret void
}
define void @v_permlanex16_v8i16(ptr addrspace(1) %out, <8 x i16> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v8i16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v8i16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v8i16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_permlanex16_v8i16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_readfirstlane_b32 s0, v6
-; GFX11-NEXT: v_readfirstlane_b32 s1, v7
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX11-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX11-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX11-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX11-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX11-NEXT: s_setpc_b64 s[30:31]
+; GFX11-SDAG-LABEL: v_permlanex16_v8i16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_permlanex16_v8i16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_readfirstlane_b32 s0, v6
-; GFX12-NEXT: v_readfirstlane_b32 s1, v7
-; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX12-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX12-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX12-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX12-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX11-GISEL-LABEL: v_permlanex16_v8i16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v8i16:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v6
-; GFX13-NEXT: v_readfirstlane_b32 s1, v7
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_permlanex16_v8i16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX12-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX12-SDAG-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX12-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_v8i16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX13-SDAG-LABEL: v_permlanex16_v8i16:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX13-GISEL-LABEL: v_permlanex16_v8i16:
+; GFX13-GISEL: ; %bb.0:
+; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX13-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX13-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX13-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX13-GISEL-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-GISEL-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-GISEL-NEXT: s_set_pc_i64 s[30:31]
%v = call <8 x i16> @llvm.amdgcn.permlanex16.v8i16(<8 x i16> %src0, <8 x i16> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <8 x i16> %v, ptr addrspace(1) %out
ret void
}
define void @v_permlane16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v2i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v2i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v2i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v2i64:
; GFX11-SDAG: ; %bb.0:
@@ -12535,33 +12827,23 @@ define void @v_permlane16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %src
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v2i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v6
-; GFX13-NEXT: v_readfirstlane_b32 s1, v7
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v2i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v2i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v2i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12584,20 +12866,35 @@ define void @v_permlane16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %src
}
define void @v_permlane16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v3i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v8
-; GFX10-NEXT: v_readfirstlane_b32 s5, v9
-; GFX10-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v3i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-SDAG-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v3i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v3i64:
; GFX11-SDAG: ; %bb.0:
@@ -12677,40 +12974,27 @@ define void @v_permlane16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %src
; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v3i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v8
-; GFX13-NEXT: v_readfirstlane_b32 s1, v9
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v3i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v3i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v8
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v9
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v3i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12737,22 +13021,39 @@ define void @v_permlane16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %src
}
define void @v_permlane16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v4f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v10
-; GFX10-NEXT: v_readfirstlane_b32 s5, v11
-; GFX10-NEXT: v_permlane16_b32 v9, v9, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v4f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v10
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v11
+; GFX10-SDAG-NEXT: v_permlane16_b32 v9, v9, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v4f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v10
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v11
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v9, v9, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v4f64:
; GFX11-SDAG: ; %bb.0:
@@ -12840,44 +13141,29 @@ define void @v_permlane16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32 %
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v4f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v10
-; GFX13-NEXT: v_readfirstlane_b32 s1, v11
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v9, v9, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v4f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v10
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v11
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v9, v9, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v4f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v10
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v11
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v9, v9, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v4f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -12906,32 +13192,59 @@ define void @v_permlane16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32 %
}
define void @v_permlane16_v8f64(ptr addrspace(1) %out, <8 x double> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlane16_v8f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v18
-; GFX10-NEXT: v_readfirstlane_b32 s5, v19
-; GFX10-NEXT: v_permlane16_b32 v17, v17, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v16, v16, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v15, v15, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v14, v14, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v13, v13, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v12, v12, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v11, v11, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v10, v10, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v9, v9, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlane16_v8f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v18
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v19
+; GFX10-SDAG-NEXT: v_permlane16_b32 v17, v17, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v16, v16, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v15, v15, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v14, v14, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v13, v13, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v12, v12, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v11, v11, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v10, v10, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v9, v9, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlane16_v8f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v18
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v19
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v9, v9, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v10, v10, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v11, v11, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v12, v12, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v13, v13, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v14, v14, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v15, v15, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v16, v16, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v17, v17, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlane16_v8f64:
; GFX11-SDAG: ; %bb.0:
@@ -13059,64 +13372,39 @@ define void @v_permlane16_v8f64(ptr addrspace(1) %out, <8 x double> %src0, i32 %
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlane16_v8f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v18
-; GFX13-NEXT: v_readfirstlane_b32 s1, v19
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlane16_b32 v17, v17, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v16, v16, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v15, v15, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v14, v14, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v13, v13, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v12, v12, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v11, v11, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v10, v10, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v9, v9, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlane16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x3
-; GFX13-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
-; GFX13-NEXT: global_store_b128 v[0:1], v[10:13], off offset:32
-; GFX13-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlane16_v8f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v18
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v19
-; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v9, v9, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v10, v10, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v11, v11, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v12, v12, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v13, v13, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v14, v14, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v15, v15, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v16, v16, s4, s5
-; GFX10-GISEL-NEXT: v_permlane16_b32 v17, v17, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlane16_v8f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v18
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v19
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlane16_b32 v17, v17, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v16, v16, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v15, v15, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v14, v14, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v13, v13, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v12, v12, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v11, v11, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v10, v10, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v9, v9, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x3
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[10:13], off offset:32
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlane16_v8f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -13155,17 +13443,29 @@ define void @v_permlane16_v8f64(ptr addrspace(1) %out, <8 x double> %src0, i32 %
}
define void @v_permlanex16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v2i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v2i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v2i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlanex16_v2i64:
; GFX11-SDAG: ; %bb.0:
@@ -13229,33 +13529,23 @@ define void @v_permlanex16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %sr
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v2i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v6
-; GFX13-NEXT: v_readfirstlane_b32 s1, v7
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v2i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v6
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v7
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v2i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v6
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v7
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v2i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -13278,20 +13568,35 @@ define void @v_permlanex16_v2i64(ptr addrspace(1) %out, <2 x i64> %src0, i32 %sr
}
define void @v_permlanex16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v3i64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v8
-; GFX10-NEXT: v_readfirstlane_b32 s5, v9
-; GFX10-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v3i64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v3i64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlanex16_v3i64:
; GFX11-SDAG: ; %bb.0:
@@ -13371,40 +13676,27 @@ define void @v_permlanex16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %sr
; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v3i64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v8
-; GFX13-NEXT: v_readfirstlane_b32 s1, v9
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v3i64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v3i64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v8
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v9
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v3i64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -13431,22 +13723,39 @@ define void @v_permlanex16_v3i64(ptr addrspace(1) %out, <3 x i64> %src0, i32 %sr
}
define void @v_permlanex16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v4f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v10
-; GFX10-NEXT: v_readfirstlane_b32 s5, v11
-; GFX10-NEXT: v_permlanex16_b32 v9, v9, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v4f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v10
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v11
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v9, v9, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v4f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v10
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v11
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v9, v9, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlanex16_v4f64:
; GFX11-SDAG: ; %bb.0:
@@ -13534,44 +13843,29 @@ define void @v_permlanex16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v4f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v10
-; GFX13-NEXT: v_readfirstlane_b32 s1, v11
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v9, v9, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x1
-; GFX13-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v4f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v10
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v11
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v9, v9, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v4f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v10
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v11
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v9, v9, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x1
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v4f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -13600,32 +13894,59 @@ define void @v_permlanex16_v4f64(ptr addrspace(1) %out, <4 x double> %src0, i32
}
define void @v_permlanex16_v8f64(ptr addrspace(1) %out, <8 x double> %src0, i32 %src1, i32 %src2) {
-; GFX10-LABEL: v_permlanex16_v8f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_readfirstlane_b32 s4, v18
-; GFX10-NEXT: v_readfirstlane_b32 s5, v19
-; GFX10-NEXT: v_permlanex16_b32 v17, v17, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v16, v16, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v15, v15, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v14, v14, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v13, v13, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v12, v12, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v11, v11, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v10, v10, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v9, v9, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-NEXT: s_setpc_b64 s[30:31]
+; GFX10-SDAG-LABEL: v_permlanex16_v8f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s4, v18
+; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v19
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v17, v17, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v16, v16, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v15, v15, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v14, v14, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v13, v13, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v12, v12, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v11, v11, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v10, v10, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v9, v9, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-SDAG-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_permlanex16_v8f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v18
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v19
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v9, v9, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v10, v10, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v11, v11, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v12, v12, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v13, v13, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v14, v14, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v15, v15, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v16, v16, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v17, v17, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: v_permlanex16_v8f64:
; GFX11-SDAG: ; %bb.0:
@@ -13753,64 +14074,39 @@ define void @v_permlanex16_v8f64(ptr addrspace(1) %out, <8 x double> %src0, i32
; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX13-LABEL: v_permlanex16_v8f64:
-; GFX13: ; %bb.0:
-; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX13-NEXT: s_wait_expcnt 0x0
-; GFX13-NEXT: s_wait_samplecnt 0x0
-; GFX13-NEXT: s_wait_bvhcnt 0x0
-; GFX13-NEXT: s_wait_kmcnt 0x0
-; GFX13-NEXT: v_readfirstlane_b32 s0, v18
-; GFX13-NEXT: v_readfirstlane_b32 s1, v19
-; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX13-NEXT: v_permlanex16_b32 v17, v17, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v16, v16, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v15, v15, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v14, v14, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v13, v13, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v12, v12, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v11, v11, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v10, v10, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v9, v9, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v8, v8, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v7, v7, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v6, v6, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v5, v5, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v4, v4, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v3, v3, s0, s1
-; GFX13-NEXT: v_permlanex16_b32 v2, v2, s0, s1
-; GFX13-NEXT: s_clause 0x3
-; GFX13-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
-; GFX13-NEXT: global_store_b128 v[0:1], v[10:13], off offset:32
-; GFX13-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
-; GFX13-NEXT: global_store_b128 v[0:1], v[2:5], off
-; GFX13-NEXT: s_set_pc_i64 s[30:31]
-; GFX10-GISEL-LABEL: v_permlanex16_v8f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v18
-; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v19
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v8, v8, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v9, v9, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v10, v10, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v11, v11, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v12, v12, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v13, v13, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v14, v14, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v15, v15, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v16, v16, s4, s5
-; GFX10-GISEL-NEXT: v_permlanex16_b32 v17, v17, s4, s5
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[10:13], off offset:32
-; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[14:17], off offset:48
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX13-SDAG-LABEL: v_permlanex16_v8f64:
+; GFX13-SDAG: ; %bb.0:
+; GFX13-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX13-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX13-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s0, v18
+; GFX13-SDAG-NEXT: v_readfirstlane_b32 s1, v19
+; GFX13-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v17, v17, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v16, v16, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v15, v15, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v14, v14, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v13, v13, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v12, v12, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v11, v11, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v10, v10, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v9, v9, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v8, v8, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX13-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX13-SDAG-NEXT: s_clause 0x3
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[14:17], off offset:48
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[10:13], off offset:32
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
+; GFX13-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX13-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
; GFX13-GISEL-LABEL: v_permlanex16_v8f64:
; GFX13-GISEL: ; %bb.0:
; GFX13-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -13934,6 +14230,3 @@ t:
f:
ret void
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX10-SDAG: {{.*}}
-; GFX13-SDAG: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
index 49bbf46c8089c..62b1106c90159 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
@@ -1,7 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10-SDAG %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10-GISEL %s
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu11.00 < %s | FileCheck -check-prefixes=GFX11-SDAG %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu11.00 < %s | FileCheck -check-prefixes=GFX11-GISEL %s
; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=GFX12-SDAG %s
+; RUN: llc -global-isel=1 -amdgpu-load-store-vectorizer=0 -mtriple=amdgpu12.00 < %s | FileCheck -check-prefixes=GFX12-GISEL %s
define void @v_permlane16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %src2) {
; GFX10-SDAG-LABEL: v_permlane16_p0:
@@ -14,6 +17,16 @@ define void @v_permlane16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %s
; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_p0:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_p0:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -25,6 +38,17 @@ define void @v_permlane16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %s
; GFX11-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_p0:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v4
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v5
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -40,6 +64,22 @@ define void @v_permlane16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %s
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_p0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v4
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v5
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr @llvm.amdgcn.permlane16.p0(ptr %src0, ptr %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr %v, ptr addrspace(1) %out
ret void
@@ -56,6 +96,16 @@ define void @v_permlanex16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %
; GFX10-SDAG-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_p0:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v4
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_p0:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -67,6 +117,17 @@ define void @v_permlanex16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %
; GFX11-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_p0:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v4
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v5
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -82,6 +143,22 @@ define void @v_permlanex16_p0(ptr addrspace(1) %out, ptr %src0, i32 %src1, i32 %
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[2:3], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_p0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v4
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v5
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr @llvm.amdgcn.permlanex16.p0(ptr %src0, ptr %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr %v, ptr addrspace(1) %out
ret void
@@ -103,6 +180,21 @@ define void @v_permlane16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src1
; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_v3p0:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_v3p0:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -120,6 +212,23 @@ define void @v_permlane16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src1
; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_v3p0:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v8
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v9
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX11-GISEL-NEXT: s_clause 0x1
+; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_v3p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -141,6 +250,28 @@ define void @v_permlane16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src1
; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_v3p0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v8
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v9
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v5, v5, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v6, v6, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v7, v7, s0, s1
+; GFX12-GISEL-NEXT: s_clause 0x1
+; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr> @llvm.amdgcn.permlane16.v3p0(<3 x ptr> %src0, <3 x ptr> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr> %v, ptr addrspace(1) %out
ret void
@@ -162,6 +293,21 @@ define void @v_permlanex16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src
; GFX10-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_v3p0:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v8
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v9
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v5, v5, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v6, v6, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v7, v7, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
+; GFX10-GISEL-NEXT: global_store_dwordx2 v[0:1], v[6:7], off offset:16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_v3p0:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -179,6 +325,23 @@ define void @v_permlanex16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src
; GFX11-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_v3p0:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v8
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v9
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX11-GISEL-NEXT: s_clause 0x1
+; GFX11-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX11-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_v3p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -200,6 +363,28 @@ define void @v_permlanex16_v3p0(ptr addrspace(1) %out, <3 x ptr> %src0, i32 %src
; GFX12-SDAG-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
; GFX12-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_v3p0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v8
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v9
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v5, v5, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v6, v6, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v7, v7, s0, s1
+; GFX12-GISEL-NEXT: s_clause 0x1
+; GFX12-GISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
+; GFX12-GISEL-NEXT: global_store_b64 v[0:1], v[6:7], off offset:16
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr> @llvm.amdgcn.permlanex16.v3p0(<3 x ptr> %src0, <3 x ptr> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr> %v, ptr addrspace(1) %out
ret void
@@ -215,6 +400,15 @@ define void @v_permlane16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_p3:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_p3:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -225,6 +419,16 @@ define void @v_permlane16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_p3:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_p3:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -239,6 +443,21 @@ define void @v_permlane16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_p3:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(3) @llvm.amdgcn.permlane16.p3(ptr addrspace(3) %src0, ptr addrspace(3) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(3) %v, ptr addrspace(1) %out
ret void
@@ -254,6 +473,15 @@ define void @v_permlanex16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_p3:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_p3:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -264,6 +492,16 @@ define void @v_permlanex16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_p3:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_p3:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -278,6 +516,21 @@ define void @v_permlanex16_p3(ptr addrspace(1) %out, ptr addrspace(3) %src0, i32
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_p3:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(3) @llvm.amdgcn.permlanex16.p3(ptr addrspace(3) %src0, ptr addrspace(3) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(3) %v, ptr addrspace(1) %out
ret void
@@ -295,6 +548,17 @@ define void @v_permlane16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %sr
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_v3p3:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_v3p3:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -307,6 +571,18 @@ define void @v_permlane16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %sr
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_v3p3:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_v3p3:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -323,6 +599,23 @@ define void @v_permlane16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %sr
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_v3p3:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(3)> @llvm.amdgcn.permlane16.v3p3(<3 x ptr addrspace(3)> %src0, <3 x ptr addrspace(3)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(3)> %v, ptr addrspace(1) %out
ret void
@@ -340,6 +633,17 @@ define void @v_permlanex16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %s
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_v3p3:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_v3p3:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -352,6 +656,18 @@ define void @v_permlanex16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %s
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_v3p3:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_v3p3:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -368,6 +684,23 @@ define void @v_permlanex16_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3)> %s
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_v3p3:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(3)> @llvm.amdgcn.permlanex16.v3p3(<3 x ptr addrspace(3)> %src0, <3 x ptr addrspace(3)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(3)> %v, ptr addrspace(1) %out
ret void
@@ -383,6 +716,15 @@ define void @v_permlane16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_p5:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_p5:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -393,6 +735,16 @@ define void @v_permlane16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_p5:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_p5:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -407,6 +759,21 @@ define void @v_permlane16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_p5:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(5) @llvm.amdgcn.permlane16.p5(ptr addrspace(5) %src0, ptr addrspace(5) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(5) %v, ptr addrspace(1) %out
ret void
@@ -422,6 +789,15 @@ define void @v_permlanex16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_p5:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_p5:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -432,6 +808,16 @@ define void @v_permlanex16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_p5:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_p5:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -446,6 +832,21 @@ define void @v_permlanex16_p5(ptr addrspace(1) %out, ptr addrspace(5) %src0, i32
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_p5:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(5) @llvm.amdgcn.permlanex16.p5(ptr addrspace(5) %src0, ptr addrspace(5) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(5) %v, ptr addrspace(1) %out
ret void
@@ -463,6 +864,17 @@ define void @v_permlane16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %sr
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_v3p5:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_v3p5:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -475,6 +887,18 @@ define void @v_permlane16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %sr
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_v3p5:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_v3p5:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -491,6 +915,23 @@ define void @v_permlane16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %sr
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_v3p5:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(5)> @llvm.amdgcn.permlane16.v3p5(<3 x ptr addrspace(5)> %src0, <3 x ptr addrspace(5)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(5)> %v, ptr addrspace(1) %out
ret void
@@ -508,6 +949,17 @@ define void @v_permlanex16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %s
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_v3p5:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_v3p5:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -520,6 +972,18 @@ define void @v_permlanex16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %s
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_v3p5:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_v3p5:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -536,6 +1000,23 @@ define void @v_permlanex16_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5)> %s
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_v3p5:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(5)> @llvm.amdgcn.permlanex16.v3p5(<3 x ptr addrspace(5)> %src0, <3 x ptr addrspace(5)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(5)> %v, ptr addrspace(1) %out
ret void
@@ -551,6 +1032,15 @@ define void @v_permlane16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_p6:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_p6:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -561,6 +1051,16 @@ define void @v_permlane16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_p6:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_p6:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -575,6 +1075,21 @@ define void @v_permlane16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_p6:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(6) @llvm.amdgcn.permlane16.p6(ptr addrspace(6) %src0, ptr addrspace(6) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(6) %v, ptr addrspace(1) %out
ret void
@@ -590,6 +1105,15 @@ define void @v_permlanex16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX10-SDAG-NEXT: global_store_dword v[0:1], v2, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_p6:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v3
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v4
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: global_store_dword v[0:1], v2, off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_p6:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -600,6 +1124,16 @@ define void @v_permlanex16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX11-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_p6:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_p6:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -614,6 +1148,21 @@ define void @v_permlanex16_p6(ptr addrspace(1) %out, ptr addrspace(6) %src0, i32
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b32 v[0:1], v2, off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_p6:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v3
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v4
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: global_store_b32 v[0:1], v2, off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call ptr addrspace(6) @llvm.amdgcn.permlanex16.p6(ptr addrspace(6) %src0, ptr addrspace(6) %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store ptr addrspace(6) %v, ptr addrspace(1) %out
ret void
@@ -631,6 +1180,17 @@ define void @v_permlane16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %sr
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlane16_v3p6:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlane16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlane16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlane16_v3p6:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -643,6 +1203,18 @@ define void @v_permlane16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %sr
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlane16_v3p6:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlane16_v3p6:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -659,6 +1231,23 @@ define void @v_permlane16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %sr
; GFX12-SDAG-NEXT: v_permlane16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlane16_v3p6:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlane16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlane16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(6)> @llvm.amdgcn.permlane16.v3p6(<3 x ptr addrspace(6)> %src0, <3 x ptr addrspace(6)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(6)> %v, ptr addrspace(1) %out
ret void
@@ -676,6 +1265,17 @@ define void @v_permlanex16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %s
; GFX10-SDAG-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX10-GISEL-LABEL: v_permlanex16_v3p6:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s4, v5
+; GFX10-GISEL-NEXT: v_readfirstlane_b32 s5, v6
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v2, v2, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v3, v3, s4, s5
+; GFX10-GISEL-NEXT: v_permlanex16_b32 v4, v4, s4, s5
+; GFX10-GISEL-NEXT: global_store_dwordx3 v[0:1], v[2:4], off
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX11-SDAG-LABEL: v_permlanex16_v3p6:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -688,6 +1288,18 @@ define void @v_permlanex16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %s
; GFX11-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
+; GFX11-GISEL-LABEL: v_permlanex16_v3p6:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX11-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX11-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX12-SDAG-LABEL: v_permlanex16_v3p6:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -704,6 +1316,23 @@ define void @v_permlanex16_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6)> %s
; GFX12-SDAG-NEXT: v_permlanex16_b32 v2, v2, s0, s1
; GFX12-SDAG-NEXT: global_store_b96 v[0:1], v[2:4], off
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_permlanex16_v3p6:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v5
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v6
+; GFX12-GISEL-NEXT: s_wait_alu depctr_va_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v2, v2, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v3, v3, s0, s1
+; GFX12-GISEL-NEXT: v_permlanex16_b32 v4, v4, s0, s1
+; GFX12-GISEL-NEXT: global_store_b96 v[0:1], v[2:4], off
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%v = call <3 x ptr addrspace(6)> @llvm.amdgcn.permlanex16.v3p6(<3 x ptr addrspace(6)> %src0, <3 x ptr addrspace(6)> %src0, i32 %src1, i32 %src2, i1 false, i1 false)
store <3 x ptr addrspace(6)> %v, ptr addrspace(1) %out
ret void
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