[llvm] [DAG][X86] Avoid slow masked-store folds on Zen (PR #214187)

[via llvm-commits]

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@@ -63291,6 +63205,10 @@ bool X86TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
   if (!isTypeLegal(VT))
     return false;
 
+  if (Opc == ISD::MSTORE && Subtarget.isVecMaskStoreSlow() &&
+      !Subtarget.hasAVX512())
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222rohan wrote:

We could. I am not entirely sure if there is ever a use case for disabling AVX512 on Zen processors.

https://github.com/llvm/llvm-project/pull/214187