[llvm] [AArch64] C1-Premium SME definitions (PR #212482)

[Asher Dobrescu via llvm-commits]

https://github.com/Asher8118 requested changes to this pull request.

Thank you for adding in the SME definitions. Some comments based on SVE integer instructions. I am comparing against the SME 2 SWOG, therefore those are related to instructions in streaming-mode:
- Copy is showing the wrong execution information. Currently showing as L5 T1 when the SME2 SWOG suggests L8 T1. Additionally it should be using the PERMF, PERMS pipelines
- Complex add, saturating is showing the incorrect execution information. Currently showing as L3 T1 when it should be L4 T2/3.
- Conditional extract operations, general purpose register should have L12 T1/2 and use the PERMF VX0ALU pipeline
- Conditional extract operations, SIMD&FP scalar and vector forms eg: CLASTB is showing incorrect execution information. It should have L4 T1 and use the PERMF pipeline.
- Divides 64, 32 bit is showing incorrect execution information. It should have L11 T1/11 and use the MC pipeline.
- Duplicate, scalar form is showing incorrect throughput, it should be 3
- I would like to see an example of `TBX` in the tests.
- Transpose, vector form is showing incorrect execution information. It should have L4 T1 and use pipeline PERMS.
- Similarly for unpack and extend, it is showing incorrect execution information. It should have L4 T2and use pipeline PERMS.
- Similarly for zip/unzip, it is showing incorrect execution information. It should have L4 T2 and use pipeline PERMS.

For all of the instructions in my above comment, I did not mention them in the diff because I could not find tests for them. Please add tests in the relevant places.

https://github.com/llvm/llvm-project/pull/212482