[llvm] [AVR] Support stack realignment (PR #187129)
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 5 04:30:09 PDT 2026
benshi001 wrote:
> Thanks for the review!
>
> > I got two failures in make check-llvm-codegen-avr -j against this patch.
>
> Interesting - this works fine on my end:
>
> ```
> ./build/bin/llvm-lit ./llvm/test/CodeGen/AV
> ```
>
> Can you check again? (I've just rebased and force-pushed)
>
> > The initial value 22 is stored to (Y+2):(Y+1), but avr-gcc stores 22 to (Y+11):(Y+10).
>
> Maybe this has changed between avr-gcc versions? Checking on avr-gcc 15.2.0, I can see that both we and GCC allocate `a` into (Y+2):(Y+1) and `d` into `(Z+1):(Z)`. I'm compiling this way:
>
> ```shell
> avr-gcc \
> -mmcu=atmega2560 \
> -O \
> -S \
> test.c \
> -o test-gcc.s
>
> ./build/bin/clang \
> --target=avr-none \
> -mmcu=atmega2560 \
> -O \
> -S \
> test.c \
> -mllvm -verify-machineinstrs \
> -o test-clang.s
> ```
>
> > Do you still have the previous implementation which hold the frame pointer in an extra register pair ?
>
> Sure! Here you go:
>
> https://github.com/Patryk27/llvm-project/tree/avr-alloca-align-old
>
> > As your previous implementation, can we keep the frame pointer in R3:R2 for avr devices, while R19:R18 for avr tiny devices?
>
> Since the newer approach relies on LLVM's register allocator:
>
> ```c++
> AFI->AlignedStackReg =
> MF.getRegInfo().createVirtualRegister(&AVR::DLDREGSRegClass);
> ```
>
> ... I'm not sure if there's a way to nudge it towards preferring a specific register - perhaps we could create a dedicated register class instead of piggy-backing on `DLDREGSRegClass`?
>
> > This is really a complex bug, I feel sorry that it costs you so much time.
>
> No problemo - I'm actually glad it took a while to find a solution, because it allowed me to learn a lot about LLVM internals!
Did you build llvm with `-DLLVM_ENABLE_EXPENSIVE_CHECKS=On` ? If so `make check-llvm-codegen-avr` would crash, otherwise it would work.
https://github.com/llvm/llvm-project/pull/187129
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