[llvm] [SPIR-V] Fix truncation of nonzero constant bool argument in group builtins (PR #214142)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk updated https://github.com/llvm/llvm-project/pull/214142

>From 0918246a10233673a90f9f1c3e83242a26385eac Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Wed, 5 Aug 2026 09:13:14 +0200
Subject: [PATCH 1/2] [SPIR-V] Fix truncation of nonzero constant bool argument
 in group builtins

buildConstantInt truncated the raw constant to its low bit instead of testing it against zero, silently miscompiling calls like work_group_all(4) to false
---
 llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp              | 2 +-
 llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index c482807c02ec6..a18a5feb4fa8a 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -1383,7 +1383,7 @@ static bool generateGroupInst(const SPIRV::IncomingCall *Call,
     MachineInstr *ArgInstruction = getDefInstrMaybeConstant(BoolReg, MRI);
     if (ArgInstruction->getOpcode() == TargetOpcode::G_CONSTANT) {
       if (BoolRegType->getOpcode() != SPIRV::OpTypeBool)
-        Arg0 = GR->buildConstantInt(getIConstVal(BoolReg, MRI), MIRBuilder,
+        Arg0 = GR->buildConstantInt(getIConstVal(BoolReg, MRI) != 0, MIRBuilder,
                                     BoolType, true);
     } else {
       if (BoolRegType->getOpcode() == SPIRV::OpTypeInt) {
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
index 2a503a189906d..961b9e6eb432d 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
@@ -14,12 +14,14 @@
 ; CHECK-SPIRV: %[[#]] = OpGroupAny %[[#BoolTypeID]] %[[#]] %[[#True]]
 ; CHECK-SPIRV: %[[#]] = OpGroupAll %[[#BoolTypeID]] %[[#]] %[[#True]]
 ; CHECK-SPIRV: %[[#]] = OpGroupAny %[[#BoolTypeID]] %[[#]] %[[#False]]
+; CHECK-SPIRV: %[[#]] = OpGroupAll %[[#BoolTypeID]] %[[#]] %[[#True]]
 define spir_kernel void @test(ptr addrspace(1) nocapture readnone %i) {
 entry:
   %call = tail call spir_func i32 @_Z14work_group_alli(i32 5)
   %call1 = tail call spir_func i32 @_Z14work_group_anyi(i32 5)
   %call3 = tail call spir_func i32 @__spirv_GroupAll(i32 0, i1 1)
   %call4 = tail call spir_func i32 @__spirv_GroupAny(i32 0, i1 0)
+  %call5 = tail call spir_func i32 @_Z14work_group_alli(i32 4)
   ret void
 }
 

>From 2f13d2e6820b050550135729a9e4b2f337606d3a Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Wed, 5 Aug 2026 10:52:30 +0200
Subject: [PATCH 2/2] Add new test

---
 llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
index 961b9e6eb432d..8ab2ecb9f1ad7 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAllAny.ll
@@ -15,6 +15,7 @@
 ; CHECK-SPIRV: %[[#]] = OpGroupAll %[[#BoolTypeID]] %[[#]] %[[#True]]
 ; CHECK-SPIRV: %[[#]] = OpGroupAny %[[#BoolTypeID]] %[[#]] %[[#False]]
 ; CHECK-SPIRV: %[[#]] = OpGroupAll %[[#BoolTypeID]] %[[#]] %[[#True]]
+; CHECK-SPIRV: %[[#]] = OpGroupAny %[[#BoolTypeID]] %[[#]] %[[#True]]
 define spir_kernel void @test(ptr addrspace(1) nocapture readnone %i) {
 entry:
   %call = tail call spir_func i32 @_Z14work_group_alli(i32 5)
@@ -22,6 +23,7 @@ entry:
   %call3 = tail call spir_func i32 @__spirv_GroupAll(i32 0, i1 1)
   %call4 = tail call spir_func i32 @__spirv_GroupAny(i32 0, i1 0)
   %call5 = tail call spir_func i32 @_Z14work_group_alli(i32 4)
+  %call6 = tail call spir_func i32 @_Z14work_group_anyi(i32 4)
   ret void
 }