[llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)

[Phoebe Wang via llvm-commits]

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@@ -1,53 +1,76 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,NODQ,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,NODQ,AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512BW,AVX512DQ
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phoebewang wrote:

I assume we don't need DQ/NODQ change given we don't touch i64 in this patch?

https://github.com/llvm/llvm-project/pull/205263