[llvm] [LoongArch][NFC] Add tests for vector extraction with zero extension (PR #214119)
via llvm-commits
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Tue Aug 4 19:51:36 PDT 2026
https://github.com/heiher created https://github.com/llvm/llvm-project/pull/214119
None
>From 1c7ac386dcf0577614743ac07793c049ef18dfe3 Mon Sep 17 00:00:00 2001
From: WANG Rui <wangrui at loongson.cn>
Date: Wed, 5 Aug 2026 10:28:31 +0800
Subject: [PATCH] [LoongArch][NFC] Add tests for vector extraction with zero
extension
---
.../lasx/ir-instruction/extractelement.ll | 107 ++++++++++++++++++
.../lsx/ir-instruction/extractelement.ll | 64 +++++++++++
2 files changed, 171 insertions(+)
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
index 9634605dddfdc..826c4fe0a315d 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
@@ -243,6 +243,113 @@ define void @extract_4xdouble_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
ret void
}
+define void @vextract_32xi8_zext(ptr %src, ptr %dst) nounwind {
+; CHECK-LABEL: vextract_32xi8_zext:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 0
+; CHECK-NEXT: andi $a0, $a0, 255
+; CHECK-NEXT: st.w $a0, $a1, 0
+; CHECK-NEXT: ret
+entry:
+ %0 = load volatile <32 x i8>, ptr %src
+ %1 = extractelement <32 x i8> %0, i64 0
+ %2 = zext i8 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @vextract_32xi8_zext_hi(ptr %src, ptr %dst) nounwind {
+; CHECK-LABEL: vextract_32xi8_zext_hi:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a0, 0
+; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
+; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 0
+; CHECK-NEXT: andi $a0, $a0, 255
+; CHECK-NEXT: st.w $a0, $a1, 0
+; CHECK-NEXT: ret
+entry:
+ %0 = load volatile <32 x i8>, ptr %src
+ %1 = extractelement <32 x i8> %0, i64 16
+ %2 = zext i8 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @vextract_16xi16_zext(ptr %src, ptr %dst) nounwind {
+; LA32-LABEL: vextract_16xi16_zext:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: xvld $xr0, $a0, 0
+; LA32-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
+; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: vextract_16xi16_zext:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: xvld $xr0, $a0, 0
+; LA64-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
+; LA64-NEXT: st.w $a0, $a1, 0
+; LA64-NEXT: ret
+entry:
+ %0 = load volatile <16 x i16>, ptr %src
+ %1 = extractelement <16 x i16> %0, i64 0
+ %2 = zext i16 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @vextract_16xi16_zext_hi(ptr %src, ptr %dst) nounwind {
+; LA32-LABEL: vextract_16xi16_zext_hi:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: xvld $xr0, $a0, 0
+; LA32-NEXT: xvpermi.d $xr0, $xr0, 14
+; LA32-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
+; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: vextract_16xi16_zext_hi:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: xvld $xr0, $a0, 0
+; LA64-NEXT: xvpermi.d $xr0, $xr0, 14
+; LA64-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
+; LA64-NEXT: st.w $a0, $a1, 0
+; LA64-NEXT: ret
+entry:
+ %0 = load volatile <16 x i16>, ptr %src
+ %1 = extractelement <16 x i16> %0, i64 8
+ %2 = zext i16 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @vextract_8xi32_zext(ptr %src, ptr %dst) nounwind {
+; LA32-LABEL: vextract_8xi32_zext:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: xvld $xr0, $a0, 0
+; LA32-NEXT: xvpickve2gr.w $a0, $xr0, 0
+; LA32-NEXT: st.w $zero, $a1, 4
+; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: vextract_8xi32_zext:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: xvld $xr0, $a0, 0
+; LA64-NEXT: xvpickve2gr.w $a0, $xr0, 0
+; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
+; LA64-NEXT: st.d $a0, $a1, 0
+; LA64-NEXT: ret
+entry:
+ %0 = load volatile <8 x i32>, ptr %src
+ %1 = extractelement <8 x i32> %0, i64 0
+ %2 = zext i32 %1 to i64
+ store i64 %2, ptr %dst
+ ret void
+}
+
define void @eliminate_frame_index(<8 x i32> %a) nounwind {
; LA32-LABEL: eliminate_frame_index:
; LA32: # %bb.0:
diff --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
index b25c2da9761b5..75ef121ed64e2 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
@@ -233,6 +233,70 @@ define void @extract_2xdouble_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
ret void
}
+define void @extract_16xi8_zext(ptr %src, ptr %dst) nounwind {
+; CHECK-LABEL: extract_16xi8_zext:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vld $vr0, $a0, 0
+; CHECK-NEXT: vpickve2gr.b $a0, $vr0, 0
+; CHECK-NEXT: andi $a0, $a0, 255
+; CHECK-NEXT: st.w $a0, $a1, 0
+; CHECK-NEXT: ret
+entry:
+ %0 = load volatile <16 x i8>, ptr %src
+ %1 = extractelement <16 x i8> %0, i64 0
+ %2 = zext i8 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @extract_8xi16_zext(ptr %src, ptr %dst) nounwind {
+; LA32-LABEL: extract_8xi16_zext:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vld $vr0, $a0, 0
+; LA32-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
+; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extract_8xi16_zext:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vld $vr0, $a0, 0
+; LA64-NEXT: vpickve2gr.h $a0, $vr0, 0
+; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
+; LA64-NEXT: st.w $a0, $a1, 0
+; LA64-NEXT: ret
+entry:
+ %0 = load volatile <8 x i16>, ptr %src
+ %1 = extractelement <8 x i16> %0, i64 0
+ %2 = zext i16 %1 to i32
+ store i32 %2, ptr %dst
+ ret void
+}
+
+define void @extract_4xi32_zext(ptr %src, ptr %dst) nounwind {
+; LA32-LABEL: extract_4xi32_zext:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vld $vr0, $a0, 0
+; LA32-NEXT: vpickve2gr.w $a0, $vr0, 0
+; LA32-NEXT: st.w $zero, $a1, 4
+; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: extract_4xi32_zext:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vld $vr0, $a0, 0
+; LA64-NEXT: vpickve2gr.w $a0, $vr0, 0
+; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
+; LA64-NEXT: st.d $a0, $a1, 0
+; LA64-NEXT: ret
+entry:
+ %0 = load volatile <4 x i32>, ptr %src
+ %1 = extractelement <4 x i32> %0, i64 0
+ %2 = zext i32 %1 to i64
+ store i64 %2, ptr %dst
+ ret void
+}
+
define void @eliminate_frame_index(<4 x i32> %a) nounwind {
; LA32-LABEL: eliminate_frame_index:
; LA32: # %bb.0:
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