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@@ -6898,7 +6908,58 @@ bool AMDGPULegalizerInfo::legalizeBufferLoad(MachineInstr &MI,
}
}
- if (IsTFE) {
+ if (IsTFE && IsD16 && Ty.isVector()) {
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aobolensk wrote:
Yes, renamed the PR
https://github.com/llvm/llvm-project/pull/211465