[llvm] [AArch64][GlobalISel] Legalize <8 x i1> and <16 x i1> loads and stores (PR #210514)

[Ömer Sinan Ağacan via llvm-commits]

https://github.com/osa1 commented:

I've had this on my TODO list for a while now:

```
define i128 @f1() {
entry:
  %0 = bitcast <128 x i1> zeroinitializer to i128
  ret i128 %0
}
```

This is generated by clang from real code. With this PR I think it may just be a matter of extending the handled type sets? If so it would be good to cover this case as well (but maybe in the bitcast PR that I've been requesting in my inline comments, not here)

https://github.com/llvm/llvm-project/pull/210514