[llvm] [X86] Replace custom AND/OR/XOR reduction pattern matching with ISD::VECREDUCE_AND/OR/XOR support (PR #199544)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 4 06:14:31 PDT 2026

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https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/199544

Previous message: [llvm] [InstCombine] Evaluate zext nneg as sext where possible (PR #212230)
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