[llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)
Ankit Kumar Tiwari via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 3 19:50:49 PDT 2026
https://github.com/ankit-cybertron updated https://github.com/llvm/llvm-project/pull/211863
>From 58daf0d3d544b41838b35621e62b95393bafb9e8 Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Fri, 24 Jul 2026 22:25:53 +0530
Subject: [PATCH 1/7] Refactor vector call test to use -force-vector-width
---
.../X86/libm-vector-calls-VF2-VF8.ll | 511 +++++-
.../X86/libm-vector-calls-finite.ll | 722 +++++++-
.../LoopVectorize/X86/libm-vector-calls.ll | 1581 ++++++++++++++---
3 files changed, 2470 insertions(+), 344 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
index 5f7261240e3d4..53e7fc0d82bed 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
@@ -1,12 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @sin_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f64(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @sin_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -32,9 +56,27 @@ for.end:
define void @sin_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f32(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @sin_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -59,9 +101,32 @@ for.end:
!23 = !{!"llvm.loop.vectorize.enable"}
define void @sin_f64_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f64_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @sin_f64_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -86,9 +151,27 @@ for.end:
!33 = !{!"llvm.loop.vectorize.enable"}
define void @sin_f32_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f32_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @sin_f32_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -113,9 +196,32 @@ for.end:
!43 = !{!"llvm.loop.vectorize.enable"}
define void @cos_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f64(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @cos_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -140,9 +246,27 @@ for.end:
!53 = !{!"llvm.loop.vectorize.enable"}
define void @cos_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f32(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @cos_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -167,9 +291,32 @@ for.end:
!63 = !{!"llvm.loop.vectorize.enable"}
define void @cos_f64_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f64_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @cos_f64_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -194,9 +341,27 @@ for.end:
!73 = !{!"llvm.loop.vectorize.enable"}
define void @cos_f32_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f32_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @cos_f32_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -222,9 +387,28 @@ for.end:
define void @exp_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f32
-; CHECK-LABEL: vector.body
-; CHECK: <8 x float> @_ZGVdN8v_expf
+; CHECK-LABEL: define void @exp_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -248,9 +432,28 @@ for.end:
!93 = !{!"llvm.loop.vectorize.enable"}
define void @exp_f32_intrin(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f32_intrin
-; CHECK-LABEL: vector.body
-; CHECK: <8 x float> @_ZGVdN8v_expf
+; CHECK-LABEL: define void @exp_f32_intrin(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -275,9 +478,28 @@ for.end:
define void @log_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @log_f32
-; CHECK-LABEL: vector.body
-; CHECK: <8 x float> @_ZGVdN8v_logf
+; CHECK-LABEL: define void @log_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -301,9 +523,50 @@ for.end:
!113 = !{!"llvm.loop.vectorize.enable"}
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f32
-; CHECK-LABEL: vector.body
-; CHECK: <8 x float> @_ZGVdN8vv_powf
+; CHECK-LABEL: define void @pow_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK: [[VECTOR_MEMCHECK]]:
+; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -329,9 +592,50 @@ for.end:
!123 = !{!"llvm.loop.vectorize.enable"}
define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f32_intrin
-; CHECK-LABEL: vector.body
-; CHECK: <8 x float> @_ZGVdN8vv_powf
+; CHECK-LABEL: define void @pow_f32_intrin(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK: [[VECTOR_MEMCHECK]]:
+; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR4:[0-9]+]]
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -357,9 +661,32 @@ for.end:
!133 = !{!"llvm.loop.vectorize.enable"}
define void @tan_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @tan_f64(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @tan_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -385,9 +712,27 @@ for.end:
define void @tan_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @tan_f32(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @tan_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -412,9 +757,32 @@ for.end:
!153 = !{!"llvm.loop.vectorize.enable"}
define void @tan_f64_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @tan_f64_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP4:%.*]])
+; CHECK-LABEL: define void @tan_f64_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
+; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
+; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -439,9 +807,27 @@ for.end:
!163 = !{!"llvm.loop.vectorize.enable"}
define void @tan_f32_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @tan_f32_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP4:%.*]])
+; CHECK-LABEL: define void @tan_f32_intrinsic(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[FOR_END:.*]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
;
entry:
br label %for.body
@@ -478,3 +864,26 @@ declare float @tanf(float) #0
declare float @expf(float) #0
declare float @powf(float, float) #0
declare float @logf(float) #0
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
+; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
+; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
+; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
+; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
+; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
+; CHECK: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
+; CHECK: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+; CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
+; CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]], [[META2]]}
+; CHECK: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
+; CHECK: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]], [[META2]]}
+;.
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
index 176ce4e05299f..3bf279539f0db 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
@@ -1,12 +1,82 @@
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @exp_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v___expf_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @exp_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i32 0
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i32 1
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__expf_finite(float [[TMP1]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__expf_finite(float [[TMP3]]) #[[ATTR0]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @exp_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___expf_finite(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @exp_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___expf_finite(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -19,21 +89,102 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!1 = distinct !{!1, !2, !3}
-!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.enable"}
-
define void @exp_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f64
-; CHECK-LABEL: vector.body
-; CHECK: <4 x double> @_ZGVdN4v___exp_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @exp_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___exp_finite(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @exp_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___exp_finite(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @exp_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i32 0
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i32 1
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i32 2
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i32 3
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i32 4
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i32 5
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i32 6
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i32 7
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__exp_finite(double [[TMP1]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__exp_finite(double [[TMP9]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__exp_finite(double [[TMP3]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__exp_finite(double [[TMP11]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__exp_finite(double [[TMP5]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__exp_finite(double [[TMP13]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__exp_finite(double [[TMP7]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__exp_finite(double [[TMP15]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -46,21 +197,84 @@ for.body:
store double %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !11
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!11 = distinct !{!11, !12, !13}
-!12 = !{!"llvm.loop.vectorize.width", i32 4}
-!13 = !{!"llvm.loop.vectorize.enable"}
-
define void @log_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @log_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v___logf_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @log_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i32 0
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i32 1
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__logf_finite(float [[TMP1]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__logf_finite(float [[TMP3]]) #[[ATTR1]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___logf_finite(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___logf_finite(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -73,21 +287,102 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!21 = distinct !{!21, !22, !23}
-!22 = !{!"llvm.loop.vectorize.width", i32 4}
-!23 = !{!"llvm.loop.vectorize.enable"}
-
define void @log_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @log_f64
-; CHECK-LABEL: vector.body
-; CHECK: <4 x double> @_ZGVdN4v___log_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @log_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___log_finite(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___log_finite(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i32 0
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i32 1
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i32 2
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i32 3
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i32 4
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i32 5
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i32 6
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i32 7
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__log_finite(double [[TMP1]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__log_finite(double [[TMP9]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__log_finite(double [[TMP3]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__log_finite(double [[TMP11]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__log_finite(double [[TMP5]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__log_finite(double [[TMP13]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__log_finite(double [[TMP7]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__log_finite(double [[TMP15]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -100,21 +395,153 @@ for.body:
store double %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!31 = distinct !{!31, !32, !33}
-!32 = !{!"llvm.loop.vectorize.width", i32 4}
-!33 = !{!"llvm.loop.vectorize.enable"}
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4vv___powf_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @pow_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP1]], i32 1
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 1
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = tail call fast float @__powf_finite(float [[TMP4]], float [[TMP7]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = tail call fast float @__powf_finite(float [[TMP3]], float [[TMP6]]) #[[ATTR2]]
+; CHECK-VF2-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0
+; CHECK-VF2-NEXT: [[TMP10:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP8]], i32 1
+; CHECK-VF2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP10]], ptr [[TMP11]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR2]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store float [[TMP4]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv___powf_finite(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv___powf_finite(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -129,21 +556,176 @@ for.body:
store float %tmp2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!41 = distinct !{!41, !42, !43}
-!42 = !{!"llvm.loop.vectorize.width", i32 4}
-!43 = !{!"llvm.loop.vectorize.enable"}
-
define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f64
-; CHECK-LABEL: vector.body
-; CHECK: <4 x double> @_ZGVdN4vv___pow_finite
-; CHECK: ret
+; CHECK-VF2-LABEL: define void @pow_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x double> @_ZGVbN2vv___pow_finite(<2 x double> [[TMP1]], <2 x double> [[WIDE_LOAD]])
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store double [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x double>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x double> @_ZGVdN4vv___pow_finite(<4 x double> [[TMP1]], <4 x double> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store double [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 64
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = extractelement <8 x double> [[TMP1]], i32 0
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP1]], i32 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = extractelement <8 x double> [[TMP1]], i32 2
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = extractelement <8 x double> [[TMP1]], i32 3
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = extractelement <8 x double> [[TMP1]], i32 4
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP1]], i32 5
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = extractelement <8 x double> [[TMP1]], i32 6
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP1]], i32 7
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x double>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 0
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 1
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 2
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 3
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 4
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 5
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 6
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 7
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = tail call fast double @__pow_finite(double [[TMP10]], double [[TMP22]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__pow_finite(double [[TMP3]], double [[TMP12]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = tail call fast double @__pow_finite(double [[TMP4]], double [[TMP13]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__pow_finite(double [[TMP19]], double [[TMP24]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = tail call fast double @__pow_finite(double [[TMP6]], double [[TMP15]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = tail call fast double @__pow_finite(double [[TMP7]], double [[TMP16]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = tail call fast double @__pow_finite(double [[TMP21]], double [[TMP25]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = tail call fast double @__pow_finite(double [[TMP9]], double [[TMP18]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP27:%.*]] = insertelement <8 x double> poison, double [[TMP5]], i32 0
+; CHECK-VF8-NEXT: [[TMP28:%.*]] = insertelement <8 x double> [[TMP27]], double [[TMP8]], i32 1
+; CHECK-VF8-NEXT: [[TMP29:%.*]] = insertelement <8 x double> [[TMP28]], double [[TMP11]], i32 2
+; CHECK-VF8-NEXT: [[TMP30:%.*]] = insertelement <8 x double> [[TMP29]], double [[TMP14]], i32 3
+; CHECK-VF8-NEXT: [[TMP31:%.*]] = insertelement <8 x double> [[TMP30]], double [[TMP17]], i32 4
+; CHECK-VF8-NEXT: [[TMP32:%.*]] = insertelement <8 x double> [[TMP31]], double [[TMP20]], i32 5
+; CHECK-VF8-NEXT: [[TMP33:%.*]] = insertelement <8 x double> [[TMP32]], double [[TMP23]], i32 6
+; CHECK-VF8-NEXT: [[TMP34:%.*]] = insertelement <8 x double> [[TMP33]], double [[TMP26]], i32 7
+; CHECK-VF8-NEXT: [[TMP35:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP34]], ptr [[TMP35]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP36]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store double [[TMP10]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -158,19 +740,51 @@ for.body:
store double %tmp2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!51 = distinct !{!51, !52, !53}
-!52 = !{!"llvm.loop.vectorize.width", i32 4}
-!53 = !{!"llvm.loop.vectorize.enable"}
-
declare float @__expf_finite(float) #0
declare double @__exp_finite(double) #0
declare float @__logf_finite(float) #0
declare double @__log_finite(double) #0
declare float @__powf_finite(float, float) #0
declare double @__pow_finite(double, double) #0
+;.
+; CHECK-VF2: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF2: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF2: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF2: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
+; CHECK-VF2: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
+;.
+; CHECK-VF4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF4: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF4: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
+; CHECK-VF4: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
+;.
+; CHECK-VF8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF8: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF8: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
+; CHECK-VF8: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
+;.
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index be9d90a71eb33..d4be8ef2e3e5d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -1,12 +1,77 @@
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @sin_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f64(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @sin_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @sin_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @sin_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -20,21 +85,78 @@ for.body:
store double %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!1 = distinct !{!1, !2, !3}
-!2 = !{!"llvm.loop.vectorize.width", i32 4}
-!3 = !{!"llvm.loop.vectorize.enable"}
-
-
define void @sin_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f32(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @sin_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @sin_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @sin_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -48,20 +170,78 @@ for.body:
store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!21 = distinct !{!21, !22, !23}
-!22 = !{!"llvm.loop.vectorize.width", i32 4}
-!23 = !{!"llvm.loop.vectorize.enable"}
-
define void @sin_f64_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f64_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @sin_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @sin_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @sin_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -75,20 +255,78 @@ for.body:
store double %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!31 = distinct !{!31, !32, !33}
-!32 = !{!"llvm.loop.vectorize.width", i32 4}
-!33 = !{!"llvm.loop.vectorize.enable"}
-
define void @sin_f32_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @sin_f32_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @sin_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @sin_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @sin_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -102,20 +340,78 @@ for.body:
store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!41 = distinct !{!41, !42, !43}
-!42 = !{!"llvm.loop.vectorize.width", i32 4}
-!43 = !{!"llvm.loop.vectorize.enable"}
-
define void @cos_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f64(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @cos_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cos_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cos_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -129,20 +425,78 @@ for.body:
store double %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!51 = distinct !{!51, !52, !53}
-!52 = !{!"llvm.loop.vectorize.width", i32 4}
-!53 = !{!"llvm.loop.vectorize.enable"}
-
define void @cos_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f32(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @cos_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cos_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cos_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -156,20 +510,78 @@ for.body:
store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !61
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!61 = distinct !{!61, !62, !63}
-!62 = !{!"llvm.loop.vectorize.width", i32 4}
-!63 = !{!"llvm.loop.vectorize.enable"}
-
define void @cos_f64_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f64_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @cos_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cos_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cos_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -183,20 +595,78 @@ for.body:
store double %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !71
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!71 = distinct !{!71, !72, !73}
-!72 = !{!"llvm.loop.vectorize.width", i32 4}
-!73 = !{!"llvm.loop.vectorize.enable"}
-
define void @cos_f32_intrinsic(ptr nocapture %varray) {
-; CHECK-LABEL: @cos_f32_intrinsic(
-; CHECK-LABEL: vector.body
-; CHECK: [[TMP5:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF2-LABEL: define void @cos_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cos_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cos_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -210,21 +680,79 @@ for.body:
store float %call, ptr %arrayidx, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !81
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!81 = distinct !{!81, !82, !83}
-!82 = !{!"llvm.loop.vectorize.width", i32 4}
-!83 = !{!"llvm.loop.vectorize.enable"}
-
-
define void @exp_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_expf
+; CHECK-VF2-LABEL: define void @exp_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @exp_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @exp_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -237,20 +765,79 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !91
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!91 = distinct !{!91, !92, !93}
-!92 = !{!"llvm.loop.vectorize.width", i32 4}
-!93 = !{!"llvm.loop.vectorize.enable"}
-
define void @exp_f32_intrin(ptr nocapture %varray) {
-; CHECK-LABEL: @exp_f32_intrin
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_expf
+; CHECK-VF2-LABEL: define void @exp_f32_intrin(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @exp_f32_intrin(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @exp_f32_intrin(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -263,21 +850,79 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !101
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!101 = distinct !{!101, !102, !103}
-!102 = !{!"llvm.loop.vectorize.width", i32 4}
-!103 = !{!"llvm.loop.vectorize.enable"}
-
-
define void @log_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @log_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_logf
+; CHECK-VF2-LABEL: define void @log_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -290,20 +935,145 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !111
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!111 = distinct !{!111, !112, !113}
-!112 = !{!"llvm.loop.vectorize.width", i32 4}
-!113 = !{!"llvm.loop.vectorize.enable"}
-
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4vv_powf
+; CHECK-VF2-LABEL: define void @pow_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -318,20 +1088,145 @@ for.body:
store float %tmp2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !121
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!121 = distinct !{!121, !122, !123}
-!122 = !{!"llvm.loop.vectorize.width", i32 4}
-!123 = !{!"llvm.loop.vectorize.enable"}
-
define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-LABEL: @pow_f32_intrin
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4vv_powf
+; CHECK-VF2-LABEL: define void @pow_f32_intrin(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f32_intrin(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f32_intrin(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
entry:
br label %for.body
@@ -346,16 +1241,12 @@ for.body:
store float %tmp2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !131
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!131 = distinct !{!131, !132, !133}
-!132 = !{!"llvm.loop.vectorize.width", i32 4}
-!133 = !{!"llvm.loop.vectorize.enable"}
-
attributes #0 = { nounwind readnone }
declare double @sin(double) #0
@@ -378,9 +1269,23 @@ declare float @acoshf(float) #0
declare float @atanhf(float) #0
define void @erf_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @erf_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_erff
+; CHECK-LABEL: define void @erf_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @erff(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -393,20 +1298,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !134
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!134 = distinct !{!134, !135, !136}
-!135 = !{!"llvm.loop.vectorize.width", i32 4}
-!136 = !{!"llvm.loop.vectorize.enable"}
-
define void @erfc_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @erfc_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_erfcf
+; CHECK-LABEL: define void @erfc_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @erfcf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -419,20 +1334,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !137
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!137 = distinct !{!137, !138, !139}
-!138 = !{!"llvm.loop.vectorize.width", i32 4}
-!139 = !{!"llvm.loop.vectorize.enable"}
-
define void @cbrt_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @cbrt_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_cbrtf
+; CHECK-LABEL: define void @cbrt_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @cbrtf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -445,20 +1370,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !140
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!140 = distinct !{!140, !141, !142}
-!141 = !{!"llvm.loop.vectorize.width", i32 4}
-!142 = !{!"llvm.loop.vectorize.enable"}
-
define void @expm1_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @expm1_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_expm1f
+; CHECK-LABEL: define void @expm1_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @expm1f(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -471,20 +1406,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !143
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!143 = distinct !{!143, !144, !145}
-!144 = !{!"llvm.loop.vectorize.width", i32 4}
-!145 = !{!"llvm.loop.vectorize.enable"}
-
define void @log1p_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @log1p_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_log1pf
+; CHECK-LABEL: define void @log1p_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @log1pf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -497,20 +1442,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !146
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!146 = distinct !{!146, !147, !148}
-!147 = !{!"llvm.loop.vectorize.width", i32 4}
-!148 = !{!"llvm.loop.vectorize.enable"}
-
define void @asinh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @asinh_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_asinhf
+; CHECK-LABEL: define void @asinh_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @asinhf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -523,20 +1478,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !149
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!149 = distinct !{!149, !150, !151}
-!150 = !{!"llvm.loop.vectorize.width", i32 4}
-!151 = !{!"llvm.loop.vectorize.enable"}
-
define void @acosh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @acosh_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_acoshf
+; CHECK-LABEL: define void @acosh_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @acoshf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -549,20 +1514,30 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !152
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!152 = distinct !{!152, !153, !154}
-!153 = !{!"llvm.loop.vectorize.width", i32 4}
-!154 = !{!"llvm.loop.vectorize.enable"}
-
define void @atanh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: @atanh_f32
-; CHECK-LABEL: vector.body
-; CHECK: <4 x float> @_ZGVbN4v_atanhf
+; CHECK-LABEL: define void @atanh_f32(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @atanhf(float [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -575,18 +1550,12 @@ for.body:
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !155
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!155 = distinct !{!155, !156, !157}
-!156 = !{!"llvm.loop.vectorize.width", i32 4}
-!157 = !{!"llvm.loop.vectorize.enable"}
-
-
-
; GLIBC 2.35 libmvec functions, f64 (no corresponding LLVM intrinsic)
declare double @erf(double) #0
declare double @erfc(double) #0
@@ -598,9 +1567,23 @@ declare double @acosh(double) #0
declare double @atanh(double) #0
define void @erf_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @erf_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_erf
+; CHECK-LABEL: define void @erf_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @erf(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -613,20 +1596,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !158
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!158 = distinct !{!158, !159, !160}
-!159 = !{!"llvm.loop.vectorize.width", i32 2}
-!160 = !{!"llvm.loop.vectorize.enable"}
-
define void @erfc_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @erfc_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_erfc
+; CHECK-LABEL: define void @erfc_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @erfc(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -639,20 +1632,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !161
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!161 = distinct !{!161, !162, !163}
-!162 = !{!"llvm.loop.vectorize.width", i32 2}
-!163 = !{!"llvm.loop.vectorize.enable"}
-
define void @cbrt_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @cbrt_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_cbrt
+; CHECK-LABEL: define void @cbrt_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @cbrt(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -665,20 +1668,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !164
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!164 = distinct !{!164, !165, !166}
-!165 = !{!"llvm.loop.vectorize.width", i32 2}
-!166 = !{!"llvm.loop.vectorize.enable"}
-
define void @expm1_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @expm1_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_expm1
+; CHECK-LABEL: define void @expm1_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @expm1(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -691,20 +1704,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !167
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!167 = distinct !{!167, !168, !169}
-!168 = !{!"llvm.loop.vectorize.width", i32 2}
-!169 = !{!"llvm.loop.vectorize.enable"}
-
define void @log1p_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @log1p_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_log1p
+; CHECK-LABEL: define void @log1p_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @log1p(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -717,20 +1740,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !170
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!170 = distinct !{!170, !171, !172}
-!171 = !{!"llvm.loop.vectorize.width", i32 2}
-!172 = !{!"llvm.loop.vectorize.enable"}
-
define void @asinh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @asinh_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_asinh
+; CHECK-LABEL: define void @asinh_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @asinh(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -743,20 +1776,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !173
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!173 = distinct !{!173, !174, !175}
-!174 = !{!"llvm.loop.vectorize.width", i32 2}
-!175 = !{!"llvm.loop.vectorize.enable"}
-
define void @acosh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @acosh_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_acosh
+; CHECK-LABEL: define void @acosh_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @acosh(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -769,20 +1812,30 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !176
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-!176 = distinct !{!176, !177, !178}
-!177 = !{!"llvm.loop.vectorize.width", i32 2}
-!178 = !{!"llvm.loop.vectorize.enable"}
-
define void @atanh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: @atanh_f64
-; CHECK-LABEL: vector.body
-; CHECK: <2 x double> @_ZGVbN2v_atanh
+; CHECK-LABEL: define void @atanh_f64(
+; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
+; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @atanh(double [[CONV]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
+; CHECK: [[FOR_END]]:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -795,13 +1848,63 @@ for.body:
store double %call, ptr %arrayidx, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !179
+ br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-
-!179 = distinct !{!179, !180, !181}
-!180 = !{!"llvm.loop.vectorize.width", i32 2}
-!181 = !{!"llvm.loop.vectorize.enable"}
-
+;.
+; CHECK-VF2: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF2: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF2: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF2: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF2: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+;.
+; CHECK-VF4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF4: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF4: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF4: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+;.
+; CHECK-VF8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-VF8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK-VF8: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK-VF8: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF8: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+;.
>From a51b384202a8afd7163443fabaf6cadfbd8e60cb Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Sat, 25 Jul 2026 21:05:02 +0530
Subject: [PATCH 2/7] Add unique test cases from VF2-VG8 into the main test
file
---
.../X86/libm-vector-calls-finite.ll | 202 +-
.../LoopVectorize/X86/libm-vector-calls.ll | 2631 +++++++++++++----
2 files changed, 2127 insertions(+), 706 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
index 3bf279539f0db..83d4dc1d67eb7 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
@@ -16,9 +16,9 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i32 0
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i32 1
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__expf_finite(float [[TMP1]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__expf_finite(float [[TMP3]]) #[[ATTR0]]
; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
@@ -150,21 +150,21 @@ define void @exp_f64(ptr nocapture %varray) {
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i32 0
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i32 1
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i32 2
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i32 3
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i32 4
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i32 5
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i32 6
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i32 7
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__exp_finite(double [[TMP1]]) #[[ATTR0:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__exp_finite(double [[TMP9]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__exp_finite(double [[TMP3]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__exp_finite(double [[TMP11]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__exp_finite(double [[TMP5]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__exp_finite(double [[TMP13]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__exp_finite(double [[TMP7]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__exp_finite(double [[TMP3]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__exp_finite(double [[TMP5]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__exp_finite(double [[TMP7]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__exp_finite(double [[TMP9]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__exp_finite(double [[TMP11]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__exp_finite(double [[TMP13]]) #[[ATTR0]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__exp_finite(double [[TMP15]]) #[[ATTR0]]
; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
@@ -214,9 +214,9 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i32 0
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i32 1
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__logf_finite(float [[TMP1]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__logf_finite(float [[TMP3]]) #[[ATTR1]]
; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
@@ -348,21 +348,21 @@ define void @log_f64(ptr nocapture %varray) {
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i32 0
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i32 1
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i32 2
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i32 3
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i32 4
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i32 5
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i32 6
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i32 7
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__log_finite(double [[TMP1]]) #[[ATTR1:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__log_finite(double [[TMP9]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__log_finite(double [[TMP3]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__log_finite(double [[TMP11]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__log_finite(double [[TMP5]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__log_finite(double [[TMP13]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__log_finite(double [[TMP7]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__log_finite(double [[TMP3]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__log_finite(double [[TMP5]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__log_finite(double [[TMP7]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__log_finite(double [[TMP9]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__log_finite(double [[TMP11]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__log_finite(double [[TMP13]]) #[[ATTR1]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__log_finite(double [[TMP15]]) #[[ATTR1]]
; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
@@ -406,12 +406,13 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-LABEL: define void @pow_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF2: [[VECTOR_MEMCHECK]]:
; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], 7
; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF2: [[VECTOR_PH]]:
; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -419,14 +420,14 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP1]], i32 1
; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 1
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = tail call fast float @__powf_finite(float [[TMP4]], float [[TMP7]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = tail call fast float @__powf_finite(float [[TMP3]], float [[TMP6]]) #[[ATTR2]]
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[TMP1]], i64 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 0
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = tail call fast float @__powf_finite(float [[TMP4]], float [[TMP6]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[TMP1]], i64 1
+; CHECK-VF2-NEXT: [[TMP13:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 1
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = tail call fast float @__powf_finite(float [[TMP7]], float [[TMP13]]) #[[ATTR2]]
; CHECK-VF2-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0
; CHECK-VF2-NEXT: [[TMP10:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP8]], i32 1
; CHECK-VF2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
@@ -444,10 +445,10 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR2]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP3]]) #[[ATTR2]]
; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP4]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
@@ -457,12 +458,13 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF4-LABEL: define void @pow_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF4: [[VECTOR_MEMCHECK]]:
; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF4: [[VECTOR_PH]]:
; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -488,10 +490,10 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP6]]) #[[ATTR0:[0-9]+]]
; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
@@ -501,12 +503,13 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF8-LABEL: define void @pow_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF8: [[VECTOR_MEMCHECK]]:
; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF8: [[VECTOR_PH]]:
; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -532,10 +535,10 @@ define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP6]]) #[[ATTR2:[0-9]+]]
; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
@@ -566,12 +569,13 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-LABEL: define void @pow_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF2: [[VECTOR_MEMCHECK]]:
; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF2: [[VECTOR_PH]]:
; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -597,10 +601,10 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP6]]) #[[ATTR3:[0-9]+]]
; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store double [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
@@ -610,12 +614,13 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF4-LABEL: define void @pow_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF4: [[VECTOR_MEMCHECK]]:
; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF4: [[VECTOR_PH]]:
; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -641,10 +646,10 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP6]]) #[[ATTR1:[0-9]+]]
; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store double [[TMP2]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
@@ -654,12 +659,13 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF8-LABEL: define void @pow_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; CHECK-VF8: [[VECTOR_MEMCHECK]]:
; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 64
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], 63
; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK-VF8: [[VECTOR_PH]]:
; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -667,32 +673,32 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = extractelement <8 x double> [[TMP1]], i32 0
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP1]], i32 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = extractelement <8 x double> [[TMP1]], i32 2
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = extractelement <8 x double> [[TMP1]], i32 3
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = extractelement <8 x double> [[TMP1]], i32 4
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP1]], i32 5
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = extractelement <8 x double> [[TMP1]], i32 6
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP1]], i32 7
; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x double>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 0
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 1
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 2
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 3
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 4
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 5
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 6
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i32 7
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = tail call fast double @__pow_finite(double [[TMP10]], double [[TMP22]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__pow_finite(double [[TMP3]], double [[TMP12]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = tail call fast double @__pow_finite(double [[TMP4]], double [[TMP13]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__pow_finite(double [[TMP19]], double [[TMP24]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = tail call fast double @__pow_finite(double [[TMP6]], double [[TMP15]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = tail call fast double @__pow_finite(double [[TMP7]], double [[TMP16]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = tail call fast double @__pow_finite(double [[TMP21]], double [[TMP25]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = tail call fast double @__pow_finite(double [[TMP9]], double [[TMP18]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = extractelement <8 x double> [[TMP1]], i64 0
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 0
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = tail call fast double @__pow_finite(double [[TMP4]], double [[TMP6]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP1]], i64 1
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 1
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__pow_finite(double [[TMP7]], double [[TMP9]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = extractelement <8 x double> [[TMP1]], i64 2
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 2
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = tail call fast double @__pow_finite(double [[TMP10]], double [[TMP12]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP1]], i64 3
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 3
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__pow_finite(double [[TMP13]], double [[TMP15]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = extractelement <8 x double> [[TMP1]], i64 4
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 4
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = tail call fast double @__pow_finite(double [[TMP16]], double [[TMP18]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = extractelement <8 x double> [[TMP1]], i64 5
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 5
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = tail call fast double @__pow_finite(double [[TMP19]], double [[TMP21]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = extractelement <8 x double> [[TMP1]], i64 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 6
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = tail call fast double @__pow_finite(double [[TMP22]], double [[TMP24]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = extractelement <8 x double> [[TMP1]], i64 7
+; CHECK-VF8-NEXT: [[TMP37:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 7
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = tail call fast double @__pow_finite(double [[TMP25]], double [[TMP37]]) #[[ATTR3]]
; CHECK-VF8-NEXT: [[TMP27:%.*]] = insertelement <8 x double> poison, double [[TMP5]], i32 0
; CHECK-VF8-NEXT: [[TMP28:%.*]] = insertelement <8 x double> [[TMP27]], double [[TMP8]], i32 1
; CHECK-VF8-NEXT: [[TMP29:%.*]] = insertelement <8 x double> [[TMP28]], double [[TMP11]], i32 2
@@ -716,10 +722,10 @@ define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP1]]) #[[ATTR3]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = load double, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP3]]) #[[ATTR3]]
; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store double [[TMP10]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index d4be8ef2e3e5d..0de697e38936c 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -6,6 +6,36 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
+attributes #0 = { nounwind readnone }
+
+declare double @sin(double) #0
+declare float @sinf(float) #0
+declare double @cos(double) #0
+declare float @cosf(float) #0
+declare double @tan(double) #0
+declare float @tanf(float) #0
+declare float @expf(float) #0
+declare float @powf(float, float) #0
+declare float @logf(float) #0
+
+; GLIBC 2.35 libmvec functions (no corresponding LLVM intrinsic)
+declare float @erff(float) #0
+declare float @erfcf(float) #0
+declare float @cbrtf(float) #0
+declare float @expm1f(float) #0
+declare float @log1pf(float) #0
+declare float @asinhf(float) #0
+declare float @acoshf(float) #0
+declare float @atanhf(float) #0
+declare double @erf(double) #0
+declare double @erfc(double) #0
+declare double @cbrt(double) #0
+declare double @expm1(double) #0
+declare double @log1p(double) #0
+declare double @asinh(double) #0
+declare double @acosh(double) #0
+declare double @atanh(double) #0
+
define void @sin_f64(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @sin_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -686,8 +716,8 @@ for.end:
ret void
}
-define void @exp_f32(ptr nocapture %varray) {
-; CHECK-VF2-LABEL: define void @exp_f32(
+define void @tan_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tan_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
@@ -696,10 +726,10 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF2: [[VECTOR_BODY]]:
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -709,7 +739,7 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF2: [[FOR_END]]:
; CHECK-VF2-NEXT: ret void
;
-; CHECK-VF4-LABEL: define void @exp_f32(
+; CHECK-VF4-LABEL: define void @tan_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
@@ -718,10 +748,10 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF4: [[VECTOR_BODY]]:
; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -731,7 +761,7 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF4: [[FOR_END]]:
; CHECK-VF4-NEXT: ret void
;
-; CHECK-VF8-LABEL: define void @exp_f32(
+; CHECK-VF8-LABEL: define void @tan_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
@@ -740,10 +770,10 @@ define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF8: [[VECTOR_BODY]]:
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -757,22 +787,22 @@ entry:
br label %for.body
for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
- %conv = sitofp i32 %tmp to float
- %call = tail call fast float @expf(float %conv)
- %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %call, ptr %arrayidx, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @tan(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-define void @exp_f32_intrin(ptr nocapture %varray) {
-; CHECK-VF2-LABEL: define void @exp_f32_intrin(
+define void @tan_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tan_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
@@ -782,7 +812,7 @@ define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0]])
; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
@@ -794,7 +824,7 @@ define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-VF2: [[FOR_END]]:
; CHECK-VF2-NEXT: ret void
;
-; CHECK-VF4-LABEL: define void @exp_f32_intrin(
+; CHECK-VF4-LABEL: define void @tan_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
@@ -804,7 +834,7 @@ define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0]])
; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
@@ -816,7 +846,7 @@ define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-VF4: [[FOR_END]]:
; CHECK-VF4-NEXT: ret void
;
-; CHECK-VF8-LABEL: define void @exp_f32_intrin(
+; CHECK-VF8-LABEL: define void @tan_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
@@ -826,7 +856,7 @@ define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
@@ -842,22 +872,22 @@ entry:
br label %for.body
for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
- %call = tail call fast float @llvm.exp.f32(float %conv)
- %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ %call = tail call float @tanf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
store float %call, ptr %arrayidx, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-define void @log_f32(ptr nocapture %varray) {
-; CHECK-VF2-LABEL: define void @log_f32(
+define void @tan_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
@@ -866,10 +896,10 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF2: [[VECTOR_BODY]]:
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -879,7 +909,7 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF2: [[FOR_END]]:
; CHECK-VF2-NEXT: ret void
;
-; CHECK-VF4-LABEL: define void @log_f32(
+; CHECK-VF4-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
@@ -888,10 +918,10 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF4: [[VECTOR_BODY]]:
; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -901,7 +931,7 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF4: [[FOR_END]]:
; CHECK-VF4-NEXT: ret void
;
-; CHECK-VF8-LABEL: define void @log_f32(
+; CHECK-VF8-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
@@ -910,10 +940,10 @@ define void @log_f32(ptr nocapture %varray) {
; CHECK-VF8: [[VECTOR_BODY]]:
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
@@ -927,150 +957,84 @@ entry:
br label %for.body
for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
- %conv = sitofp i32 %tmp to float
- %call = tail call fast float @logf(float %conv)
- %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %call, ptr %arrayidx, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.tan.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-VF2-LABEL: define void @pow_f32(
-; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+define void @tan_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tan_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF2: [[VECTOR_PH]]:
; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF2: [[VECTOR_BODY]]:
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
; CHECK-VF2: [[MIDDLE_BLOCK]]:
; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF2: [[FOR_END]]:
; CHECK-VF2-NEXT: ret void
;
-; CHECK-VF4-LABEL: define void @pow_f32(
-; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-LABEL: define void @tan_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF4: [[VECTOR_PH]]:
; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF4: [[VECTOR_BODY]]:
; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
; CHECK-VF4: [[MIDDLE_BLOCK]]:
; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF4: [[FOR_END]]:
; CHECK-VF4-NEXT: ret void
;
-; CHECK-VF8-LABEL: define void @pow_f32(
-; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-LABEL: define void @tan_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF8: [[VECTOR_PH]]:
; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF8: [[VECTOR_BODY]]:
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
; CHECK-VF8: [[MIDDLE_BLOCK]]:
; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF8: [[FOR_END]]:
; CHECK-VF8-NEXT: ret void
;
@@ -1078,152 +1042,84 @@ entry:
br label %for.body
for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
%conv = sitofp i32 %tmp to float
- %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @powf(float %conv, float %tmp1)
- %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ %call = tail call float @llvm.tan.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}
-define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
-; CHECK-VF2-LABEL: define void @pow_f32_intrin(
-; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+define void @exp_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF2: [[VECTOR_PH]]:
; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF2: [[VECTOR_BODY]]:
; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF2: [[MIDDLE_BLOCK]]:
; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
; CHECK-VF2: [[FOR_END]]:
; CHECK-VF2-NEXT: ret void
;
-; CHECK-VF4-LABEL: define void @pow_f32_intrin(
-; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-LABEL: define void @exp_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF4: [[VECTOR_PH]]:
; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF4: [[VECTOR_BODY]]:
; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF4: [[MIDDLE_BLOCK]]:
; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
; CHECK-VF4: [[FOR_END]]:
; CHECK-VF4-NEXT: ret void
;
-; CHECK-VF8-LABEL: define void @pow_f32_intrin(
-; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-LABEL: define void @exp_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK-VF8: [[VECTOR_PH]]:
; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK-VF8: [[VECTOR_BODY]]:
; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
; CHECK-VF8: [[MIDDLE_BLOCK]]:
; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
; CHECK-VF8: [[FOR_END]]:
; CHECK-VF8-NEXT: ret void
;
@@ -1234,66 +1130,7 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
- %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
- %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end:
- ret void
-}
-
-attributes #0 = { nounwind readnone }
-
-declare double @sin(double) #0
-declare float @sinf(float) #0
-declare double @cos(double) #0
-declare float @cosf(float) #0
-declare float @expf(float) #0
-declare float @powf(float, float) #0
-declare float @logf(float) #0
-
-
-; GLIBC 2.35 libmvec functions (no corresponding LLVM intrinsic)
-declare float @erff(float) #0
-declare float @erfcf(float) #0
-declare float @cbrtf(float) #0
-declare float @expm1f(float) #0
-declare float @log1pf(float) #0
-declare float @asinhf(float) #0
-declare float @acoshf(float) #0
-declare float @atanhf(float) #0
-
-define void @erf_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @erf_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @erff(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
-;
-entry:
- br label %for.body
-
-for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
- %conv = sitofp i32 %tmp to float
- %call = tail call fast float @erff(float %conv)
+ %call = tail call fast float @expf(float %conv)
%arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
@@ -1304,23 +1141,72 @@ for.end:
ret void
}
-define void @erfc_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @erfc_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @erfcf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+define void @exp_f32_intrin(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp_f32_intrin(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @exp_f32_intrin(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @exp_f32_intrin(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1329,7 +1215,7 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
- %call = tail call fast float @erfcf(float %conv)
+ %call = tail call fast float @llvm.exp.f32(float %conv)
%arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
@@ -1340,23 +1226,72 @@ for.end:
ret void
}
-define void @cbrt_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @cbrt_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @cbrtf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+define void @log_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1365,7 +1300,7 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
- %call = tail call fast float @cbrtf(float %conv)
+ %call = tail call fast float @logf(float %conv)
%arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
@@ -1376,33 +1311,669 @@ for.end:
ret void
}
-define void @expm1_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @expm1_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @expm1f(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
-;
-entry:
- br label %for.body
-
-for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
- %conv = sitofp i32 %tmp to float
- %call = tail call fast float @expm1f(float %conv)
- %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @pow_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 7
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
+ %tmp1 = load float, ptr %arrayidx, align 4
+ %tmp2 = tail call fast float @powf(float %conv, float %tmp1)
+ %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %tmp2, ptr %arrayidx2, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @pow_f32_intrin(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF2: [[VECTOR_MEMCHECK]]:
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 7
+; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[SCALAR_PH]]:
+; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF2: [[FOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
+; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @pow_f32_intrin(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF4: [[VECTOR_MEMCHECK]]:
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
+; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
+; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[SCALAR_PH]]:
+; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4: [[FOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
+; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @pow_f32_intrin(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
+; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
+; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
+; CHECK-VF8: [[VECTOR_MEMCHECK]]:
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
+; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
+; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[SCALAR_PH]]:
+; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF8: [[FOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
+; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
+; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
+; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
+; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
+ %tmp1 = load float, ptr %arrayidx, align 4
+ %tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
+ %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %tmp2, ptr %arrayidx2, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @erf_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @erf_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @erff(float [[TMP1]]) #[[ATTR5:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @erff(float [[TMP3]]) #[[ATTR5]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @erf_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erff(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @erf_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erff(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @erff(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @erfc_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @erfc_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @erfcf(float [[TMP1]]) #[[ATTR6:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @erfcf(float [[TMP3]]) #[[ATTR6]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @erfc_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erfcf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @erfc_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erfcf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @erfcf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @cbrt_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @cbrt_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @cbrtf(float [[TMP1]]) #[[ATTR7:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @cbrtf(float [[TMP3]]) #[[ATTR7]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cbrt_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_cbrtf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cbrt_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_cbrtf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @cbrtf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @expm1_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @expm1_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @expm1f(float [[TMP1]]) #[[ATTR8:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @expm1f(float [[TMP3]]) #[[ATTR8]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @expm1_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expm1f(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @expm1_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expm1f(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @expm1f(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
store float %call, ptr %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
@@ -1413,22 +1984,76 @@ for.end:
}
define void @log1p_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @log1p_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @log1pf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @log1p_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @log1pf(float [[TMP1]]) #[[ATTR9:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @log1pf(float [[TMP3]]) #[[ATTR9]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log1p_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log1pf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log1p_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log1pf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1449,58 +2074,166 @@ for.end:
}
define void @asinh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @asinh_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @asinhf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @asinh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @asinhf(float [[TMP1]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @asinhf(float [[TMP3]]) #[[ATTR10]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @asinh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_asinhf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @asinh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinhf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @asinhf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @acosh_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @acosh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @acoshf(float [[TMP1]]) #[[ATTR11:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @acoshf(float [[TMP3]]) #[[ATTR11]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @acosh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_acoshf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
;
-entry:
- br label %for.body
-
-for.body:
- %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %tmp = trunc i64 %indvars.iv to i32
- %conv = sitofp i32 %tmp to float
- %call = tail call fast float @asinhf(float %conv)
- %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %call, ptr %arrayidx, align 4
- %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %exitcond = icmp eq i64 %indvars.iv.next, 1000
- br i1 %exitcond, label %for.end, label %for.body
-
-for.end:
- ret void
-}
-
-define void @acosh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @acosh_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @acoshf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF8-LABEL: define void @acosh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acoshf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1521,22 +2254,76 @@ for.end:
}
define void @atanh_f32(ptr nocapture %varray) {
-; CHECK-LABEL: define void @atanh_f32(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast float @atanhf(float [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[CALL]], ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @atanh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @atanhf(float [[TMP1]]) #[[ATTR12:[0-9]+]]
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
+; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @atanhf(float [[TMP3]]) #[[ATTR12]]
+; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
+; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
+; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @atanh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_atanhf(<4 x float> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @atanh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanhf(<8 x float> [[TMP0]])
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1556,33 +2343,95 @@ for.end:
ret void
}
-; GLIBC 2.35 libmvec functions, f64 (no corresponding LLVM intrinsic)
-declare double @erf(double) #0
-declare double @erfc(double) #0
-declare double @cbrt(double) #0
-declare double @expm1(double) #0
-declare double @log1p(double) #0
-declare double @asinh(double) #0
-declare double @acosh(double) #0
-declare double @atanh(double) #0
-
define void @erf_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @erf_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @erf(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @erf_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erf(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @erf_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erf(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @erf_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @erf(double [[TMP1]]) #[[ATTR5:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @erf(double [[TMP3]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @erf(double [[TMP5]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @erf(double [[TMP7]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @erf(double [[TMP9]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @erf(double [[TMP11]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @erf(double [[TMP13]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @erf(double [[TMP15]]) #[[ATTR5]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1603,22 +2452,94 @@ for.end:
}
define void @erfc_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @erfc_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @erfc(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @erfc_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erfc(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @erfc_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erfc(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @erfc_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @erfc(double [[TMP1]]) #[[ATTR6:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @erfc(double [[TMP3]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @erfc(double [[TMP5]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @erfc(double [[TMP7]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @erfc(double [[TMP9]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @erfc(double [[TMP11]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @erfc(double [[TMP13]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @erfc(double [[TMP15]]) #[[ATTR6]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1639,22 +2560,94 @@ for.end:
}
define void @cbrt_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @cbrt_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @cbrt(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @cbrt_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cbrt(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @cbrt_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cbrt(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @cbrt_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @cbrt(double [[TMP1]]) #[[ATTR7:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @cbrt(double [[TMP3]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @cbrt(double [[TMP5]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @cbrt(double [[TMP7]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @cbrt(double [[TMP9]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @cbrt(double [[TMP11]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @cbrt(double [[TMP13]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @cbrt(double [[TMP15]]) #[[ATTR7]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1675,22 +2668,94 @@ for.end:
}
define void @expm1_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @expm1_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @expm1(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @expm1_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_expm1(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @expm1_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_expm1(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @expm1_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @expm1(double [[TMP1]]) #[[ATTR8:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @expm1(double [[TMP3]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @expm1(double [[TMP5]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @expm1(double [[TMP7]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @expm1(double [[TMP9]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @expm1(double [[TMP11]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @expm1(double [[TMP13]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @expm1(double [[TMP15]]) #[[ATTR8]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1711,22 +2776,94 @@ for.end:
}
define void @log1p_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @log1p_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @log1p(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @log1p_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log1p(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @log1p_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log1p(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @log1p_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @log1p(double [[TMP1]]) #[[ATTR9:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @log1p(double [[TMP3]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @log1p(double [[TMP5]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @log1p(double [[TMP7]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @log1p(double [[TMP9]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @log1p(double [[TMP11]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @log1p(double [[TMP13]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @log1p(double [[TMP15]]) #[[ATTR9]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1747,22 +2884,94 @@ for.end:
}
define void @asinh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @asinh_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @asinh(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @asinh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asinh(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @asinh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asinh(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @asinh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @asinh(double [[TMP1]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @asinh(double [[TMP3]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @asinh(double [[TMP5]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @asinh(double [[TMP7]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @asinh(double [[TMP9]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @asinh(double [[TMP11]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @asinh(double [[TMP13]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @asinh(double [[TMP15]]) #[[ATTR10]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1783,22 +2992,94 @@ for.end:
}
define void @acosh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @acosh_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @acosh(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @acosh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acosh(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @acosh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acosh(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @acosh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @acosh(double [[TMP1]]) #[[ATTR11:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @acosh(double [[TMP3]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @acosh(double [[TMP5]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @acosh(double [[TMP7]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @acosh(double [[TMP9]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @acosh(double [[TMP11]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @acosh(double [[TMP13]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @acosh(double [[TMP15]]) #[[ATTR11]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1819,22 +3100,94 @@ for.end:
}
define void @atanh_f64(ptr nocapture %varray) {
-; CHECK-LABEL: define void @atanh_f64(
-; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-NEXT: [[CALL:%.*]] = tail call fast double @atanh(double [[CONV]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END:.*]], label %[[FOR_BODY]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK-VF2-LABEL: define void @atanh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2-NEXT: [[ENTRY:.*:]]
+; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF2: [[VECTOR_PH]]:
+; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF2: [[VECTOR_BODY]]:
+; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
+; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atanh(<2 x double> [[TMP0]])
+; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
+; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
+; CHECK-VF2: [[MIDDLE_BLOCK]]:
+; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF2: [[FOR_END]]:
+; CHECK-VF2-NEXT: ret void
+;
+; CHECK-VF4-LABEL: define void @atanh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4-NEXT: [[ENTRY:.*:]]
+; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF4: [[VECTOR_PH]]:
+; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF4: [[VECTOR_BODY]]:
+; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
+; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atanh(<4 x double> [[TMP0]])
+; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
+; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
+; CHECK-VF4: [[MIDDLE_BLOCK]]:
+; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF4: [[FOR_END]]:
+; CHECK-VF4-NEXT: ret void
+;
+; CHECK-VF8-LABEL: define void @atanh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8-NEXT: [[ENTRY:.*:]]
+; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK-VF8: [[VECTOR_PH]]:
+; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK-VF8: [[VECTOR_BODY]]:
+; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
+; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
+; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @atanh(double [[TMP1]]) #[[ATTR12:[0-9]+]]
+; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
+; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @atanh(double [[TMP3]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
+; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @atanh(double [[TMP5]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
+; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @atanh(double [[TMP7]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
+; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @atanh(double [[TMP9]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
+; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @atanh(double [[TMP11]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
+; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @atanh(double [[TMP13]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
+; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @atanh(double [[TMP15]]) #[[ATTR12]]
+; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
+; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
+; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
+; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
+; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
+; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
+; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
+; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
+; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
+; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
+; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
+; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
+; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
+; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
+; CHECK-VF8: [[MIDDLE_BLOCK]]:
+; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
+; CHECK-VF8: [[FOR_END]]:
+; CHECK-VF8-NEXT: ret void
;
entry:
br label %for.body
@@ -1868,9 +3221,29 @@ for.end:
; CHECK-VF2: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
; CHECK-VF2: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
; CHECK-VF2: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF2: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
; CHECK-VF2: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+; CHECK-VF2: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
+; CHECK-VF2: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
+; CHECK-VF2: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
+; CHECK-VF2: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
;.
; CHECK-VF4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK-VF4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
@@ -1886,9 +3259,29 @@ for.end:
; CHECK-VF4: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
; CHECK-VF4: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
; CHECK-VF4: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF4: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
; CHECK-VF4: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+; CHECK-VF4: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
+; CHECK-VF4: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
+; CHECK-VF4: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
+; CHECK-VF4: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
;.
; CHECK-VF8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK-VF8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
@@ -1904,7 +3297,29 @@ for.end:
; CHECK-VF8: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
; CHECK-VF8: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
; CHECK-VF8: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
+; CHECK-VF8: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
; CHECK-VF8: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
+; CHECK-VF8: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
+; CHECK-VF8: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
+; CHECK-VF8: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
+; CHECK-VF8: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
;.
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
>From bbf60901590f27d1af378469268a33de1b3d78ac Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Mon, 27 Jul 2026 08:11:16 +0530
Subject: [PATCH 3/7] Regenerate CHECK lines with --filter, rename tmp1/tmp2 to
i1/i2
---
.../X86/libm-vector-calls-finite.ll | 670 +----
.../LoopVectorize/X86/libm-vector-calls.ll | 2637 ++---------------
2 files changed, 327 insertions(+), 2980 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
index 83d4dc1d67eb7..34557dfb52d95 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*@" --version 6
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
@@ -8,74 +8,16 @@ target triple = "x86_64-unknown-linux-gnu"
define void @exp_f32(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @exp_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__expf_finite(float [[TMP1]]) #[[ATTR0:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__expf_finite(float [[TMP3]]) #[[ATTR0]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @__expf_finite(float [[TMP1:%.*]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @__expf_finite(float [[TMP3:%.*]]) #[[ATTR0]]
;
; CHECK-VF4-LABEL: define void @exp_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___expf_finite(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___expf_finite(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___expf_finite(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___expf_finite(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -98,92 +40,22 @@ for.end:
define void @exp_f64(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @exp_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___exp_finite(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___exp_finite(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @exp_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___exp_finite(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___exp_finite(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__exp_finite(double [[TMP1]]) #[[ATTR0:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__exp_finite(double [[TMP3]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__exp_finite(double [[TMP5]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__exp_finite(double [[TMP7]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__exp_finite(double [[TMP9]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__exp_finite(double [[TMP11]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__exp_finite(double [[TMP13]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__exp_finite(double [[TMP15]]) #[[ATTR0]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @__exp_finite(double [[TMP1:%.*]]) #[[ATTR0:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @__exp_finite(double [[TMP3:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @__exp_finite(double [[TMP5:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @__exp_finite(double [[TMP7:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @__exp_finite(double [[TMP9:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @__exp_finite(double [[TMP11:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @__exp_finite(double [[TMP13:%.*]]) #[[ATTR0]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @__exp_finite(double [[TMP15:%.*]]) #[[ATTR0]]
;
entry:
br label %for.body
@@ -206,74 +78,16 @@ for.end:
define void @log_f32(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @log_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @__logf_finite(float [[TMP1]]) #[[ATTR1:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @__logf_finite(float [[TMP3]]) #[[ATTR1]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @__logf_finite(float [[TMP1:%.*]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @__logf_finite(float [[TMP3:%.*]]) #[[ATTR1]]
;
; CHECK-VF4-LABEL: define void @log_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___logf_finite(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v___logf_finite(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___logf_finite(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v___logf_finite(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -296,92 +110,22 @@ for.end:
define void @log_f64(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @log_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___log_finite(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v___log_finite(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @log_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___log_finite(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v___log_finite(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @__log_finite(double [[TMP1]]) #[[ATTR1:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @__log_finite(double [[TMP3]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @__log_finite(double [[TMP5]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__log_finite(double [[TMP7]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @__log_finite(double [[TMP9]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @__log_finite(double [[TMP11]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__log_finite(double [[TMP13]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @__log_finite(double [[TMP15]]) #[[ATTR1]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @__log_finite(double [[TMP1:%.*]]) #[[ATTR1:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @__log_finite(double [[TMP3:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @__log_finite(double [[TMP5:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @__log_finite(double [[TMP7:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @__log_finite(double [[TMP9:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @__log_finite(double [[TMP11:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @__log_finite(double [[TMP13:%.*]]) #[[ATTR1]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @__log_finite(double [[TMP15:%.*]]) #[[ATTR1]]
;
entry:
br label %for.body
@@ -405,145 +149,19 @@ for.end:
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-LABEL: define void @pow_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], 7
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[TMP1]], i64 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 0
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = tail call fast float @__powf_finite(float [[TMP4]], float [[TMP6]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[TMP1]], i64 1
-; CHECK-VF2-NEXT: [[TMP13:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 1
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = tail call fast float @__powf_finite(float [[TMP7]], float [[TMP13]]) #[[ATTR2]]
-; CHECK-VF2-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0
-; CHECK-VF2-NEXT: [[TMP10:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP8]], i32 1
-; CHECK-VF2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP10]], ptr [[TMP11]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP3]]) #[[ATTR2]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP6:%.*]] = tail call fast float @__powf_finite(float [[TMP4:%.*]], float [[TMP5:%.*]]) #[[ATTR2:[0-9]+]]
+; CHECK-VF2: [[TMP9:%.*]] = tail call fast float @__powf_finite(float [[TMP7:%.*]], float [[TMP8:%.*]]) #[[ATTR2]]
+; CHECK-VF2: [[I2:%.*]] = tail call fast float @__powf_finite(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR2]]
;
; CHECK-VF4-LABEL: define void @pow_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv___powf_finite(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP6]]) #[[ATTR0:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv___powf_finite(<4 x float> [[TMP1:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast float @__powf_finite(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR0:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @pow_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv___powf_finite(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @__powf_finite(float [[CONV]], float [[TMP6]]) #[[ATTR2:[0-9]+]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv___powf_finite(<8 x float> [[TMP1:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @__powf_finite(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR2:[0-9]+]]
;
entry:
br label %for.body
@@ -553,10 +171,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
%arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @__powf_finite(float %conv, float %tmp1)
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @__powf_finite(float %conv, float %i1)
%arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
+ store float %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -568,169 +186,25 @@ for.end:
define void @pow_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-VF2-LABEL: define void @pow_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x double> @_ZGVbN2vv___pow_finite(<2 x double> [[TMP1]], <2 x double> [[WIDE_LOAD]])
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP6]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP3:%.*]] = call fast <2 x double> @_ZGVbN2vv___pow_finite(<2 x double> [[TMP1:%.*]], <2 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast double @__pow_finite(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR3:[0-9]+]]
;
; CHECK-VF4-LABEL: define void @pow_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x double>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x double> @_ZGVdN4vv___pow_finite(<4 x double> [[TMP1]], <4 x double> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP6]]) #[[ATTR1:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP3:%.*]] = call fast <4 x double> @_ZGVdN4vv___pow_finite(<4 x double> [[TMP1:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast double @__pow_finite(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR1:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @pow_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], 63
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x double>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = extractelement <8 x double> [[TMP1]], i64 0
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 0
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = tail call fast double @__pow_finite(double [[TMP4]], double [[TMP6]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP1]], i64 1
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 1
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @__pow_finite(double [[TMP7]], double [[TMP9]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = extractelement <8 x double> [[TMP1]], i64 2
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 2
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = tail call fast double @__pow_finite(double [[TMP10]], double [[TMP12]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP1]], i64 3
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 3
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @__pow_finite(double [[TMP13]], double [[TMP15]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = extractelement <8 x double> [[TMP1]], i64 4
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 4
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = tail call fast double @__pow_finite(double [[TMP16]], double [[TMP18]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = extractelement <8 x double> [[TMP1]], i64 5
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 5
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = tail call fast double @__pow_finite(double [[TMP19]], double [[TMP21]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = extractelement <8 x double> [[TMP1]], i64 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 6
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = tail call fast double @__pow_finite(double [[TMP22]], double [[TMP24]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = extractelement <8 x double> [[TMP1]], i64 7
-; CHECK-VF8-NEXT: [[TMP37:%.*]] = extractelement <8 x double> [[WIDE_LOAD]], i64 7
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = tail call fast double @__pow_finite(double [[TMP25]], double [[TMP37]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[TMP27:%.*]] = insertelement <8 x double> poison, double [[TMP5]], i32 0
-; CHECK-VF8-NEXT: [[TMP28:%.*]] = insertelement <8 x double> [[TMP27]], double [[TMP8]], i32 1
-; CHECK-VF8-NEXT: [[TMP29:%.*]] = insertelement <8 x double> [[TMP28]], double [[TMP11]], i32 2
-; CHECK-VF8-NEXT: [[TMP30:%.*]] = insertelement <8 x double> [[TMP29]], double [[TMP14]], i32 3
-; CHECK-VF8-NEXT: [[TMP31:%.*]] = insertelement <8 x double> [[TMP30]], double [[TMP17]], i32 4
-; CHECK-VF8-NEXT: [[TMP32:%.*]] = insertelement <8 x double> [[TMP31]], double [[TMP20]], i32 5
-; CHECK-VF8-NEXT: [[TMP33:%.*]] = insertelement <8 x double> [[TMP32]], double [[TMP23]], i32 6
-; CHECK-VF8-NEXT: [[TMP34:%.*]] = insertelement <8 x double> [[TMP33]], double [[TMP26]], i32 7
-; CHECK-VF8-NEXT: [[TMP35:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP34]], ptr [[TMP35]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP36]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to double
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = load double, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast double @__pow_finite(double [[CONV]], double [[TMP3]]) #[[ATTR3]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store double [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @__pow_finite(double [[TMP4:%.*]], double [[TMP5:%.*]]) #[[ATTR3:[0-9]+]]
+; CHECK-VF8: [[TMP9:%.*]] = tail call fast double @__pow_finite(double [[TMP7:%.*]], double [[TMP8:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @__pow_finite(double [[TMP10:%.*]], double [[TMP11:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP15:%.*]] = tail call fast double @__pow_finite(double [[TMP13:%.*]], double [[TMP14:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP18:%.*]] = tail call fast double @__pow_finite(double [[TMP16:%.*]], double [[TMP17:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP21:%.*]] = tail call fast double @__pow_finite(double [[TMP19:%.*]], double [[TMP20:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP24:%.*]] = tail call fast double @__pow_finite(double [[TMP22:%.*]], double [[TMP23:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[TMP27:%.*]] = tail call fast double @__pow_finite(double [[TMP25:%.*]], double [[TMP26:%.*]]) #[[ATTR3]]
+; CHECK-VF8: [[I2:%.*]] = tail call fast double @__pow_finite(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR3]]
;
entry:
br label %for.body
@@ -740,10 +214,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to double
%arrayidx = getelementptr inbounds double, ptr %exp, i64 %indvars.iv
- %tmp1 = load double, ptr %arrayidx, align 4
- %tmp2 = tail call fast double @__pow_finite(double %conv, double %tmp1)
+ %i1 = load double, ptr %arrayidx, align 4
+ %i2 = tail call fast double @__pow_finite(double %conv, double %i1)
%arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
- store double %tmp2, ptr %arrayidx2, align 4
+ store double %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -758,39 +232,5 @@ declare float @__logf_finite(float) #0
declare double @__log_finite(double) #0
declare float @__powf_finite(float, float) #0
declare double @__pow_finite(double, double) #0
-;.
-; CHECK-VF2: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF2: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF2: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF2: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
-; CHECK-VF2: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
-;.
-; CHECK-VF4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF4: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF4: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
-; CHECK-VF4: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
-;.
-; CHECK-VF8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF8: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF8: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]}
-; CHECK-VF8: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}
-;.
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index 0de697e38936c..b1f0e6b92a837 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*@" --version 6
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
@@ -39,69 +39,15 @@ declare double @atanh(double) #0
define void @sin_f64(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @sin_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @sin_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sin_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -122,71 +68,20 @@ for.end:
}
define void @sin_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @sin_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @sin_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sin_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -207,71 +102,20 @@ for.end:
}
define void @sin_f64_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @sin_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @sin_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sin(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sin_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.sin.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -292,71 +136,20 @@ for.end:
}
define void @sin_f32_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @sin_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @sin_f32_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sin_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -377,71 +170,20 @@ for.end:
}
define void @cos_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cos_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @cos_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cos_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -462,71 +204,20 @@ for.end:
}
define void @cos_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cos_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @cos_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cos_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -547,71 +238,20 @@ for.end:
}
define void @cos_f64_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cos_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @cos_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cos(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cos_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.cos.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -632,71 +272,20 @@ for.end:
}
define void @cos_f32_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cos_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @cos_f32_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_cosf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cos_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -717,71 +306,20 @@ for.end:
}
define void @tan_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @tan_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @tan_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tan_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -802,71 +340,20 @@ for.end:
}
define void @tan_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @tan_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @tan_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tan_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -887,71 +374,20 @@ for.end:
}
define void @tan_f64_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tan(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.tan.v8f64(<8 x double> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -972,71 +408,20 @@ for.end:
}
define void @tan_f32_intrinsic(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @tan_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @tan_f32_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tan_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1057,71 +442,20 @@ for.end:
}
define void @exp_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @exp_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @exp_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1142,71 +476,20 @@ for.end:
}
define void @exp_f32_intrin(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @exp_f32_intrin(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @exp_f32_intrin(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp_f32_intrin(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1227,71 +510,20 @@ for.end:
}
define void @log_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @log_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @log_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1312,140 +544,23 @@ for.end:
}
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @pow_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 7
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast float @powf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR3:[0-9]+]]
;
; CHECK-VF4-LABEL: define void @pow_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP2:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast float @powf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR3:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @pow_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP6]]) #[[ATTR3:[0-9]+]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @powf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR3:[0-9]+]]
;
entry:
br label %for.body
@@ -1455,10 +570,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
%arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @powf(float %conv, float %tmp1)
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @powf(float %conv, float %i1)
%arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
+ store float %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1468,140 +583,23 @@ for.end:
}
define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @pow_f32_intrin(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF2-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF2: [[VECTOR_MEMCHECK]]:
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF2-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 7
-; CHECK-VF2-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP2]], align 4
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP1]], <2 x float> [[WIDE_LOAD]])
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[SCALAR_PH]]:
-; CHECK-VF2-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF2: [[FOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
-; CHECK-VF2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF2-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR4:[0-9]+]]
;
; CHECK-VF4-LABEL: define void @pow_f32_intrin(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF4-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF4-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF4: [[VECTOR_MEMCHECK]]:
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF4-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF4-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP1]], <4 x float> [[WIDE_LOAD]])
-; CHECK-VF4-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[SCALAR_PH]]:
-; CHECK-VF4-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF4: [[FOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
-; CHECK-VF4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF4-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF4-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF4-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[TMP2:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR4:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @pow_f32_intrin(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: [[EXP2:%.*]] = ptrtoaddr ptr [[EXP]] to i64
-; CHECK-VF8-NEXT: [[VARRAY1:%.*]] = ptrtoaddr ptr [[VARRAY]] to i64
-; CHECK-VF8-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK-VF8: [[VECTOR_MEMCHECK]]:
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-VF8-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], 31
-; CHECK-VF8-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[SCALAR_PH]]:
-; CHECK-VF8-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK-VF8: [[FOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-VF8-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-VF8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP6]]) #[[ATTR4:[0-9]+]]
-; CHECK-VF8-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-VF8-NEXT: store float [[TMP1]], ptr [[ARRAYIDX2]], align 4
-; CHECK-VF8-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-VF8-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR4:[0-9]+]]
;
entry:
br label %for.body
@@ -1611,10 +609,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
%arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @llvm.pow.f32(float %conv, float %i1)
%arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
+ store float %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body
@@ -1624,76 +622,21 @@ for.end:
}
define void @erf_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @erf_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @erff(float [[TMP1]]) #[[ATTR5:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @erff(float [[TMP3]]) #[[ATTR5]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @erff(float [[TMP1:%.*]]) #[[ATTR5:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @erff(float [[TMP3:%.*]]) #[[ATTR5]]
;
; CHECK-VF4-LABEL: define void @erf_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erff(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erff(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @erf_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erff(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erff(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1714,76 +657,21 @@ for.end:
}
define void @erfc_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @erfc_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @erfcf(float [[TMP1]]) #[[ATTR6:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @erfcf(float [[TMP3]]) #[[ATTR6]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @erfcf(float [[TMP1:%.*]]) #[[ATTR6:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @erfcf(float [[TMP3:%.*]]) #[[ATTR6]]
;
; CHECK-VF4-LABEL: define void @erfc_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erfcf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_erfcf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @erfc_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erfcf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_erfcf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1804,76 +692,21 @@ for.end:
}
define void @cbrt_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cbrt_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @cbrtf(float [[TMP1]]) #[[ATTR7:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @cbrtf(float [[TMP3]]) #[[ATTR7]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @cbrtf(float [[TMP1:%.*]]) #[[ATTR7:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @cbrtf(float [[TMP3:%.*]]) #[[ATTR7]]
;
; CHECK-VF4-LABEL: define void @cbrt_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_cbrtf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_cbrtf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cbrt_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_cbrtf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_cbrtf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1894,76 +727,21 @@ for.end:
}
define void @expm1_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @expm1_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @expm1f(float [[TMP1]]) #[[ATTR8:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @expm1f(float [[TMP3]]) #[[ATTR8]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @expm1f(float [[TMP1:%.*]]) #[[ATTR8:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @expm1f(float [[TMP3:%.*]]) #[[ATTR8]]
;
; CHECK-VF4-LABEL: define void @expm1_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expm1f(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expm1f(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @expm1_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expm1f(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expm1f(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1984,76 +762,21 @@ for.end:
}
define void @log1p_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @log1p_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @log1pf(float [[TMP1]]) #[[ATTR9:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @log1pf(float [[TMP3]]) #[[ATTR9]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @log1pf(float [[TMP1:%.*]]) #[[ATTR9:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @log1pf(float [[TMP3:%.*]]) #[[ATTR9]]
;
; CHECK-VF4-LABEL: define void @log1p_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log1pf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log1pf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log1p_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log1pf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log1pf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2074,76 +797,21 @@ for.end:
}
define void @asinh_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @asinh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @asinhf(float [[TMP1]]) #[[ATTR10:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @asinhf(float [[TMP3]]) #[[ATTR10]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @asinhf(float [[TMP1:%.*]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @asinhf(float [[TMP3:%.*]]) #[[ATTR10]]
;
; CHECK-VF4-LABEL: define void @asinh_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_asinhf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_asinhf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @asinh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinhf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinhf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2164,76 +832,21 @@ for.end:
}
define void @acosh_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @acosh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @acoshf(float [[TMP1]]) #[[ATTR11:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @acoshf(float [[TMP3]]) #[[ATTR11]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @acoshf(float [[TMP1:%.*]]) #[[ATTR11:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @acoshf(float [[TMP3:%.*]]) #[[ATTR11]]
;
; CHECK-VF4-LABEL: define void @acosh_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_acoshf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_acoshf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @acosh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acoshf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acoshf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2254,76 +867,21 @@ for.end:
}
define void @atanh_f32(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @atanh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x float>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[TMP0]], i64 0
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = tail call fast float @atanhf(float [[TMP1]]) #[[ATTR12:[0-9]+]]
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP0]], i64 1
-; CHECK-VF2-NEXT: [[TMP4:%.*]] = tail call fast float @atanhf(float [[TMP3]]) #[[ATTR12]]
-; CHECK-VF2-NEXT: [[TMP5:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0
-; CHECK-VF2-NEXT: [[TMP6:%.*]] = insertelement <2 x float> [[TMP5]], float [[TMP4]], i32 1
-; CHECK-VF2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x float> [[TMP6]], ptr [[TMP7]], align 4
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @atanhf(float [[TMP1:%.*]]) #[[ATTR12:[0-9]+]]
+; CHECK-VF2: [[TMP4:%.*]] = tail call fast float @atanhf(float [[TMP3:%.*]]) #[[ATTR12]]
;
; CHECK-VF4-LABEL: define void @atanh_f32(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x float>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_atanhf(<4 x float> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_atanhf(<4 x float> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @atanh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanhf(<8 x float> [[TMP0]])
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanhf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2344,94 +902,27 @@ for.end:
}
define void @erf_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @erf_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erf(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erf(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @erf_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erf(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erf(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @erf_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @erf(double [[TMP1]]) #[[ATTR5:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @erf(double [[TMP3]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @erf(double [[TMP5]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @erf(double [[TMP7]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @erf(double [[TMP9]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @erf(double [[TMP11]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @erf(double [[TMP13]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @erf(double [[TMP15]]) #[[ATTR5]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @erf(double [[TMP1:%.*]]) #[[ATTR5:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @erf(double [[TMP3:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @erf(double [[TMP5:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @erf(double [[TMP7:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @erf(double [[TMP9:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @erf(double [[TMP11:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @erf(double [[TMP13:%.*]]) #[[ATTR5]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @erf(double [[TMP15:%.*]]) #[[ATTR5]]
;
entry:
br label %for.body
@@ -2452,94 +943,27 @@ for.end:
}
define void @erfc_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @erfc_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erfc(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erfc(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @erfc_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erfc(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_erfc(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @erfc_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @erfc(double [[TMP1]]) #[[ATTR6:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @erfc(double [[TMP3]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @erfc(double [[TMP5]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @erfc(double [[TMP7]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @erfc(double [[TMP9]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @erfc(double [[TMP11]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @erfc(double [[TMP13]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @erfc(double [[TMP15]]) #[[ATTR6]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @erfc(double [[TMP1:%.*]]) #[[ATTR6:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @erfc(double [[TMP3:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @erfc(double [[TMP5:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @erfc(double [[TMP7:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @erfc(double [[TMP9:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @erfc(double [[TMP11:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @erfc(double [[TMP13:%.*]]) #[[ATTR6]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @erfc(double [[TMP15:%.*]]) #[[ATTR6]]
;
entry:
br label %for.body
@@ -2560,94 +984,27 @@ for.end:
}
define void @cbrt_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @cbrt_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cbrt(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cbrt(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @cbrt_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cbrt(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cbrt(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cbrt_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @cbrt(double [[TMP1]]) #[[ATTR7:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @cbrt(double [[TMP3]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @cbrt(double [[TMP5]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @cbrt(double [[TMP7]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @cbrt(double [[TMP9]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @cbrt(double [[TMP11]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @cbrt(double [[TMP13]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @cbrt(double [[TMP15]]) #[[ATTR7]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @cbrt(double [[TMP1:%.*]]) #[[ATTR7:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @cbrt(double [[TMP3:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @cbrt(double [[TMP5:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @cbrt(double [[TMP7:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @cbrt(double [[TMP9:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @cbrt(double [[TMP11:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @cbrt(double [[TMP13:%.*]]) #[[ATTR7]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @cbrt(double [[TMP15:%.*]]) #[[ATTR7]]
;
entry:
br label %for.body
@@ -2668,94 +1025,27 @@ for.end:
}
define void @expm1_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @expm1_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_expm1(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_expm1(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @expm1_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_expm1(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_expm1(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @expm1_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @expm1(double [[TMP1]]) #[[ATTR8:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @expm1(double [[TMP3]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @expm1(double [[TMP5]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @expm1(double [[TMP7]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @expm1(double [[TMP9]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @expm1(double [[TMP11]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @expm1(double [[TMP13]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @expm1(double [[TMP15]]) #[[ATTR8]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @expm1(double [[TMP1:%.*]]) #[[ATTR8:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @expm1(double [[TMP3:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @expm1(double [[TMP5:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @expm1(double [[TMP7:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @expm1(double [[TMP9:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @expm1(double [[TMP11:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @expm1(double [[TMP13:%.*]]) #[[ATTR8]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @expm1(double [[TMP15:%.*]]) #[[ATTR8]]
;
entry:
br label %for.body
@@ -2776,94 +1066,27 @@ for.end:
}
define void @log1p_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @log1p_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log1p(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log1p(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @log1p_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log1p(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log1p(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log1p_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @log1p(double [[TMP1]]) #[[ATTR9:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @log1p(double [[TMP3]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @log1p(double [[TMP5]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @log1p(double [[TMP7]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @log1p(double [[TMP9]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @log1p(double [[TMP11]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @log1p(double [[TMP13]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @log1p(double [[TMP15]]) #[[ATTR9]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @log1p(double [[TMP1:%.*]]) #[[ATTR9:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @log1p(double [[TMP3:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @log1p(double [[TMP5:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @log1p(double [[TMP7:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @log1p(double [[TMP9:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @log1p(double [[TMP11:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @log1p(double [[TMP13:%.*]]) #[[ATTR9]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @log1p(double [[TMP15:%.*]]) #[[ATTR9]]
;
entry:
br label %for.body
@@ -2884,94 +1107,27 @@ for.end:
}
define void @asinh_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @asinh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asinh(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asinh(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @asinh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asinh(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asinh(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @asinh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @asinh(double [[TMP1]]) #[[ATTR10:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @asinh(double [[TMP3]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @asinh(double [[TMP5]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @asinh(double [[TMP7]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @asinh(double [[TMP9]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @asinh(double [[TMP11]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @asinh(double [[TMP13]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @asinh(double [[TMP15]]) #[[ATTR10]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @asinh(double [[TMP1:%.*]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @asinh(double [[TMP3:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @asinh(double [[TMP5:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @asinh(double [[TMP7:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @asinh(double [[TMP9:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @asinh(double [[TMP11:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @asinh(double [[TMP13:%.*]]) #[[ATTR10]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @asinh(double [[TMP15:%.*]]) #[[ATTR10]]
;
entry:
br label %for.body
@@ -2992,94 +1148,27 @@ for.end:
}
define void @acosh_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @acosh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acosh(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acosh(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @acosh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acosh(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acosh(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @acosh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @acosh(double [[TMP1]]) #[[ATTR11:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @acosh(double [[TMP3]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @acosh(double [[TMP5]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @acosh(double [[TMP7]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @acosh(double [[TMP9]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @acosh(double [[TMP11]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @acosh(double [[TMP13]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @acosh(double [[TMP15]]) #[[ATTR11]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @acosh(double [[TMP1:%.*]]) #[[ATTR11:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @acosh(double [[TMP3:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @acosh(double [[TMP5:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @acosh(double [[TMP7:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @acosh(double [[TMP9:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @acosh(double [[TMP11:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @acosh(double [[TMP13:%.*]]) #[[ATTR11]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @acosh(double [[TMP15:%.*]]) #[[ATTR11]]
;
entry:
br label %for.body
@@ -3100,94 +1189,27 @@ for.end:
}
define void @atanh_f64(ptr nocapture %varray) {
+;
+;
+;
; CHECK-VF2-LABEL: define void @atanh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF2-NEXT: [[ENTRY:.*:]]
-; CHECK-VF2-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF2: [[VECTOR_PH]]:
-; CHECK-VF2-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF2: [[VECTOR_BODY]]:
-; CHECK-VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF2-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-VF2-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atanh(<2 x double> [[TMP0]])
-; CHECK-VF2-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF2-NEXT: store <2 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-VF2-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-VF2-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF2-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
-; CHECK-VF2: [[MIDDLE_BLOCK]]:
-; CHECK-VF2-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF2: [[FOR_END]]:
-; CHECK-VF2-NEXT: ret void
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atanh(<2 x double> [[TMP0:%.*]])
;
; CHECK-VF4-LABEL: define void @atanh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4-NEXT: [[ENTRY:.*:]]
-; CHECK-VF4-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF4: [[VECTOR_PH]]:
-; CHECK-VF4-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF4: [[VECTOR_BODY]]:
-; CHECK-VF4-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF4-NEXT: [[TMP0:%.*]] = sitofp <4 x i32> [[VEC_IND]] to <4 x double>
-; CHECK-VF4-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atanh(<4 x double> [[TMP0]])
-; CHECK-VF4-NEXT: [[TMP2:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF4-NEXT: store <4 x double> [[TMP1]], ptr [[TMP2]], align 8
-; CHECK-VF4-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-VF4-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
-; CHECK-VF4-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF4-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
-; CHECK-VF4: [[MIDDLE_BLOCK]]:
-; CHECK-VF4-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF4: [[FOR_END]]:
-; CHECK-VF4-NEXT: ret void
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atanh(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @atanh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8-NEXT: [[ENTRY:.*:]]
-; CHECK-VF8-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK-VF8: [[VECTOR_PH]]:
-; CHECK-VF8-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK-VF8: [[VECTOR_BODY]]:
-; CHECK-VF8-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-VF8-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x double>
-; CHECK-VF8-NEXT: [[TMP1:%.*]] = extractelement <8 x double> [[TMP0]], i64 0
-; CHECK-VF8-NEXT: [[TMP2:%.*]] = tail call fast double @atanh(double [[TMP1]]) #[[ATTR12:[0-9]+]]
-; CHECK-VF8-NEXT: [[TMP3:%.*]] = extractelement <8 x double> [[TMP0]], i64 1
-; CHECK-VF8-NEXT: [[TMP4:%.*]] = tail call fast double @atanh(double [[TMP3]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP5:%.*]] = extractelement <8 x double> [[TMP0]], i64 2
-; CHECK-VF8-NEXT: [[TMP6:%.*]] = tail call fast double @atanh(double [[TMP5]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP7:%.*]] = extractelement <8 x double> [[TMP0]], i64 3
-; CHECK-VF8-NEXT: [[TMP8:%.*]] = tail call fast double @atanh(double [[TMP7]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP9:%.*]] = extractelement <8 x double> [[TMP0]], i64 4
-; CHECK-VF8-NEXT: [[TMP10:%.*]] = tail call fast double @atanh(double [[TMP9]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP11:%.*]] = extractelement <8 x double> [[TMP0]], i64 5
-; CHECK-VF8-NEXT: [[TMP12:%.*]] = tail call fast double @atanh(double [[TMP11]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP13:%.*]] = extractelement <8 x double> [[TMP0]], i64 6
-; CHECK-VF8-NEXT: [[TMP14:%.*]] = tail call fast double @atanh(double [[TMP13]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP15:%.*]] = extractelement <8 x double> [[TMP0]], i64 7
-; CHECK-VF8-NEXT: [[TMP16:%.*]] = tail call fast double @atanh(double [[TMP15]]) #[[ATTR12]]
-; CHECK-VF8-NEXT: [[TMP17:%.*]] = insertelement <8 x double> poison, double [[TMP2]], i32 0
-; CHECK-VF8-NEXT: [[TMP18:%.*]] = insertelement <8 x double> [[TMP17]], double [[TMP4]], i32 1
-; CHECK-VF8-NEXT: [[TMP19:%.*]] = insertelement <8 x double> [[TMP18]], double [[TMP6]], i32 2
-; CHECK-VF8-NEXT: [[TMP20:%.*]] = insertelement <8 x double> [[TMP19]], double [[TMP8]], i32 3
-; CHECK-VF8-NEXT: [[TMP21:%.*]] = insertelement <8 x double> [[TMP20]], double [[TMP10]], i32 4
-; CHECK-VF8-NEXT: [[TMP22:%.*]] = insertelement <8 x double> [[TMP21]], double [[TMP12]], i32 5
-; CHECK-VF8-NEXT: [[TMP23:%.*]] = insertelement <8 x double> [[TMP22]], double [[TMP14]], i32 6
-; CHECK-VF8-NEXT: [[TMP24:%.*]] = insertelement <8 x double> [[TMP23]], double [[TMP16]], i32 7
-; CHECK-VF8-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-VF8-NEXT: store <8 x double> [[TMP24]], ptr [[TMP25]], align 8
-; CHECK-VF8-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-VF8-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-VF8-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-VF8-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]]
-; CHECK-VF8: [[MIDDLE_BLOCK]]:
-; CHECK-VF8-NEXT: br label %[[FOR_END:.*]]
-; CHECK-VF8: [[FOR_END]]:
-; CHECK-VF8-NEXT: ret void
+; CHECK-VF8: [[TMP2:%.*]] = tail call fast double @atanh(double [[TMP1:%.*]]) #[[ATTR12:[0-9]+]]
+; CHECK-VF8: [[TMP4:%.*]] = tail call fast double @atanh(double [[TMP3:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @atanh(double [[TMP5:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP8:%.*]] = tail call fast double @atanh(double [[TMP7:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP10:%.*]] = tail call fast double @atanh(double [[TMP9:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @atanh(double [[TMP11:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP14:%.*]] = tail call fast double @atanh(double [[TMP13:%.*]]) #[[ATTR12]]
+; CHECK-VF8: [[TMP16:%.*]] = tail call fast double @atanh(double [[TMP15:%.*]]) #[[ATTR12]]
;
entry:
br label %for.body
@@ -3206,120 +1228,5 @@ for.body:
for.end:
ret void
}
-;.
-; CHECK-VF2: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF2: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF2: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF2: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
-; CHECK-VF2: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
-; CHECK-VF2: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
-; CHECK-VF2: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
-;.
-; CHECK-VF4: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF4: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF4: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF4: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
-; CHECK-VF4: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
-; CHECK-VF4: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
-; CHECK-VF4: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
-;.
-; CHECK-VF8: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK-VF8: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK-VF8: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK-VF8: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]}
-; CHECK-VF8: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]}
-; CHECK-VF8: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]]}
-; CHECK-VF8: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]}
-;.
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}
>From 4aed1440286ece646bec0b868a6cf9b901c77089 Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Mon, 27 Jul 2026 08:26:36 +0530
Subject: [PATCH 4/7] update VF2-VF8
---
.../X86/libm-vector-calls-VF2-VF8.ll | 462 ++----------------
1 file changed, 33 insertions(+), 429 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
index 53e7fc0d82bed..92b3fd3c3eb31 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
@@ -1,36 +1,14 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -S < %s | FileCheck %s
-
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*@" --version 6
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @sin_f64(ptr nocapture %varray) {
; CHECK-LABEL: define void @sin_f64(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -58,25 +36,7 @@ for.end:
define void @sin_f32(ptr nocapture %varray) {
; CHECK-LABEL: define void @sin_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -103,30 +63,7 @@ for.end:
define void @sin_f64_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @sin_f64_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -153,25 +90,7 @@ for.end:
define void @sin_f32_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @sin_f32_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -198,30 +117,7 @@ for.end:
define void @cos_f64(ptr nocapture %varray) {
; CHECK-LABEL: define void @cos_f64(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -248,25 +144,7 @@ for.end:
define void @cos_f32(ptr nocapture %varray) {
; CHECK-LABEL: define void @cos_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -293,30 +171,7 @@ for.end:
define void @cos_f64_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @cos_f64_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -343,25 +198,7 @@ for.end:
define void @cos_f32_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @cos_f32_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_cosf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -389,25 +226,7 @@ for.end:
define void @exp_f32(ptr nocapture %varray) {
; CHECK-LABEL: define void @exp_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -434,25 +253,7 @@ for.end:
define void @exp_f32_intrin(ptr nocapture %varray) {
; CHECK-LABEL: define void @exp_f32_intrin(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -480,25 +281,7 @@ for.end:
define void @log_f32(ptr nocapture %varray) {
; CHECK-LABEL: define void @log_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -525,47 +308,8 @@ for.end:
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-LABEL: define void @pow_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK: [[VECTOR_MEMCHECK]]:
-; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[SCALAR_PH]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = tail call fast float @powf(float [[CONV]], float [[TMP1]]) #[[ATTR3:[0-9]+]]
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK: [[I2:%.*]] = tail call fast float @powf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR3:[0-9]+]]
;
entry:
br label %for.body
@@ -575,10 +319,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
%arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @powf(float %conv, float %tmp1)
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @powf(float %conv, float %i1)
%arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
+ store float %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !121
@@ -594,47 +338,8 @@ for.end:
define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
; CHECK-LABEL: define void @pow_f32_intrin(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[EXP2:%.*]] = ptrtoint ptr [[EXP]] to i64
-; CHECK-NEXT: [[VARRAY1:%.*]] = ptrtoint ptr [[VARRAY]] to i64
-; CHECK-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
-; CHECK: [[VECTOR_MEMCHECK]]:
-; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[VARRAY1]], [[EXP2]]
-; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32
-; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDEX]]
-; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP2]], align 4
-; CHECK-NEXT: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1]], <8 x float> [[WIDE_LOAD]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP4]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[SCALAR_PH]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP]] to float
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[EXP]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV]], float [[TMP1]]) #[[ATTR4:[0-9]+]]
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store float [[TMP2]], ptr [[ARRAYIDX2]], align 4
-; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1000
-; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END]], label %[[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[TMP1:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK: [[I2:%.*]] = tail call fast float @llvm.pow.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR4:[0-9]+]]
;
entry:
br label %for.body
@@ -644,10 +349,10 @@ for.body:
%tmp = trunc i64 %indvars.iv to i32
%conv = sitofp i32 %tmp to float
%arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
- %tmp1 = load float, ptr %arrayidx, align 4
- %tmp2 = tail call fast float @llvm.pow.f32(float %conv, float %tmp1)
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @llvm.pow.f32(float %conv, float %i1)
%arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
- store float %tmp2, ptr %arrayidx2, align 4
+ store float %i2, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !131
@@ -663,30 +368,7 @@ for.end:
define void @tan_f64(ptr nocapture %varray) {
; CHECK-LABEL: define void @tan_f64(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -714,25 +396,7 @@ for.end:
define void @tan_f32(ptr nocapture %varray) {
; CHECK-LABEL: define void @tan_f32(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -759,30 +423,7 @@ for.end:
define void @tan_f64_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @tan_f64_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 2)
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <2 x i32> [[VEC_IND]] to <2 x double>
-; CHECK-NEXT: [[TMP1:%.*]] = sitofp <2 x i32> [[STEP_ADD]] to <2 x double>
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0]])
-; CHECK-NEXT: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1]])
-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[TMP4]], i64 2
-; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[TMP4]], align 4
-; CHECK-NEXT: store <2 x double> [[TMP3]], ptr [[TMP5]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[STEP_ADD]], splat (i32 2)
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP3:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP1:%.*]])
;
entry:
br label %for.body
@@ -809,25 +450,7 @@ for.end:
define void @tan_f32_intrinsic(ptr nocapture %varray) {
; CHECK-LABEL: define void @tan_f32_intrinsic(
; CHECK-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
-; CHECK: [[VECTOR_PH]]:
-; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
-; CHECK: [[VECTOR_BODY]]:
-; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-NEXT: [[TMP0:%.*]] = sitofp <8 x i32> [[VEC_IND]] to <8 x float>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0]])
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[VARRAY]], i64 [[INDEX]]
-; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4
-; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
-; CHECK-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], splat (i32 8)
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
-; CHECK: [[MIDDLE_BLOCK]]:
-; CHECK-NEXT: br label %[[FOR_END:.*]]
-; CHECK: [[FOR_END]]:
-; CHECK-NEXT: ret void
+; CHECK: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanf(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -864,26 +487,7 @@ declare float @tanf(float) #0
declare float @expf(float) #0
declare float @powf(float, float) #0
declare float @logf(float) #0
-;.
-; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
-; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
-; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
-; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
-; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
-; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
-; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
-; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]}
-; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
-; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
-; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
-; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}
-; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
-; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]]}
-; CHECK: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]}
-; CHECK: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]]}
-; CHECK: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]}
-; CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]}
-; CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]], [[META2]]}
-; CHECK: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]}
-; CHECK: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]], [[META2]]}
-;.
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-VF2: {{.*}}
+; CHECK-VF4: {{.*}}
+; CHECK-VF8: {{.*}}
>From a76d2d31e682afd4562a2216983fd9e242d61321 Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Sat, 1 Aug 2026 01:14:26 +0530
Subject: [PATCH 5/7] cleanup noise
---
.../LoopVectorize/X86/libm-vector-calls.ll | 96 -------------------
1 file changed, 96 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index b1f0e6b92a837..1cb63f7664df0 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -68,9 +68,6 @@ for.end:
}
define void @sin_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @sin_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0:%.*]])
@@ -102,9 +99,6 @@ for.end:
}
define void @sin_f64_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @sin_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sin(<2 x double> [[TMP0:%.*]])
@@ -136,9 +130,6 @@ for.end:
}
define void @sin_f32_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @sin_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP0:%.*]])
@@ -170,9 +161,6 @@ for.end:
}
define void @cos_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cos_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0:%.*]])
@@ -204,9 +192,6 @@ for.end:
}
define void @cos_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cos_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0:%.*]])
@@ -238,9 +223,6 @@ for.end:
}
define void @cos_f64_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cos_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cos(<2 x double> [[TMP0:%.*]])
@@ -272,9 +254,6 @@ for.end:
}
define void @cos_f32_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cos_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP0:%.*]])
@@ -306,9 +285,6 @@ for.end:
}
define void @tan_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @tan_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0:%.*]])
@@ -340,9 +316,6 @@ for.end:
}
define void @tan_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @tan_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0:%.*]])
@@ -374,9 +347,6 @@ for.end:
}
define void @tan_f64_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @tan_f64_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tan(<2 x double> [[TMP0:%.*]])
@@ -408,9 +378,6 @@ for.end:
}
define void @tan_f32_intrinsic(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @tan_f32_intrinsic(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP0:%.*]])
@@ -442,9 +409,6 @@ for.end:
}
define void @exp_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @exp_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0:%.*]])
@@ -476,9 +440,6 @@ for.end:
}
define void @exp_f32_intrin(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @exp_f32_intrin(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP0:%.*]])
@@ -510,9 +471,6 @@ for.end:
}
define void @log_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @log_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP0:%.*]])
@@ -544,9 +502,6 @@ for.end:
}
define void @pow_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @pow_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
@@ -583,9 +538,6 @@ for.end:
}
define void @pow_f32_intrin(ptr nocapture %varray, ptr nocapture readonly %exp) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @pow_f32_intrin(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x float> @llvm.pow.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
@@ -622,9 +574,6 @@ for.end:
}
define void @erf_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @erf_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @erff(float [[TMP1:%.*]]) #[[ATTR5:[0-9]+]]
@@ -657,9 +606,6 @@ for.end:
}
define void @erfc_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @erfc_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @erfcf(float [[TMP1:%.*]]) #[[ATTR6:[0-9]+]]
@@ -692,9 +638,6 @@ for.end:
}
define void @cbrt_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cbrt_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @cbrtf(float [[TMP1:%.*]]) #[[ATTR7:[0-9]+]]
@@ -727,9 +670,6 @@ for.end:
}
define void @expm1_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @expm1_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @expm1f(float [[TMP1:%.*]]) #[[ATTR8:[0-9]+]]
@@ -762,9 +702,6 @@ for.end:
}
define void @log1p_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @log1p_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @log1pf(float [[TMP1:%.*]]) #[[ATTR9:[0-9]+]]
@@ -797,9 +734,6 @@ for.end:
}
define void @asinh_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @asinh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @asinhf(float [[TMP1:%.*]]) #[[ATTR10:[0-9]+]]
@@ -832,9 +766,6 @@ for.end:
}
define void @acosh_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @acosh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @acoshf(float [[TMP1:%.*]]) #[[ATTR11:[0-9]+]]
@@ -867,9 +798,6 @@ for.end:
}
define void @atanh_f32(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @atanh_f32(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP2:%.*]] = tail call fast float @atanhf(float [[TMP1:%.*]]) #[[ATTR12:[0-9]+]]
@@ -902,9 +830,6 @@ for.end:
}
define void @erf_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @erf_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erf(<2 x double> [[TMP0:%.*]])
@@ -943,9 +868,6 @@ for.end:
}
define void @erfc_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @erfc_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_erfc(<2 x double> [[TMP0:%.*]])
@@ -984,9 +906,6 @@ for.end:
}
define void @cbrt_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @cbrt_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cbrt(<2 x double> [[TMP0:%.*]])
@@ -1025,9 +944,6 @@ for.end:
}
define void @expm1_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @expm1_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_expm1(<2 x double> [[TMP0:%.*]])
@@ -1066,9 +982,6 @@ for.end:
}
define void @log1p_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @log1p_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log1p(<2 x double> [[TMP0:%.*]])
@@ -1107,9 +1020,6 @@ for.end:
}
define void @asinh_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @asinh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asinh(<2 x double> [[TMP0:%.*]])
@@ -1148,9 +1058,6 @@ for.end:
}
define void @acosh_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @acosh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acosh(<2 x double> [[TMP0:%.*]])
@@ -1189,9 +1096,6 @@ for.end:
}
define void @atanh_f64(ptr nocapture %varray) {
-;
-;
-;
; CHECK-VF2-LABEL: define void @atanh_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atanh(<2 x double> [[TMP0:%.*]])
>From 90df603eaae1f71f06b03bab77b23136e8e6111d Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Mon, 3 Aug 2026 20:19:26 +0530
Subject: [PATCH 6/7] Drop unused CHECK lines
---
.../Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll | 2 --
llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll | 2 --
2 files changed, 4 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
index 34557dfb52d95..17ca47270ff6d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
@@ -232,5 +232,3 @@ declare float @__logf_finite(float) #0
declare double @__log_finite(double) #0
declare float @__powf_finite(float, float) #0
declare double @__pow_finite(double, double) #0
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index 1cb63f7664df0..b10a5044850d1 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -1132,5 +1132,3 @@ for.body:
for.end:
ret void
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK: {{.*}}
>From d8123d87c650258a9b92116cdd37bd1e98b02c26 Mon Sep 17 00:00:00 2001
From: Ankit Kumar Tiwari <ankit.cybertron at gmail.com>
Date: Tue, 4 Aug 2026 08:20:03 +0530
Subject: [PATCH 7/7] Drop unused CHECK prefix
---
.../LoopVectorize/X86/libm-vector-calls-finite.ll | 6 +++---
llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
index 17ca47270ff6d..e495fa6676f6c 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*@" --version 6
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF2
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF4
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF8
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index b10a5044850d1..84cab4bc95901 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "call.*@" --version 6
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
-; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF2
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF4
+; RUN: opt -vector-library=LIBMVEC -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefixes=CHECK-VF8
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
More information about the llvm-commits
mailing list