[llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)

[Matt Arsenault via llvm-commits]

=?utf-8?q?Ömer_Sinan_Ağacan?= <omeragacan at gmail.com>,
=?utf-8?q?Ömer_Sinan_Ağacan?= <omeragacan at gmail.com>,
=?utf-8?q?Ömer_Sinan_Ağacan?= <omer at osa1.net>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/210665 at github.com>


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@@ -121,17 +120,30 @@ if.end:
 ; (the llvm.set.rounding is irrelevant, but both could trap).
 
 define float @set_rounding(float %x, float %y) {
-; CHECK-LABEL: set_rounding:
-; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    mrs x8, FPCR
-; CHECK-NEXT:    fadd s0, s0, s1
-; CHECK-NEXT:    orr x8, x8, #0xc00000
-; CHECK-NEXT:    msr FPCR, x8
-; CHECK-NEXT:    mrs x8, FPCR
-; CHECK-NEXT:    and x8, x8, #0xffffffffff3fffff
-; CHECK-NEXT:    msr FPCR, x8
-; CHECK-NEXT:    fsub s0, s0, s0
-; CHECK-NEXT:    ret
+; CHECK-SD-LABEL: set_rounding:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    mrs x8, FPCR
+; CHECK-SD-NEXT:    fadd s0, s0, s1
+; CHECK-SD-NEXT:    orr x8, x8, #0xc00000
+; CHECK-SD-NEXT:    msr FPCR, x8
+; CHECK-SD-NEXT:    mrs x8, FPCR
+; CHECK-SD-NEXT:    and x8, x8, #0xffffffffff3fffff
+; CHECK-SD-NEXT:    msr FPCR, x8
+; CHECK-SD-NEXT:    fsub s0, s0, s0
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: set_rounding:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    mrs x8, FPCR
+; CHECK-GI-NEXT:    fadd s0, s0, s1
+; CHECK-GI-NEXT:    and x8, x8, #0xffffffffff3fffff
+; CHECK-GI-NEXT:    orr x8, x8, #0xc00000
+; CHECK-GI-NEXT:    msr FPCR, x8
+; CHECK-GI-NEXT:    mrs x8, FPCR
+; CHECK-GI-NEXT:    and x8, x8, #0xffffffffff3fffff
+; CHECK-GI-NEXT:    msr FPCR, x8
+; CHECK-GI-NEXT:    fsub s0, s0, s0
+; CHECK-GI-NEXT:    ret
 entry:
   %add1 = fadd float %x, %y
----------------
arsenm wrote:

I'm surprised this doesn't fail the verifier as-is, we maybe should stick strictfp on these intrinsic definition 

https://github.com/llvm/llvm-project/pull/210665