[llvm] [GlobalISel] emit G_BITCAST in widenScalarMergeValues when DstTy does not match WideTy (PR #203014)
Kacper Doga via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 3 03:27:22 PDT 2026
https://github.com/varev-dev updated https://github.com/llvm/llvm-project/pull/203014
>From 0f5f1effec5f884708d9c949785565758423ac54 Mon Sep 17 00:00:00 2001
From: "Doga, Kacper" <kacper.doga at intel.com>
Date: Wed, 10 Jun 2026 17:07:22 +0200
Subject: [PATCH 1/5] [GlobalISel] emit G_BITCAST in widenScalarMergeValues
when DstTy does not match WideTy
**Problem:**
`LegalizerHelper::widenScalarMergeValues` does not handle the case where the destination register type is a floating-point type but the widen operation produces an integer type of the same size.
For example, given:
```
%0:_(i8) = G_CONSTANT i8 0
%1:_(i8) = G_CONSTANT i8 1
%2:_(f16) = G_MERGE_VALUES %0:_(i8), %1_:(i8)
```
With a `minScalarOrElt` rule widening the source type to I16, `widenScalarMergeValues` enters the `WideSize >= DstSize` path and assigns the result to a new virtual register.
The condition used to assign directly to DstReg uses type equality (WideTy == DstTy), which fails when DstTy = f16. As a result, DstReg is left without a definition.
**Fix:**
After the OR-reduction loop, add a check for the case where DstTy and WideTy have equal sizes but different types, and emit a G_BITCAST.
**Testing:**
No currently upstream target exercises `G_MERGE_VALUES` with a floating-point destination type through this widen path, as most targets promote f16 to s16 before legalization.
The fix is therefore covered by a unit test in `LegalizerHelperTest.cpp`, modeled after the existing `WidenScalarMergeValuesPointer` test, which directly invokes widenScalar on a manually constructed `f16 = G_MERGE_VALUES i8, i8` instruction and verifies that a `G_BITCAST` is emitted as the final instruction.
---
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +
.../GlobalISel/LegalizerHelperTest.cpp | 40 +++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index c37ff39e8499e..427ac4131cb6d 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -2283,6 +2283,8 @@ LegalizerHelper::widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx,
MIRBuilder.buildTrunc(DstReg, ResultReg);
else if (DstTy.isPointer())
MIRBuilder.buildIntToPtr(DstReg, ResultReg);
+ else if (WideSize == DstSize && DstTy != WideTy)
+ MIRBuilder.buildBitcast(DstReg, ResultReg);
MI.eraseFromParent();
return Legalized;
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index 3785bf5126eb5..db9c92ef615a0 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -1895,6 +1895,46 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesPointer) {
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
}
+TEST_F(AArch64GISelMITest, WidenScalarMergeValuesFloat) {
+ setUp();
+ if (!TM)
+ GTEST_SKIP();
+
+ constexpr ElementCount EC0 = ElementCount::getFixed(0);
+ const LLT I8 = LLT(LLT::Kind::INTEGER, EC0, 8);
+ const LLT I16 = LLT(LLT::Kind::INTEGER, EC0, 16);
+ const LLT F16 = LLT::float16();
+
+ DefineLegalizerInfo(A, {});
+
+ AInfo Info(MF->getSubtarget());
+ DummyGISelObserver Observer;
+ LegalizerHelper Helper(*MF, Info, Observer, B);
+ B.setInsertPt(*EntryMBB, EntryMBB->end());
+
+ auto Lo = B.buildTrunc(I8, Copies[0]);
+ auto Hi = B.buildTrunc(I8, Copies[1]);
+
+ auto Merge = B.buildMergeLikeInstr(F16, {Lo, Hi});
+
+ B.setInstr(*Merge);
+ EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
+ Helper.widenScalar(*Merge, 1, I16));
+
+ const auto *CheckStr = R"(
+ CHECK: [[TRUNC0:%[0-9]+]]:_(i8) = G_TRUNC
+ CHECK: [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC
+ CHECK: [[ZEXT_TRUNC0:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC0]]
+ CHECK: [[ZEXT_TRUNC1:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC1]]
+ CHECK: [[SHIFT_AMT:%[0-9]+]]:_(i16) = G_CONSTANT i16 8
+ CHECK: [[SHL:%[0-9]+]]:_(i16) = G_SHL [[ZEXT_TRUNC1]]:_, [[SHIFT_AMT]]
+ CHECK: [[OR:%[0-9]+]]:_(i16) = G_OR [[ZEXT_TRUNC0]]:_, [[SHL]]
+ CHECK: [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[OR]]:_(i16)
+ )";
+
+ EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
+}
+
TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
setUp();
if (!TM)
>From 827d244e8cc52f364de55e7c3cfc66979d8058a3 Mon Sep 17 00:00:00 2001
From: "Doga, Kacper" <kacper.doga at intel.com>
Date: Thu, 11 Jun 2026 08:41:32 +0200
Subject: [PATCH 2/5] add coverage for bfloat, remove redundant size comparison
---
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +-
.../GlobalISel/LegalizerHelperTest.cpp | 40 +++++++++++++++++++
2 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 427ac4131cb6d..65d71a481dbdc 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -2283,7 +2283,7 @@ LegalizerHelper::widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx,
MIRBuilder.buildTrunc(DstReg, ResultReg);
else if (DstTy.isPointer())
MIRBuilder.buildIntToPtr(DstReg, ResultReg);
- else if (WideSize == DstSize && DstTy != WideTy)
+ else if (DstTy != WideTy)
MIRBuilder.buildBitcast(DstReg, ResultReg);
MI.eraseFromParent();
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index db9c92ef615a0..07339015ef839 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -1935,6 +1935,46 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesFloat) {
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
}
+TEST_F(AArch64GISelMITest, WidenScalarMergeValuesBFloat) {
+ setUp();
+ if (!TM)
+ GTEST_SKIP();
+
+ constexpr ElementCount EC0 = ElementCount::getFixed(0);
+ const LLT I8 = LLT(LLT::Kind::INTEGER, EC0, 8);
+ const LLT I16 = LLT(LLT::Kind::INTEGER, EC0, 16);
+ const LLT BF16 = LLT::bfloat16();
+
+ DefineLegalizerInfo(A, {});
+
+ AInfo Info(MF->getSubtarget());
+ DummyGISelObserver Observer;
+ LegalizerHelper Helper(*MF, Info, Observer, B);
+ B.setInsertPt(*EntryMBB, EntryMBB->end());
+
+ auto Lo = B.buildTrunc(I8, Copies[0]);
+ auto Hi = B.buildTrunc(I8, Copies[1]);
+
+ auto Merge = B.buildMergeLikeInstr(BF16, {Lo, Hi});
+
+ B.setInstr(*Merge);
+ EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
+ Helper.widenScalar(*Merge, 1, I16));
+
+ const auto *CheckStr = R"(
+ CHECK: [[TRUNC0:%[0-9]+]]:_(i8) = G_TRUNC
+ CHECK: [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC
+ CHECK: [[ZEXT_TRUNC0:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC0]]
+ CHECK: [[ZEXT_TRUNC1:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC1]]
+ CHECK: [[SHIFT_AMT:%[0-9]+]]:_(i16) = G_CONSTANT i16 8
+ CHECK: [[SHL:%[0-9]+]]:_(i16) = G_SHL [[ZEXT_TRUNC1]]:_, [[SHIFT_AMT]]
+ CHECK: [[OR:%[0-9]+]]:_(i16) = G_OR [[ZEXT_TRUNC0]]:_, [[SHL]]
+ CHECK: [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[OR]]:_(i16)
+ )";
+
+ EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
+}
+
TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
setUp();
if (!TM)
>From b3f8c67f925f114486c5a5422e15156a5993e7ac Mon Sep 17 00:00:00 2001
From: "Doga, Kacper" <kacper.doga at intel.com>
Date: Mon, 20 Jul 2026 08:42:34 +0200
Subject: [PATCH 3/5] change llt int def
---
.../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index 07339015ef839..9348d118ff0da 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -1900,9 +1900,8 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesFloat) {
if (!TM)
GTEST_SKIP();
- constexpr ElementCount EC0 = ElementCount::getFixed(0);
- const LLT I8 = LLT(LLT::Kind::INTEGER, EC0, 8);
- const LLT I16 = LLT(LLT::Kind::INTEGER, EC0, 16);
+ const LLT I8 = LLT::integer(8);
+ const LLT I16 = LLT::integer(16);
const LLT F16 = LLT::float16();
DefineLegalizerInfo(A, {});
@@ -1940,9 +1939,8 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesBFloat) {
if (!TM)
GTEST_SKIP();
- constexpr ElementCount EC0 = ElementCount::getFixed(0);
- const LLT I8 = LLT(LLT::Kind::INTEGER, EC0, 8);
- const LLT I16 = LLT(LLT::Kind::INTEGER, EC0, 16);
+ const LLT I8 = LLT::integer(8);
+ const LLT I16 = LLT::integer(16);
const LLT BF16 = LLT::bfloat16();
DefineLegalizerInfo(A, {});
>From 407df07f8cae181d4f8e63420431e6c649f92428 Mon Sep 17 00:00:00 2001
From: "Doga, Kacper" <kacper.doga at intel.com>
Date: Thu, 30 Jul 2026 23:51:41 +0200
Subject: [PATCH 4/5] add MIR and LL tests
---
.../AMDGPU/GlobalISel/fp-int-conversions.ll | 50 +++++++++++++++++++
.../GlobalISel/legalize-merge-values.mir | 45 +++++++++++++++++
2 files changed, 95 insertions(+)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
index 49b4295c86b8a..cdc83b0aab25e 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
@@ -733,5 +733,55 @@ define amdgpu_ps float @fptosi_v4f32_to_v4i8_bitcast_f32(<4 x float> %v) {
%res = bitcast <4 x i8> %cvt to float
ret float %res
}
+
+define amdgpu_ps half @fptosi_v2f32_to_v2i8_bitcast_f16(<2 x float> %v) {
+; TRUE16-LABEL: fptosi_v2f32_to_v2i8_bitcast_f16:
+; TRUE16: ; %bb.0:
+; TRUE16: v_cvt_i32_f32_e32 v1, v1
+; TRUE16: v_cvt_i32_f32_e32 v2, v0
+; TRUE16: v_and_b16 v0.l, 0xff, v1.l
+; TRUE16: v_and_b16 v0.h, 0xff, v2.l
+; TRUE16: v_lshlrev_b16 v0.l, 8, v0.l
+; TRUE16: v_or_b16 v0.l, v0.h, v0.l
+; TRUE16: ; return to shader part epilog
+;
+; GFX12-LABEL: fptosi_v2f32_to_v2i8_bitcast_f16:
+; GFX12: ; %bb.0:
+; GFX12: v_cvt_i32_f32_e32 v1, v1
+; GFX12: v_cvt_i32_f32_e32 v2, v0
+; GFX12: v_and_b16 v0.l, 0xff, v1.l
+; GFX12: v_and_b16 v0.h, 0xff, v2.l
+; GFX12: v_lshlrev_b16 v0.l, 8, v0.l
+; GFX12: v_or_b16 v0.l, v0.h, v0.l
+; GFX12: ; return to shader part epilog
+ %cvt = fptosi <2 x float> %v to <2 x i8>
+ %res = bitcast <2 x i8> %cvt to half
+ ret half %res
+}
+
+define amdgpu_ps bfloat @fptosi_v2f32_to_v2i8_bitcast_bf16(<2 x float> %v) {
+; TRUE16-LABEL: fptosi_v2f32_to_v2i8_bitcast_bf16:
+; TRUE16: ; %bb.0:
+; TRUE16: v_cvt_i32_f32_e32 v1, v1
+; TRUE16: v_cvt_i32_f32_e32 v2, v0
+; TRUE16: v_and_b16 v0.l, 0xff, v1.l
+; TRUE16: v_and_b16 v0.h, 0xff, v2.l
+; TRUE16: v_lshlrev_b16 v0.l, 8, v0.l
+; TRUE16: v_or_b16 v0.l, v0.h, v0.l
+; TRUE16: ; return to shader part epilog
+;
+; GFX12-LABEL: fptosi_v2f32_to_v2i8_bitcast_bf16:
+; GFX12: ; %bb.0:
+; GFX12: v_cvt_i32_f32_e32 v1, v1
+; GFX12: v_cvt_i32_f32_e32 v2, v0
+; GFX12: v_and_b16 v0.l, 0xff, v1.l
+; GFX12: v_and_b16 v0.h, 0xff, v2.l
+; GFX12: v_lshlrev_b16 v0.l, 8, v0.l
+; GFX12: v_or_b16 v0.l, v0.h, v0.l
+; GFX12: ; return to shader part epilog
+ %cvt = fptosi <2 x float> %v to <2 x i8>
+ %res = bitcast <2 x i8> %cvt to bfloat
+ ret bfloat %res
+}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; FAKE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
index 84117ac429497..2a23156621fdf 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
@@ -105,6 +105,51 @@ body: |
$vgpr0 = COPY %3
...
+---
+name: test_merge_f16_i8_i8
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: test_merge_f16_i8_i8
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i32) = G_SHL [[C]], [[C2]](i32)
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[SHL]](i32)
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i16) = G_OR [[C1]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[OR]](i16)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(f16) = G_TRUNC [[ANYEXT]](i32)
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT [[TRUNC1]](f16)
+ ; CHECK-NEXT: $vgpr0 = COPY [[FPEXT]](f32)
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 1
+ %2:_(f16) = G_MERGE_VALUES %0(i8), %1(i8)
+ %3:_(f32) = G_FPEXT %2(f16)
+ $vgpr0 = COPY %3(f32)
+...
+
+---
+name: test_merge_bf16_i8_i8
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: test_merge_bf16_i8_i8
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 0
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i32) = G_SHL [[C]], [[C2]](i32)
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[SHL]](i32)
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i16) = G_OR [[C1]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[OR]](i16)
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(i32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(i32) = G_SHL [[ANYEXT]], [[C3]](i32)
+ ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(f32) = G_BITCAST [[SHL1]](i32)
+ ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST]](f32)
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 1
+ %2:_(bf16) = G_MERGE_VALUES %0(i8), %1(i8)
+ %3:_(f32) = G_FPEXT %2(bf16)
+ $vgpr0 = COPY %3(f32)
+...
+
---
name: test_merge_s24_s8_s8_s8
body: |
>From ff8f9c64e25447defa6fe1131838bb9b009dad92 Mon Sep 17 00:00:00 2001
From: "Doga, Kacper" <kacper.doga at intel.com>
Date: Mon, 3 Aug 2026 12:21:51 +0200
Subject: [PATCH 5/5] remove unit tests
---
.../GlobalISel/LegalizerHelperTest.cpp | 78 -------------------
1 file changed, 78 deletions(-)
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index 9348d118ff0da..3785bf5126eb5 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -1895,84 +1895,6 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesPointer) {
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
}
-TEST_F(AArch64GISelMITest, WidenScalarMergeValuesFloat) {
- setUp();
- if (!TM)
- GTEST_SKIP();
-
- const LLT I8 = LLT::integer(8);
- const LLT I16 = LLT::integer(16);
- const LLT F16 = LLT::float16();
-
- DefineLegalizerInfo(A, {});
-
- AInfo Info(MF->getSubtarget());
- DummyGISelObserver Observer;
- LegalizerHelper Helper(*MF, Info, Observer, B);
- B.setInsertPt(*EntryMBB, EntryMBB->end());
-
- auto Lo = B.buildTrunc(I8, Copies[0]);
- auto Hi = B.buildTrunc(I8, Copies[1]);
-
- auto Merge = B.buildMergeLikeInstr(F16, {Lo, Hi});
-
- B.setInstr(*Merge);
- EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
- Helper.widenScalar(*Merge, 1, I16));
-
- const auto *CheckStr = R"(
- CHECK: [[TRUNC0:%[0-9]+]]:_(i8) = G_TRUNC
- CHECK: [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC
- CHECK: [[ZEXT_TRUNC0:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC0]]
- CHECK: [[ZEXT_TRUNC1:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC1]]
- CHECK: [[SHIFT_AMT:%[0-9]+]]:_(i16) = G_CONSTANT i16 8
- CHECK: [[SHL:%[0-9]+]]:_(i16) = G_SHL [[ZEXT_TRUNC1]]:_, [[SHIFT_AMT]]
- CHECK: [[OR:%[0-9]+]]:_(i16) = G_OR [[ZEXT_TRUNC0]]:_, [[SHL]]
- CHECK: [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[OR]]:_(i16)
- )";
-
- EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
-}
-
-TEST_F(AArch64GISelMITest, WidenScalarMergeValuesBFloat) {
- setUp();
- if (!TM)
- GTEST_SKIP();
-
- const LLT I8 = LLT::integer(8);
- const LLT I16 = LLT::integer(16);
- const LLT BF16 = LLT::bfloat16();
-
- DefineLegalizerInfo(A, {});
-
- AInfo Info(MF->getSubtarget());
- DummyGISelObserver Observer;
- LegalizerHelper Helper(*MF, Info, Observer, B);
- B.setInsertPt(*EntryMBB, EntryMBB->end());
-
- auto Lo = B.buildTrunc(I8, Copies[0]);
- auto Hi = B.buildTrunc(I8, Copies[1]);
-
- auto Merge = B.buildMergeLikeInstr(BF16, {Lo, Hi});
-
- B.setInstr(*Merge);
- EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
- Helper.widenScalar(*Merge, 1, I16));
-
- const auto *CheckStr = R"(
- CHECK: [[TRUNC0:%[0-9]+]]:_(i8) = G_TRUNC
- CHECK: [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC
- CHECK: [[ZEXT_TRUNC0:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC0]]
- CHECK: [[ZEXT_TRUNC1:%[0-9]+]]:_(i16) = G_ZEXT [[TRUNC1]]
- CHECK: [[SHIFT_AMT:%[0-9]+]]:_(i16) = G_CONSTANT i16 8
- CHECK: [[SHL:%[0-9]+]]:_(i16) = G_SHL [[ZEXT_TRUNC1]]:_, [[SHIFT_AMT]]
- CHECK: [[OR:%[0-9]+]]:_(i16) = G_OR [[ZEXT_TRUNC0]]:_, [[SHL]]
- CHECK: [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[OR]]:_(i16)
- )";
-
- EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
-}
-
TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
setUp();
if (!TM)
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