[llvm] [DAG] Change `isExtractSubvectorCheap` into `getExtractSubvectorCost` (PR #213614)

[via llvm-commits]

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@@ -27777,7 +27777,7 @@ static SDValue narrowExtractedVectorBinOp(EVT VT, SDValue Src, unsigned Index,
   // bitcasted.
   unsigned ConcatOpNum = Index / VT.getVectorNumElements();
   unsigned ExtBOIdx = ConcatOpNum * NarrowBVT.getVectorNumElements();
-  if (TLI.isExtractSubvectorCheap(NarrowBVT, WideBVT, ExtBOIdx) &&
+  if ((TLI.getExtractSubvectorCost(NarrowBVT, WideBVT, ExtBOIdx) < 2) &&
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Shoreshen wrote:

Hi @lukel97 , I checked x86 and AArch64, it both allow extracting upper and lower half as cheap. However, extracting upper half is not free for those 2 targets.

For AMD backend, it also not the case, but it need another PR to adjust....

https://github.com/llvm/llvm-project/pull/213614