[llvm] [AArch64] Add initial sched model for hip12 (PR #212935)
Zhiheng Xie via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 3 00:01:11 PDT 2026
https://github.com/eastB233 updated https://github.com/llvm/llvm-project/pull/212935
>From d892cfdd908ac665ab7a8bfc900f5d6de2c5566f Mon Sep 17 00:00:00 2001
From: Zhiheng Xie <xiezhiheng at huawei.com>
Date: Wed, 17 Jun 2026 10:25:06 +0800
Subject: [PATCH 1/2] [AArch64] Add initial sched model for hip12
This patch adds initial sched model for Hisilicon's hip12 core (Kunpeng 950 processor).
---
llvm/lib/Target/AArch64/AArch64.td | 1 +
llvm/lib/Target/AArch64/AArch64Processors.td | 2 +-
llvm/lib/Target/AArch64/AArch64SchedHIP12.td | 3354 ++++++++
.../HiSilicon/hip12-basic-instructions.s | 2519 ++++++
.../HiSilicon/hip12-bf16-instructions.s | 63 +
.../HiSilicon/hip12-complxnum-instructions.s | 49 +
.../HiSilicon/hip12-crypto-instructions.s | 103 +
.../hip12-flag-manipulation-instructions.s | 53 +
.../AArch64/HiSilicon/hip12-forwarding.s | 1871 +++++
.../HiSilicon/hip12-fp16fml-instructions.s | 73 +
.../HiSilicon/hip12-fptoint-instructions.s | 65 +
.../HiSilicon/hip12-i8mm-instructions.s | 59 +
.../AArch64/HiSilicon/hip12-js-instructions.s | 43 +
.../HiSilicon/hip12-neon-instructions.s | 3159 ++++++++
.../HiSilicon/hip12-ptraut-instructions.s | 153 +
.../HiSilicon/hip12-rcpc-immo-instructions.s | 67 +
.../HiSilicon/hip12-sve-instructions.s | 6869 +++++++++++++++++
.../HiSilicon/hip12-sve-while-instructions.s | 53 +
.../AArch64/HiSilicon/hip12-writeback.s | 5269 +++++++++++++
19 files changed, 23824 insertions(+), 1 deletion(-)
create mode 100644 llvm/lib/Target/AArch64/AArch64SchedHIP12.td
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-basic-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-bf16-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-complxnum-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-crypto-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-flag-manipulation-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-forwarding.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fp16fml-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fptoint-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-i8mm-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-js-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-neon-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-ptraut-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-rcpc-immo-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-while-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-writeback.s
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index b728d375a1d7d..e6cbd66b5618a 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -141,6 +141,7 @@ include "AArch64SchedThunderX2T99.td"
include "AArch64SchedA64FX.td"
include "AArch64SchedThunderX3T110.td"
include "AArch64SchedTSV110.td"
+include "AArch64SchedHIP12.td"
include "AArch64SchedAmpere1.td"
include "AArch64SchedAmpere1B.td"
include "AArch64SchedNeoverseN1.td"
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index d6b6b13a4f6e8..31f1536aa81c4 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -1422,7 +1422,7 @@ def : ProcessorModel<"thunderx3t110", ThunderX3T110Model,
def : ProcessorModel<"tsv110", TSV110Model, ProcessorFeatures.TSV110,
[TuneTSV110]>;
// TODO: Support hip12 model.
-def : ProcessorModel<"hip12", NeoverseV2Model, ProcessorFeatures.HIP12,
+def : ProcessorModel<"hip12", HIP12Model, ProcessorFeatures.HIP12,
[TuneHIP12]>;
// Apple CPUs
diff --git a/llvm/lib/Target/AArch64/AArch64SchedHIP12.td b/llvm/lib/Target/AArch64/AArch64SchedHIP12.td
new file mode 100644
index 0000000000000..ac21168cd068a
--- /dev/null
+++ b/llvm/lib/Target/AArch64/AArch64SchedHIP12.td
@@ -0,0 +1,3354 @@
+//=- AArch64SchedHIP12.td - Hisilicon HIP12 Scheduling Defs -*- tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the machine model for Hisilicon HIP12 to support instruction
+// scheduling and other instruction cost heuristics.
+//
+//===----------------------------------------------------------------------===//
+
+def HIP12Model : SchedMachineModel {
+ let IssueWidth = 8; // Micro-ops dispatched at a time.
+ let MicroOpBufferSize = 320; // Entries in micro-op re-order buffer.
+ let LoadLatency = 4; // Optimistic load latency.
+ let MispredictPenalty = 10; // Extra cycles for mispredicted branch.
+ let LoopMicroOpBufferSize = 16; // NOTE: Copied from Cortex-A57.
+ let CompleteModel = 1;
+
+ list<Predicate> UnsupportedFeatures = !listconcat(SMEUnsupported.F,
+ SVE2p1Unsupported.F,
+ [HasSVE2p1, HasSVEB16B16, HasMTE,
+ HasCPA, HasCSSC, HasMOPS, HasMOPS_GO]);
+}
+
+let SchedModel = HIP12Model in {
+
+// Define the (19) issue ports.
+def HIP12UnitB : ProcResource<2>; // Branch 0/1
+def HIP12UnitS0 : ProcResource<1>; // Integer Single-Cycle pipe 0
+def HIP12UnitS1 : ProcResource<1>; // Integer Single-Cycle pipe 1
+def HIP12UnitSM2 : ProcResource<1>; // Integer Single/multi-Cycle pipe2
+def HIP12UnitS3 : ProcResource<1>; // Integer Single-Cycle pipe 3
+def HIP12UnitS4 : ProcResource<1>; // Integer Single-Cycle pipe 4
+def HIP12UnitSM5 : ProcResource<1>; // Integer Single/multi-Cycle pipe5
+def HIP12UnitV0 : ProcResource<1>; // FP/ASIMD/SVE 0
+def HIP12UnitV1 : ProcResource<1>; // FP/ASIMD/SVE 1
+def HIP12UnitV2 : ProcResource<1>; // FP/ASIMD/SVE 2
+def HIP12UnitV3 : ProcResource<1>; // FP/ASIMD/SVE 3
+def HIP12UnitLD : ProcResource<3>; // Load 0/1/2
+def HIP12UnitST : ProcResource<2>; // Store 0/1
+def HIP12UnitSTD : ProcResource<2>; // Store data 0/1
+
+def HIP12UnitALU : ProcResGroup<[HIP12UnitS0, HIP12UnitS1, HIP12UnitSM2, HIP12UnitS3, HIP12UnitS4, HIP12UnitSM5]>; // Integer Single-Cycle 0/1/3/4 and Integer Single/Multi-Cycle 2/5
+def HIP12UnitALU0134 : ProcResGroup<[HIP12UnitS0, HIP12UnitS1, HIP12UnitS3, HIP12UnitS4]>; // Integer Single-Cycle 0/1/3/4
+def HIP12UnitALU14 : ProcResGroup<[HIP12UnitS1, HIP12UnitS4]>; // Integer Single-Cycle 1/4
+def HIP12UnitALU25 : ProcResGroup<[HIP12UnitSM2, HIP12UnitSM5]>; // Integer Single/Multi-Cycle 2/5
+def HIP12UnitALU1425 : ProcResGroup<[HIP12UnitS1, HIP12UnitS4, HIP12UnitSM2, HIP12UnitSM5]>; // Integer Single-Cycle 1/4 or Integer Single/Multi-Cycle 2/5
+def HIP12UnitV : ProcResGroup<[HIP12UnitV0, HIP12UnitV1, HIP12UnitV2, HIP12UnitV3]>; // FP/ASIMD/SVE 0/1/2/3
+def HIP12UnitV02 : ProcResGroup<[HIP12UnitV0, HIP12UnitV2]>; // FP/ASIMD/SVE 0/2
+
+// In SVE256 mode, V0&V1 and V2&V3 are combined into two SVE256 ports.
+// Actually it should be used as (V0+v1) || (V2+V3)
+// But now modelled as
+// SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { NumMicroOps = 1 }
+def HIP12UnitV13 : ProcResGroup<[HIP12UnitV1, HIP12UnitV3]>; // FP/ASIMD/SVE 1/3
+
+// Like [SU]DIV, pointer authentication instructions, they can be issued
+// to 2 pipes but share 1 execution unit. So add a dummy unit as a workaround.
+def HIP12UnitDummy : ProcResource<1>;
+
+// No forwarding is provided for these types.
+def : ReadAdvance<ReadI, 0>;
+def : ReadAdvance<ReadISReg, 0>;
+def : ReadAdvance<ReadIEReg, 0>;
+def : ReadAdvance<ReadIM, 0>;
+def : ReadAdvance<ReadIMA, 0>;
+def : ReadAdvance<ReadID, 0>;
+def : ReadAdvance<ReadExtrHi, 0>;
+def : ReadAdvance<ReadAdrBase, 0>;
+def : ReadAdvance<ReadST, 0>;
+def : ReadAdvance<ReadVLD, 0>;
+
+def : WriteRes<WriteAtomic, []> { let Unsupported = 1; }
+def : WriteRes<WriteBarrier, []> { let Latency = 1; }
+def : WriteRes<WriteHint, []> { let Latency = 1; }
+def : WriteRes<WriteLDHi, []> { let Latency = 4; }
+
+//===----------------------------------------------------------------------===//
+// Define customized scheduler read/write types specific to the HIP12.
+//===----------------------------------------------------------------------===//
+
+// Define generic 0 micro-op types
+
+def HIP12Write_0c : SchedWriteRes<[]> { let Latency = 0; }
+
+// Define generic 1 micro-op types
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1B : SchedWriteRes<[HIP12UnitB]> {}
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1ALU : SchedWriteRes<[HIP12UnitALU]> {}
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1ALU1425 : SchedWriteRes<[HIP12UnitALU1425]> {}
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1ALU14 : SchedWriteRes<[HIP12UnitALU14]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1ALU14 : SchedWriteRes<[HIP12UnitALU14]> {}
+
+let Latency = 2, NumMicroOps = 1 in
+def HIP12Write_2c_1ALU25 : SchedWriteRes<[HIP12UnitALU25]> {}
+
+let Latency = 3, NumMicroOps = 1 in
+def HIP12Write_3c_1ALU25 : SchedWriteRes<[HIP12UnitALU25]> {}
+
+let Latency = 2, NumMicroOps = 1 in
+def HIP12Write_2c_1ALU25_1Dummy : SchedWriteRes<[HIP12UnitALU25,
+ HIP12UnitDummy]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1ALU25_1Dummy : SchedWriteRes<[HIP12UnitALU25,
+ HIP12UnitDummy]> {}
+
+let Latency = 6, NumMicroOps = 1 in
+def HIP12Write_6c_1ALU25_1Dummy : SchedWriteRes<[HIP12UnitALU25,
+ HIP12UnitDummy]> {}
+
+let Latency = 8, NumMicroOps = 1 in
+def HIP12Write_8c_1ALU25_1Dummy : SchedWriteRes<[HIP12UnitALU25,
+ HIP12UnitDummy]> {}
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 2, NumMicroOps = 1 in
+def HIP12Write_2c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 3, NumMicroOps = 1 in
+def HIP12Write_3c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 5, NumMicroOps = 1 in
+def HIP12Write_5c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 1 in
+def HIP12Write_6c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 8, NumMicroOps = 1 in
+def HIP12Write_8c_1V : SchedWriteRes<[HIP12UnitV]> {}
+
+let Latency = 5, NumMicroOps = 1 in
+def HIP12Write_5c_1V_2rc : SchedWriteRes<[HIP12UnitV]> {
+ let ReleaseAtCycles = [2];
+}
+
+let Latency = 7, NumMicroOps = 1 in
+def HIP12Write_7c_1V_2rc : SchedWriteRes<[HIP12UnitV]> {
+ let ReleaseAtCycles = [2];
+}
+
+let Latency = 9, NumMicroOps = 1 in
+def HIP12Write_9c_1V_2rc : SchedWriteRes<[HIP12UnitV]> {
+ let ReleaseAtCycles = [2];
+}
+
+let Latency = 2, NumMicroOps = 1 in
+def HIP12Write_2c_1V02 : SchedWriteRes<[HIP12UnitV02]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1V02 : SchedWriteRes<[HIP12UnitV02]> {}
+
+let Latency = 5, NumMicroOps = 1 in
+def HIP12Write_5c_1V02 : SchedWriteRes<[HIP12UnitV02]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1LD : SchedWriteRes<[HIP12UnitLD]> {}
+
+let Latency = 6, NumMicroOps = 1 in
+def HIP12Write_6c_1LD : SchedWriteRes<[HIP12UnitLD]> {}
+
+let Latency = 8, NumMicroOps = 1 in
+def HIP12Write_8c_1LD : SchedWriteRes<[HIP12UnitLD]> {}
+
+// Define generic 2 micro-op types
+
+let Latency = 1, NumMicroOps = 2 in
+def HIP12Write_1c_1B_1ALU14 : SchedWriteRes<[HIP12UnitB, HIP12UnitALU14]> {}
+
+let Latency = 4, NumMicroOps = 2 in
+def HIP12Write_4c_1ALU14_1V : SchedWriteRes<[HIP12UnitALU14, HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_1ALU14_1V : SchedWriteRes<[HIP12UnitALU14, HIP12UnitV]> {}
+
+let Latency = 7, NumMicroOps = 2 in
+def HIP12Write_7c_1ALU14_1V : SchedWriteRes<[HIP12UnitALU14, HIP12UnitV]> {}
+
+let Latency = 3, NumMicroOps = 2 in
+def HIP12Write_3c_1ALU25_1ALU : SchedWriteRes<[HIP12UnitALU25, HIP12UnitALU]> {}
+
+let Latency = 4, NumMicroOps = 2 in
+def HIP12Write_4c_1ALU25_1ALU : SchedWriteRes<[HIP12UnitALU25, HIP12UnitALU]> {}
+
+let Latency = 5, NumMicroOps = 2 in
+def HIP12Write_5c_1ALU25_1Dummy_1B : SchedWriteRes<[HIP12UnitALU25,
+ HIP12UnitDummy,
+ HIP12UnitB]> {}
+
+let Latency = 8, NumMicroOps = 2 in
+def HIP12Write_8c_1ALU_1LD : SchedWriteRes<[HIP12UnitALU, HIP12UnitLD]> {}
+
+let Latency = 2, NumMicroOps = 2 in
+def HIP12Write_2c_2V : SchedWriteRes<[HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 3, NumMicroOps = 2 in
+def HIP12Write_3c_2V : SchedWriteRes<[HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 4, NumMicroOps = 2 in
+def HIP12Write_4c_2V : SchedWriteRes<[HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 5, NumMicroOps = 2 in
+def HIP12Write_5c_2V : SchedWriteRes<[HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_2V : SchedWriteRes<[HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 2, NumMicroOps = 2 in
+def HIP12Write_2c_1V02_1ALU0134 : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitALU0134]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_1V02_1ALU : SchedWriteRes<[HIP12UnitV02, HIP12UnitALU]> {}
+
+let Latency = 7, NumMicroOps = 2 in
+def HIP12Write_7c_1V02_1ALU25 : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitALU25]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_2LD : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD]> {}
+
+let Latency = 7, NumMicroOps = 2 in
+def HIP12Write_7c_2LD : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_1LD_1ALU : SchedWriteRes<[HIP12UnitLD, HIP12UnitALU]> {}
+
+let Latency = 8, NumMicroOps = 2 in
+def HIP12Write_8c_1LD_1ALU25_1Dummy : SchedWriteRes<[HIP12UnitLD,
+ HIP12UnitALU25,
+ HIP12UnitDummy]> {}
+
+let Latency = 8, NumMicroOps = 2 in
+def HIP12Write_8c_1LD_1V : SchedWriteRes<[HIP12UnitLD, HIP12UnitV]> {}
+
+let Latency = 1, NumMicroOps = 2 in
+def HIP12Write_1c_1ST_1STD : SchedWriteRes<[HIP12UnitST, HIP12UnitSTD]> {}
+
+let Latency = 3, NumMicroOps = 2 in
+def HIP12Write_3c_1ST_1STD : SchedWriteRes<[HIP12UnitST, HIP12UnitSTD]> {}
+
+// Define generic 3 micro-op types
+
+let Latency = 4, NumMicroOps = 3 in
+def HIP12Write_4c_3V : SchedWriteRes<[HIP12UnitV, HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 3 in
+def HIP12Write_6c_3V : SchedWriteRes<[HIP12UnitV, HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 7, NumMicroOps = 3 in
+def HIP12Write_7c_3V : SchedWriteRes<[HIP12UnitV, HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 9, NumMicroOps = 3 in
+def HIP12Write_9c_3V : SchedWriteRes<[HIP12UnitV, HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 8, NumMicroOps = 3 in
+def HIP12Write_8c_1LD_2V : SchedWriteRes<[HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 1, NumMicroOps = 3 in
+def HIP12Write_1c_1ST_1STD_1ALU : SchedWriteRes<[HIP12UnitST,
+ HIP12UnitSTD,
+ HIP12UnitALU]> {}
+
+let Latency = 1, NumMicroOps = 3 in
+def HIP12Write_1c_1ST_1STD_1V : SchedWriteRes<[HIP12UnitST,
+ HIP12UnitSTD,
+ HIP12UnitV]> {}
+
+let Latency = 3, NumMicroOps = 3 in
+def HIP12Write_3c_1ALU_1ST_1STD : SchedWriteRes<[HIP12UnitALU,
+ HIP12UnitST,
+ HIP12UnitSTD]> {}
+
+// Define generic 4 micro-op types
+
+let Latency = 6, NumMicroOps = 4 in
+def HIP12Write_6c_2ALU0134_2V : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitV,
+ HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 4 in
+def HIP12Write_6c_2V_2ALU0134 : SchedWriteRes<[HIP12UnitV,
+ HIP12UnitV,
+ HIP12UnitALU0134,
+ HIP12UnitALU0134]> {}
+
+let Latency = 6, NumMicroOps = 4 in
+def HIP12Write_6c_4V : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 8, NumMicroOps = 4 in
+def HIP12Write_8c_4V : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 9, NumMicroOps = 4 in
+def HIP12Write_9c_4V : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 12, NumMicroOps = 4 in
+def HIP12Write_12c_4V : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 6, NumMicroOps = 4 in
+def HIP12Write_6c_2LD_2ALU : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitALU, HIP12UnitALU]> {}
+
+let Latency = 8, NumMicroOps = 4 in
+def HIP12Write_8c_2LD_2V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 9, NumMicroOps = 4 in
+def HIP12Write_9c_4LD : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD]> {}
+
+let Latency = 1, NumMicroOps = 4 in
+def HIP12Write_1c_2ST_2STD : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+let Latency = 4, NumMicroOps = 4 in
+def HIP12Write_4c_2V_1ST_1STD : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitST, HIP12UnitSTD]> {}
+
+// Define generic 5 micro-op types
+
+let Latency = 8, NumMicroOps = 5 in
+def HIP12Write_8c_2LD_3V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV]> {}
+
+// Define generic 6 micro-op types
+
+let Latency = 8, NumMicroOps = 6 in
+def HIP12Write_8c_3LD_3V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 1, NumMicroOps = 6 in
+def HIP12Write_1c_2ST_2STD_2ALU : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitALU, HIP12UnitALU]> {}
+
+let Latency = 1, NumMicroOps = 6 in
+def HIP12Write_1c_2ST_2STD_2V : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 4, NumMicroOps = 6 in
+def HIP12Write_4c_2ST_2STD_2V : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 2, NumMicroOps = 6 in
+def HIP12Write_2c_3ST_3STD : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+// Define generic 7 micro-op types
+
+let Latency = 8, NumMicroOps = 7 in
+def HIP12Write_8c_3LD_4V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+// Define generic 8 micro-op types
+
+let Latency = 9, NumMicroOps = 8 in
+def HIP12Write_9c_4LD_4V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 10, NumMicroOps = 8 in
+def HIP12Write_10c_8LD : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD]> {}
+
+let Latency = 4, NumMicroOps = 8 in
+def HIP12Write_4c_4V_2ST_2STD : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+let Latency = 2, NumMicroOps = 8 in
+def HIP12Write_2c_4ST_4STD : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+let Latency = 4, NumMicroOps = 8 in
+def HIP12Write_4c_4ST_4STD : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+// Define generic 9 micro-op types
+
+let Latency = 10, NumMicroOps = 9 in
+def HIP12Write_10c_3LD_6V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+// Define generic 12 micro-op types
+
+let Latency = 11, NumMicroOps = 12 in
+def HIP12Write_11c_4LD_8V : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV]> {}
+
+let Latency = 5, NumMicroOps = 12 in
+def HIP12Write_5c_6V_3ST_3STD : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD]> {}
+
+// Define generic 16 micro-op types
+
+let Latency = 5, NumMicroOps = 16 in
+def HIP12Write_5c_8V_4ST_4STD : SchedWriteRes<[HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitV, HIP12UnitV,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+let Latency = 8, NumMicroOps = 16 in
+def HIP12Write_8c_8ST_8STD : SchedWriteRes<[HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+
+// Define SVE256 1 micro-op types
+
+let Latency = 1, NumMicroOps = 1 in
+def HIP12Write_1c_1V02_1V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {}
+
+let Latency = 2, NumMicroOps = 1 in
+def HIP12Write_2c_1V02_1V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {}
+
+let Latency = 3, NumMicroOps = 1 in
+def HIP12Write_3c_1V02_1V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {}
+
+let Latency = 4, NumMicroOps = 1 in
+def HIP12Write_4c_1V02_1V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {}
+
+let Latency = 5, NumMicroOps = 1 in
+def HIP12Write_5c_1V02_1V13_2rc : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {
+ let ReleaseAtCycles = [2, 2];
+}
+
+let Latency = 7, NumMicroOps = 1 in
+def HIP12Write_7c_1V02_1V13_2rc : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {
+ let ReleaseAtCycles = [2, 2];
+}
+
+let Latency = 9, NumMicroOps = 1 in
+def HIP12Write_9c_1V02_1V13_2rc : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> {
+ let ReleaseAtCycles = [2, 2];
+}
+
+let Latency = 20, NumMicroOps = 1 in
+def HIP12Write_20c_1V02_1V13_12rc : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitV13]> {
+ let ReleaseAtCycles = [12, 12];
+}
+
+let Latency = 26, NumMicroOps = 1 in
+def HIP12Write_26c_1V02_1V13_10rc : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitV13]> {
+ let ReleaseAtCycles = [10, 10];
+}
+
+let Latency = 42, NumMicroOps = 1 in
+def HIP12Write_42c_1V02_1V13_18rc : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitV13]> {
+ let ReleaseAtCycles = [18, 18];
+}
+
+// Define SVE256 2 micro-op types
+
+let Latency = 5, NumMicroOps = 2 in
+def HIP12Write_5c_1ALU0134_1V02_1V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitV02,
+ HIP12UnitV13]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_1ALU0134_1V02_1V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitV02,
+ HIP12UnitV13]> {}
+
+let Latency = 9, NumMicroOps = 2 in
+def HIP12Write_9c_1ALU0134_1V02_1V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitV02,
+ HIP12UnitV13]> {}
+
+let Latency = 10, NumMicroOps = 2 in
+def HIP12Write_10c_1ALU0134_1V02_1V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitV02,
+ HIP12UnitV13]> {}
+
+let Latency = 4, NumMicroOps = 2 in
+def HIP12Write_4c_2V02_2V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 5, NumMicroOps = 2 in
+def HIP12Write_5c_2V02_2V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 6, NumMicroOps = 2 in
+def HIP12Write_6c_2V02_2V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 7, NumMicroOps = 2 in
+def HIP12Write_7c_2V02_2V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 9, NumMicroOps = 2 in
+def HIP12Write_9c_2V02_2V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 8, NumMicroOps = 2 in
+def HIP12Write_8c_1LD_1V02_1V13 : SchedWriteRes<[HIP12UnitLD,
+ HIP12UnitV02,
+ HIP12UnitV13]> {}
+
+let Latency = 9, NumMicroOps = 2 in
+def HIP12Write_9c_1V02_1V13_1ALU25_18rc : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitV13,
+ HIP12UnitALU25]> {
+ let ReleaseAtCycles = [18, 18, 1];
+}
+
+// Define SVE256 3 micro-op types
+
+let Latency = 7, NumMicroOps = 3 in
+def HIP12Write_7c_3V02_3V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 8, NumMicroOps = 3 in
+def HIP12Write_8c_3V02_3V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 9, NumMicroOps = 3 in
+def HIP12Write_9c_3V02_3V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 4, NumMicroOps = 3 in
+def HIP12Write_4c_1V02_1V13_1ST_1STD : SchedWriteRes<[HIP12UnitV02,
+ HIP12UnitV13,
+ HIP12UnitST,
+ HIP12UnitSTD]> {}
+
+// Define SVE256 4 micro-op types
+
+let Latency = 8, NumMicroOps = 4 in
+def HIP12Write_8c_4V02_4V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 10, NumMicroOps = 4 in
+def HIP12Write_10c_4V02_4V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 11, NumMicroOps = 4 in
+def HIP12Write_11c_4V02_4V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 12, NumMicroOps = 4 in
+def HIP12Write_12c_4V02_4V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 11, NumMicroOps = 4 in
+def HIP12Write_11c_2ALU0134_2V02_2V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitV02,
+ HIP12UnitV02,
+ HIP12UnitV13,
+ HIP12UnitV13]> {}
+
+let Latency = 8, NumMicroOps = 4 in
+def HIP12Write_8c_2LD_2V02_2V13 : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+// Define SVE256 5 micro-op types
+
+let Latency = 13, NumMicroOps = 5 in
+def HIP12Write_13c_5V02_5V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 14, NumMicroOps = 5 in
+def HIP12Write_14c_5V02_5V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 15, NumMicroOps = 5 in
+def HIP12Write_15c_5V02_5V13 : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+// Define SVE256 6 micro-op types
+
+let Latency = 10, NumMicroOps = 6 in
+def HIP12Write_10c_3ALU0134_3V02_3V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 10, NumMicroOps = 6 in
+def HIP12Write_10c_3LD_3V02_3V13 : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 4, NumMicroOps = 6 in
+def HIP12Write_4c_2V02_2V13_2ST_2STD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+// Define SVE256 8 micro-op types
+
+let Latency = 11, NumMicroOps = 8 in
+def HIP12Write_11c_4ALU0134_4V02_4V13 : SchedWriteRes<[HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitALU0134,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+let Latency = 11, NumMicroOps = 8 in
+def HIP12Write_11c_4LD_4V02_4V13 : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+// Define SVE256 9 micro-op types
+
+let Latency = 10, NumMicroOps = 9 in
+def HIP12Write_10c_3LD_6V02_6V13 : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+// Define SVE256 12 micro-op types
+
+let Latency = 11, NumMicroOps = 12 in
+def HIP12Write_11c_4LD_8V02_8V13 : SchedWriteRes<[HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitLD, HIP12UnitLD,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13]> {}
+
+// Define SVE256 18 micro-op types
+
+let Latency = 7, NumMicroOps = 18 in
+def HIP12Write_7c_6V02_6V13_6ST_6STD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+// Define SVE256 24 micro-op types
+
+let Latency = 7, NumMicroOps = 24 in
+def HIP12Write_7c_8V02_8V13_8ST_8STD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitV13, HIP12UnitV13,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitST, HIP12UnitST,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD,
+ HIP12UnitSTD, HIP12UnitSTD]> {}
+
+//===----------------------------------------------------------------------===//
+// Define predicates
+//===----------------------------------------------------------------------===//
+
+// Check for shift = 0
+def HIP12AnyShiftBy0 : MCSchedPredicate<
+ CheckAll<[
+ CheckShiftBy0,
+ CheckAny<[
+ CheckShiftLSL,
+ CheckShiftLSR,
+ CheckShiftASR,
+ CheckShiftROR]>]>>;
+
+// Identify LDR/STR Q-form scaled (no-extend) FP instructions
+def HIP12QForm : MCSchedPredicate<
+ CheckAll<[
+ CheckAny<[CheckQForm]>,
+ CheckImmOperand<4, 1>,
+ CheckNot<CheckAny<[
+ CheckExtUXTW,
+ CheckExtSXTW,
+ CheckExtUXTX,
+ CheckExtSXTX]>>]>>;
+
+//===----------------------------------------------------------------------===//
+// Define predicate-controlled types
+//===----------------------------------------------------------------------===//
+
+def HIP12Write_Arith : SchedWriteVariant<[
+ SchedVar<HIP12AnyShiftBy0, [HIP12Write_1c_1ALU]>,
+ SchedVar<NoSchedPred, [HIP12Write_2c_1ALU25]>]>;
+
+def HIP12Write_Ariths : SchedWriteVariant<[
+ SchedVar<HIP12AnyShiftBy0, [HIP12Write_1c_1ALU1425]>,
+ SchedVar<NoSchedPred, [HIP12Write_2c_1ALU25]>]>;
+
+def HIP12Write_Logical : SchedWriteVariant<[
+ SchedVar<HIP12AnyShiftBy0, [HIP12Write_1c_1ALU]>,
+ SchedVar<NoSchedPred, [HIP12Write_1c_1ALU14]>]>;
+
+def HIP12Write_Logicals : SchedWriteVariant<[
+ SchedVar<HIP12AnyShiftBy0, [HIP12Write_1c_1ALU1425]>,
+ SchedVar<NoSchedPred, [HIP12Write_2c_1ALU25]>]>;
+
+def HIP12Write_IMAL : SchedWriteVariant<[
+ SchedVar<IsReg3ZeroPred, [HIP12Write_2c_1ALU25]>,
+ SchedVar<NoSchedPred, [HIP12Write_3c_1ALU25_1ALU]>]>;
+
+def HIP12Write_LDRro : SchedWriteVariant<[
+ SchedVar<IsExtWorXPred, [HIP12Write_8c_1ALU_1LD]>,
+ SchedVar<HIP12QForm, [HIP12Write_8c_1LD]>,
+ SchedVar<NoSchedPred, [HIP12Write_6c_1LD]>]>;
+
+def HIP12Write_STRro : SchedWriteVariant<[
+ SchedVar<IsExtWorXPred, [HIP12Write_3c_1ALU_1ST_1STD]>,
+ SchedVar<HIP12QForm, [HIP12Write_3c_1ST_1STD]>,
+ SchedVar<NoSchedPred, [HIP12Write_1c_1ST_1STD]>]>;
+
+//===----------------------------------------------------------------------===//
+// Define forwarded types
+//===----------------------------------------------------------------------===//
+
+// FP multiply
+// FP fused multiply-add
+def HIP12Wr_FMA : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_FMA : SchedReadAdvance<2, [WriteFMul, HIP12Wr_FMA]>;
+
+// ASIMD absolute diff accum
+// ASIMD absolute diff accum long
+def HIP12Wr_VA : SchedWriteRes<[HIP12UnitV]> { let Latency = 2; }
+def HIP12Rd_VA : SchedReadAdvance<1, [HIP12Wr_VA]>;
+
+// ASIMD dot product
+// ASIMD dot product using signed and unsigned integers
+def HIP12Wr_VDOT : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VDOT : SchedReadAdvance<2, [HIP12Wr_VDOT]>;
+
+// ASIMD matrix multiply-accumulate
+def HIP12Wr_VMMA : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VMMA : SchedReadAdvance<2, [HIP12Wr_VMMA]>;
+
+// ASIMD multiply accumulate, B/H/S form
+def HIP12Wr_VMA : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VMA : SchedReadAdvance<2, [HIP12Wr_VMA]>;
+
+// ASIMD multiply accumulate high
+def HIP12Wr_VMAH : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VMAH : SchedReadAdvance<1, [HIP12Wr_VMAH]>;
+
+// ASIMD multiply accumulate long
+def HIP12Wr_VMAL : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VMAL : SchedReadAdvance<2, [HIP12Wr_VMAL]>;
+
+// ASIMD multiply accumulate saturating long
+def HIP12Wr_VMAQL : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VMAQL : SchedReadAdvance<1, [HIP12Wr_VMAQL]>;
+
+// ASIMD pairwise add and accumulate long
+def HIP12Wr_VPA : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VPA : SchedReadAdvance<2, [HIP12Wr_VPA]>;
+
+// ASIMD shift accumulate
+def HIP12Wr_VSA : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Rd_VSA : SchedReadAdvance<1, [HIP12Wr_VSA]>;
+
+// ASIMD FP complex multiply-add
+def HIP12Wr_VFCMA : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_VFCMA : SchedReadAdvance<2, [HIP12Wr_VFCMA]>;
+
+// ASIMD FP multiply
+// ASIMD FP fused multiply-add
+def HIP12Wr_VFM : SchedWriteRes<[HIP12UnitV]> { let Latency = 3; }
+def HIP12Wr_VFMA : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_VFMA : SchedReadAdvance<2, [HIP12Wr_VFM, HIP12Wr_VFMA]>;
+
+// ASIMD FP fused multiply-add long
+def HIP12Wr_VFMAL : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_VFMAL : SchedReadAdvance<2, [HIP12Wr_VFMAL]>;
+
+// Bfloat16
+// ASIMD multiply accumulate long
+def HIP12Wr_VBFMAL : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_VBFMAL : SchedReadAdvance<2, [HIP12Wr_VBFMAL]>;
+
+// ASIMD FP reciprocal step
+def HIP12Wr_VRECP : SchedWriteRes<[HIP12UnitV]> { let Latency = 4; }
+def HIP12Rd_VRECP : SchedReadAdvance<2, [HIP12Wr_VRECP]>;
+
+// Arithmetic, absolute diff accum SVE256
+def HIP12Wr_ZA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 2; }
+def HIP12Rd_ZA : SchedReadAdvance<1, [HIP12Wr_ZA]>;
+
+// Arithmetic, absolute diff accum long SVE256
+def HIP12Wr_ZAL : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZAL : SchedReadAdvance<2, [HIP12Wr_ZAL]>;
+
+// Arithmetic, pairwise add and accum long SVE256
+def HIP12Wr_ZPA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZPA : SchedReadAdvance<2, [HIP12Wr_ZPA]>;
+
+// Arithmetic, shift and accumulate SVE256
+def HIP12Wr_ZSA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZSA : SchedReadAdvance<1, [HIP12Wr_ZSA]>;
+
+// Complex dot product SVE256
+// Dot product SVE256
+// Dot product, 8-bit, using signed and unsigned integers SVE256
+def HIP12Wr_ZDOT : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZDOT : SchedReadAdvance<2, [HIP12Wr_ZDOT]>;
+
+// Complex multiply-add B, H, S element size SVE256
+def HIP12Wr_ZCMABHS : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZCMABHS : SchedReadAdvance<2, [HIP12Wr_ZCMABHS]>;
+
+// Complex multiply-add D element size SVE256
+def HIP12Wr_ZCMAD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZCMAD : SchedReadAdvance<2, [HIP12Wr_ZCMAD]>;
+
+// Matrix multiply-accumulate SVE256
+def HIP12Wr_ZMMA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZMMA : SchedReadAdvance<2, [HIP12Wr_ZMMA]>;
+
+// Multiply accumulate, B, H, S element size SVE256
+def HIP12Wr_ZMABHS : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZMABHS : SchedReadAdvance<2, [HIP12Wr_ZMABHS]>;
+
+// Multiply accumulate, D element size SVE256
+def HIP12Wr_ZMAD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZMAD : SchedReadAdvance<2, [HIP12Wr_ZMAD]>;
+
+// Multiply accumulate long, B, H, S element size SVE256
+def HIP12Wr_ZMALBHS : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Rd_ZMALBHS : SchedReadAdvance<2, [HIP12Wr_ZMALBHS]>;
+
+// Multiply accumulate long, D element size SVE256
+def HIP12Wr_ZMALD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZMALD : SchedReadAdvance<2, [HIP12Wr_ZMALD]>;
+
+// Multiply accumulate saturating doubling long regular, B, H, S element size SVE256
+// Multiply accumulate saturating doubling long regular, D element size SVE256
+// Multiply saturating rounding doubling regular/complex accumulate, B, H, S element size SVE256
+// Multiply saturating rounding doubling regular/complex accumulate, D element size SVE256
+def HIP12Wr_ZMASQLBHS : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Wr_ZMASQLD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Wr_ZMASQBHS : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 3; }
+def HIP12Wr_ZMASQD : SchedWriteRes<[HIP12UnitV02, HIP12UnitV02,
+ HIP12UnitV13, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZMASQ : SchedReadAdvance<1, [HIP12Wr_ZMASQLBHS, HIP12Wr_ZMASQLD,
+ HIP12Wr_ZMASQBHS, HIP12Wr_ZMASQD]>;
+
+// Floating point complex multiply add(vectors) SVE256
+// Floating point complex multiply add(indexed) SVE256
+def HIP12Wr_ZFCMA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZFCMA : SchedReadAdvance<2, [HIP12Wr_ZFCMA]>;
+
+// Floating point multiply accumulate SVE256
+def HIP12Wr_ZFMA : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZFMA : SchedReadAdvance<2, [HIP12Wr_ZFMA]>;
+
+// Floating point multiply add/sub accumulate long SVE256
+def HIP12Wr_ZFMAL : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZFMAL : SchedReadAdvance<2, [HIP12Wr_ZFMAL]>;
+
+// BFloat16
+// Multiply accumulate long SVE256
+def HIP12Wr_ZBFMAL : SchedWriteRes<[HIP12UnitV02, HIP12UnitV13]> { let Latency = 4; }
+def HIP12Rd_ZBFMAL : SchedReadAdvance<2, [HIP12Wr_ZBFMAL]>;
+
+//===----------------------------------------------------------------------===//
+// Miscellaneous
+//===----------------------------------------------------------------------===//
+
+def : InstRW<[WriteI], (instrs COPY)>;
+
+//===----------------------------------------------------------------------===//
+// 3.3 Branch Instructions
+//===----------------------------------------------------------------------===//
+
+// Branch, immed
+// instrs B, B.cond
+def : SchedAlias<WriteBr, HIP12Write_1c_1B>;
+
+// Branch, register
+// instrs BR, RET
+def : SchedAlias<WriteBrReg, HIP12Write_1c_1B>;
+
+// Branch and link, immed
+def : InstRW<[HIP12Write_1c_1B_1ALU14], (instrs BL)>;
+
+// Branch and link, register
+def : InstRW<[HIP12Write_1c_1B_1ALU14], (instrs BLR)>;
+
+// Compare and branch
+// instrs CBZ, CBNZ, TBZ, TBNZ
+// alias to WriteBr
+
+//===----------------------------------------------------------------------===//
+// 3.4 Arithmetic and Logical Instructions
+//===----------------------------------------------------------------------===//
+
+// ALU, basic
+// instrs ADD, ADC, AND, BIC, EON, EOR, ORN, ORR, SUB, SBC
+def : SchedAlias<WriteI, HIP12Write_1c_1ALU>;
+
+// ALU, basic, flagset
+// instrs ADDS, ADCS, ANDS, BICS, SUBS, SBCS
+def : InstRW<[HIP12Write_1c_1ALU1425], (instregex "^(ADD|SUB)S[WX]r[ir]$",
+ "^(ADC|SBC)S[WX]r$",
+ "^ANDS[WX]ri$",
+ "^(AND|BIC)S[WX]rr$")>;
+
+// ALU, extend and shift
+// instrs ADD{S},SUB{S}
+def : SchedAlias<WriteIEReg, HIP12Write_2c_1ALU25>;
+
+// Arithmetic, shift
+// instrs ADD, SUB
+def : SchedAlias<WriteISReg, HIP12Write_Arith>;
+
+// Arithmetic flagset, shift
+// instrs ADDS, SUBS
+def : InstRW<[HIP12Write_Ariths], (instregex "^(ADD|SUB)S[WX]rs$")>;
+
+// Conditional compare
+// instrs CCMN, CCMP
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^CCM[NP][WX][ir]")>;
+
+// Conditional select
+// instrs CSEL, CSINC, CSINV, CSNEG
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "CSEL[WX]r", "CSINC[WX]r",
+ "CSINV[WX]r", "CSNEG[WX]r")>;
+
+// Convert floating-point condition flags
+def : SchedAlias<WriteSys, HIP12Write_1c_1ALU14>;
+def : InstRW<[HIP12Write_1c_1ALU14], (instrs AXFLAG, XAFLAG)>;
+
+// Flag manipulation instructions
+def : InstRW<[HIP12Write_1c_1ALU14], (instrs SETF8, SETF16, RMIF, CFINV)>;
+
+// Logical, shift, no flagset
+// instrs AND, BIC, EON, EOR, ORN, ORR
+def : InstRW<[HIP12Write_Logical], (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>;
+
+// Logical, shift, flagset
+// instrs ANDS, BICS
+def : InstRW<[HIP12Write_Logicals], (instregex "^(AND|BIC)S[WX]rs$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.5 Divide and Multiply Instructions
+//===----------------------------------------------------------------------===//
+
+// Multiply, W-form
+// instrs MUL, MNEG
+// Multiply, X-form
+// instrs MUL, MNEG
+def : SchedAlias<WriteIM32, HIP12Write_2c_1ALU25>;
+def : SchedAlias<WriteIM64, HIP12Write_3c_1ALU25>;
+
+// Divide, W-form
+// instrs SDIV, UDIV
+// Divide, X-form
+// instrs SDIV, UDIV
+def : SchedAlias<WriteID32, HIP12Write_6c_1ALU25_1Dummy>;
+def : SchedAlias<WriteID64, HIP12Write_8c_1ALU25_1Dummy>;
+
+// Multiply accumulate, W-form
+// instrs MADD, MSUB
+def : InstRW<[HIP12Write_3c_1ALU25_1ALU], (instrs MADDWrrr, MSUBWrrr)>;
+
+// Multiply accumulate, X-form
+// instrs MADD, MSUB
+def : InstRW<[HIP12Write_4c_1ALU25_1ALU], (instrs MADDXrrr, MSUBXrrr)>;
+
+// Multiply accumulate long
+// instrs SMADDL, SMSUBL, UMADDL, UMSUBL
+// Multiply long
+// instrs SMNEGL, SMULL, UMNEGL, UMULL
+def : InstRW<[HIP12Write_IMAL], (instregex "^(S|U)M(ADD|SUB)Lrrr$")>;
+
+// Multiply high
+// instrs SMULH, UMULH
+def : InstRW<[HIP12Write_3c_1ALU25], (instrs SMULHrr, UMULHrr)>;
+
+//===----------------------------------------------------------------------===//
+// 3.6 Pointer Authentication Instructions
+//===----------------------------------------------------------------------===//
+
+// Authenticate data address
+// instrs AUTDA, AUTDB, AUTDZA, AUTDZB
+// Authenticate instruction address
+// instrs AUTIA, AUTIB, AUTIA1716, AUTIB1716, AUTIASP, AUTIBSP, AUTIAZ, AUTIBZ, AUTIZA, AUTIZB
+// Compute pointer authentication code for data address
+// instrs PACDA, PACDB, PACDZA, PACDZB
+// Compute pointer authentication code, using generic key
+// instrs PACGA
+// Compute pointer authentication code for instruction address
+// instrs PACIA, PACIB, PACIA1716, PACIB1716, PACIASP, PACIBSP, PACIAZ, PACIBZ, PACIZA, PACIZB
+def : InstRW<[HIP12Write_4c_1ALU25_1Dummy], (instregex "^AUT", "^PAC")>;
+
+// Branch and link, register, with pointer authentication
+def : InstRW<[HIP12Write_5c_1ALU25_1Dummy_1B], (instrs BLRAA, BLRAAZ, BLRAB, BLRABZ)>;
+
+// Branch, register, with pointer authentication
+def : InstRW<[HIP12Write_5c_1ALU25_1Dummy_1B], (instrs BRAA, BRAAZ, BRAB, BRABZ)>;
+
+// Branch, return, with pointer authentication
+// instrs RETAA, RETAB, ERETAA, ERETAB
+def : InstRW<[HIP12Write_5c_1ALU25_1Dummy_1B], (instrs RETAA, RETAB, ERETAA, ERETAB)>;
+
+// Load register, with pointer authentication
+// instrs LDRAA, LDRAB
+def : InstRW<[HIP12Write_8c_1LD_1ALU25_1Dummy], (instregex "^LDRA[AB](indexed|writeback)")>;
+
+// Strip pointer authentication code
+def : InstRW<[HIP12Write_2c_1ALU25_1Dummy], (instrs XPACD, XPACI, XPACLRI)>;
+
+//===----------------------------------------------------------------------===//
+// 3.7 Miscellaneous Data-Processing Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteIS, HIP12Write_1c_1ALU14>;
+
+// Address generation
+def : InstRW<[HIP12Write_1c_1ALU14], (instrs ADR, ADRP)>;
+
+// Bitfield extract, one reg
+// instrs EXTR
+def : SchedAlias<WriteExtr, HIP12Write_1c_1ALU14>;
+
+// Bitfield extract, two regs
+// instrs EXTR
+def : InstRW<[HIP12Write_1c_1ALU14], (instrs EXTRWrri, EXTRXrri)>;
+
+// Bitfield move, basic
+// instrs SBFM, UBFM
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^(S|U)BFM[WX]ri$")>;
+
+// Bitfield move, insert
+// instrs BFM
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^BFM[WX]ri$")>;
+
+// Move immed
+// instrs MOVN, MOVK, MOVZ
+def : SchedAlias<WriteImm, HIP12Write_1c_1ALU>;
+def : InstRW<[HIP12Write_1c_1ALU], (instregex "^MOV(N|K|Z)[WX]i$")>;
+
+// Count leading
+// instrs CLS, CLZ
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^CL(S|Z)[WX]r$")>;
+
+// Reverse bits/bytes
+// instrs RBIT, REV, REV16, REV32
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^(RBIT|REV|REV16|REV32)[WX]r$")>;
+
+// Variable shift
+// instrs ASRV, LSLV, LSRV, RORV
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^(ASR|LSL|LSR|ROR)V[WX]r$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.8 Load Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteAdr, HIP12Write_1c_1ALU>;
+def : SchedAlias<WriteLD, HIP12Write_4c_1LD>;
+def : SchedAlias<WriteLDIdx, HIP12Write_4c_1LD>;
+
+//===----------------------------------------------------------------------===//
+// 3.9 Store Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteST, HIP12Write_1c_1ST_1STD>;
+def : SchedAlias<WriteSTP, HIP12Write_1c_1ST_1STD>;
+def : SchedAlias<WriteSTIdx, HIP12Write_1c_1ST_1STD>;
+
+//===----------------------------------------------------------------------===//
+// 3.10 FP Data Processing Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteF, HIP12Write_2c_1V>;
+
+// FP absolute value
+// instrs FABS
+def : InstRW<[HIP12Write_1c_1V], (instregex "^FABS[HSD]r$")>;
+
+// FP absolute value
+// instrs FABD
+def : InstRW<[HIP12Write_2c_1V], (instregex "^FABD(16|32|64)$")>;
+
+// FP negate
+// instrs FNEG
+def : InstRW<[HIP12Write_1c_1V], (instregex "^FNEG[HSD]r$")>;
+
+// FP compare
+// instrs FCMP{E}
+def : SchedAlias<WriteFCmp, HIP12Write_2c_1V02_1ALU0134>;
+def : InstRW<[HIP12Write_2c_1V02_1ALU0134], (instregex "^FCMPE?[HSD]r[ri]$")>;
+
+// FP conditional compare
+// instrs FCCMP{E}
+def : InstRW<[HIP12Write_4c_1ALU14_1V], (instregex "^FCCMPE?[HSD]rr$")>;
+
+// FP conditional select
+// instrs FCSEL
+def : InstRW<[HIP12Write_6c_1ALU14_1V], (instregex "^FCSEL[HSD]rrr")>;
+
+def : SchedAlias<WriteFDiv, HIP12Write_4c_1V>;
+
+// FP divide, H-form
+// instrs FDIV
+def : InstRW<[HIP12Write_4c_1V], (instrs FDIVHrr)>;
+
+// FP divide, S-form
+// instrs FDIV
+def : InstRW<[HIP12Write_6c_1V], (instrs FDIVSrr)>;
+
+// FP divide, D-form
+// instrs FDIV
+def : InstRW<[HIP12Write_8c_1V], (instrs FDIVDrr)>;
+
+// FP square root, H-form
+// instrs FSQRT
+def : InstRW<[HIP12Write_4c_1V], (instrs FSQRTHr)>;
+
+// FP square root, S-form
+// instrs FSQRT
+def : InstRW<[HIP12Write_6c_1V], (instrs FSQRTSr)>;
+
+// FP square root, D-form
+// instrs FSQRT
+def : InstRW<[HIP12Write_8c_1V], (instrs FSQRTDr)>;
+
+// FP fused multiply-add
+// instrs FMADD, FMSUB, FNMADD, FNMSUB
+def : InstRW<[HIP12Wr_FMA, ReadDefault, ReadDefault, HIP12Rd_FMA],
+ (instregex "^FN?M(ADD|SUB)[HSD]rrr$")>;
+
+// FP max/min
+// instrs FMAX, FMAXNM, FMIN, FMINNM
+def : InstRW<[HIP12Write_2c_1V], (instregex "^(FMAX|FMIN)(NM)?[HSD]rr$")>;
+
+// FP add
+// instrs FADD, FSUB
+def : InstRW<[HIP12Write_2c_1V], (instregex "^F(ADD|SUB)[HSD]rr$")>;
+
+// FP multiply
+// instrs FMUL, FNMUL
+def : WriteRes<WriteFMul, [HIP12UnitV]> { let Latency = 3; }
+
+// FP round to FP integral
+// instrs FRINTA, FRINTI, FRINTM, FRINTN, FRINTP, FRINTX, FRINTZ, FRINT32Z, FRINT32X, FRINT64Z, FRINT64X
+def : InstRW<[HIP12Write_3c_1V], (instregex "^FRINT[AIMNPXZ][HSD]r$",
+ "^FRINT(32|64)[XZ][SD]r$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.11 FP Miscellaneous Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteFCvt, HIP12Write_7c_1ALU14_1V>;
+
+// FP covert, from gen to vec reg
+// instrs SCVTF, UCVTF
+def : InstRW<[HIP12Write_7c_1ALU14_1V], (instregex "^[SU]CVTF[SU][WX][HSD]ri$")>;
+
+// FP covert, from vec to gen reg
+// instrs FCVTAS, FCVTAU, FCVTMS, FCVTMU, FCVTNS, FCVTNU, FCVTPS, FCVTPU, FCVTZS, FCVTZU
+def : InstRW<[HIP12Write_5c_1V], (instregex "^FCVT[AMNPZ][SU][SU][WX][HSD]ri?$")>;
+
+// FP convert, Javascript from to gen reg
+def : InstRW<[HIP12Write_5c_1V02], (instrs FJCVTZS)>;
+
+// FP convert, from vec to vec reg
+// instrs FCVT, FCVTXN
+def : InstRW<[HIP12Write_3c_1V], (instrs FCVTSHr, FCVTDHr, FCVTHSr, FCVTDSr,
+ FCVTHDr, FCVTSDr, FCVTXNv1i64)>;
+
+// FP move, immed
+// instrs FMOV
+def : SchedAlias<WriteFImm, HIP12Write_2c_1V>;
+
+// FP move, register
+// instrs FMOV
+def : InstRW<[HIP12Write_2c_1V], (instregex "^FMOV[HSD]r$")>;
+
+// FP transfer, from gen to low half of vec reg
+// instrs FMOV
+def : InstRW<[HIP12Write_4c_1ALU14],
+ (instrs FMOVWHr, FMOVXHr, FMOVWSr, FMOVXDr)>;
+
+// FP transfer, from gen to high half of vec reg
+// instrs FMOV
+def : InstRW<[HIP12Write_6c_1ALU14_1V], (instrs FMOVXDHighr)>;
+
+// FP transfer, from vec to gen reg
+// instrs FMOV
+def : SchedAlias<WriteFCopy, HIP12Write_2c_1V>;
+
+//===----------------------------------------------------------------------===//
+// 3.12 FP Load Instructions
+//===----------------------------------------------------------------------===//
+
+// Load vector reg, literal
+// instrs LDR
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDR[SDQ]l$")>;
+
+// Load vector reg, unscaled immed
+// instrs LDUR
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDUR[BHSDQ]i$")>;
+
+// Load vector reg, SIMD&FP
+// instrs LDAPUR
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDAPUR")>;
+
+// Load vector reg, immed post-index
+// instrs LDR
+// Load vector reg, immed pre-index
+// instrs LDR
+def : InstRW<[WriteAdr, HIP12Write_6c_1LD_1ALU],
+ (instregex "^LDR[BHSDQ](pre|post)$")>;
+
+// Load vector reg, unsigned immed
+// instrs LDR
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDR[BHSDQ]ui$")>;
+
+// Load vector reg, register offset, no-extend, basic
+// instrs LDR
+// Load vector reg, register offset, no-extend, scale by 2/4/8
+// instrs LDR
+// Load vector reg, register offset, no-extend, scale by 16
+// instrs LDR
+// Load vector reg, register offset, extend
+// instrs LDR
+// Load vector reg, register offset, extend, scale by 2/4/8/16
+// instrs LDR
+def : InstRW<[HIP12Write_LDRro, ReadAdrBase], (instregex "^LDR[BHSDQ]ro[WX]$")>;
+
+// Load vector pair, immed offset, S/D-form
+// instrs LDP, LDNP
+def : InstRW<[HIP12Write_6c_1LD, WriteLDHi], (instregex "^LDN?P[SD]i$")>;
+
+// Load vector pair, immed offset, Q-form
+// instrs LDP, LDNP
+def : InstRW<[HIP12Write_6c_2LD, WriteLDHi], (instrs LDPQi, LDNPQi)>;
+
+// Load vector pair, immed post-index, S/D-form
+// instrs LDP
+// Load vector pair, immed pre-index, S/D-form
+// instrs LDP
+def : InstRW<[WriteAdr, HIP12Write_6c_1LD_1ALU, WriteLDHi],
+ (instregex "^LDP[SD](pre|post)$")>;
+
+// Load vector pair, immed post-index, Q-form
+// instrs LDP
+// Load vector pair, immed pre-index, Q-form
+// instrs LDP
+def : InstRW<[WriteAdr, HIP12Write_6c_2LD_2ALU, WriteLDHi],
+ (instrs LDPQpre, LDPQpost)>;
+
+//===----------------------------------------------------------------------===//
+// 3.13 FP Store Instructions
+//===----------------------------------------------------------------------===//
+
+// Store vector reg, unscaled immed
+// instrs STUR
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^STUR[BHSDQ]i$")>;
+
+// Store vector reg, immed post-index
+// instrs STR
+// Store vector reg, immed pre-index
+// instrs STR
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD_1ALU],
+ (instregex "^STR[BHSDQ](pre|post)$")>;
+
+// Store vector reg, unsigned immed
+// instrs STR
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^STR[BHSDQ]ui$")>;
+
+// Store vector reg, reg offset, no-extend, basic
+// instrs STR
+// Store vector reg offset, no-extend, scaled by 2/4/8
+// instrs STR
+// Store vector reg offset, no-extend, scaled by 16
+// instrs STR
+// Store vector reg, reg offset, extend
+// instrs STR
+// Store vector reg, reg offset, extend, scale by 2/4/8/16
+// instrs STR
+def : InstRW<[HIP12Write_STRro],
+ (instregex "^STR[BHSDQ]ro[WX]$")>;
+
+// Store vector pair, immed offset, S/D-form
+// instrs STP, STNP
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^STN?P[SD]i$")>;
+
+// Store vector pair, immed offset, Q-form
+// instrs STP, STNP
+def : InstRW<[HIP12Write_1c_2ST_2STD], (instrs STPQi, STNPQi)>;
+
+// Store vector pair, immed post-index, S/D-form
+// instrs STP
+// Store vector pair, immed pre-index, S/D-form
+// instrs STP
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD_1ALU],
+ (instregex "^STP[SD](pre|post)$")>;
+
+// Store vector pair, immed post-index, Q-form
+// instrs STP
+// Store vector pair, immed pre-index, Q-form
+// instrs STP
+def : InstRW<[WriteAdr, HIP12Write_1c_2ST_2STD_2ALU],
+ (instrs STPQpre, STPQpost)>;
+
+//===----------------------------------------------------------------------===//
+// 3.14 ASIMD Integer Instructions
+//===----------------------------------------------------------------------===//
+
+def : SchedAlias<WriteVd, HIP12Write_2c_1V>;
+def : SchedAlias<WriteVq, HIP12Write_2c_1V>;
+
+// ASIMD absolute diff
+// instrs SABD, UABD
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]ABDv")>;
+
+// ASIMD absolute diff accum
+// instrs SABA, UABA
+// ASIMD absolute diff accum long
+// instrs SABAL{2}, UABAL{2}
+def : InstRW<[HIP12Wr_VA, HIP12Rd_VA], (instregex "^[SU]ABAL?v")>;
+
+// ASIMD absolute diff long
+// instrs SABDL{2} UABDL{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]ABDLv")>;
+
+// ASIMD arith, basic
+// instrs ABS, ADD, NEG, SUB
+def : InstRW<[HIP12Write_1c_1V], (instregex "^(ABS|ADD|NEG|SUB)v")>;
+
+// ASIMD arith, basic
+// instrs SADDL{2}, SHADD, SHSUB, SSUBL{2}, UADDL{2}, UHADD, UHSUB, USUBL{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]H(ADD|SUB)v",
+ "^[SU](ADD|SUB)Lv")>;
+
+// ASIMD arith wide
+// instrs SADDW{2}, SSUBW{2}, UADDW{2}, USUBW{2}
+def : InstRW<[HIP12Write_1c_1V], (instregex "^[SU](ADD|SUB)Wv")>;
+
+// ASIMD arith, complex
+// instrs ADDHN{2}, SQABS, SQADD, SQNEG, SQSUB, SUBHN{2}, SUQADD, UQADD, UQSUB, USQADD
+def : InstRW<[HIP12Write_2c_1V],
+ (instregex "^(ADDHN|SQABS|SQADD|SQNEG|SQSUB|SUBHN|SUQADD|UQADD|UQSUB|USQADD)v")>;
+
+// ASIMD arith, complex
+// instrs RADDHN{2}, RSUBHN{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^R(ADD|SUB)HNv")>;
+
+// ASIMD arith, complex
+// instrs SRHADD, URHADD
+def : InstRW<[HIP12Write_2c_1V], (instregex "[SU]RHADDv")>;
+
+// ASIMD arith, pair-wise
+// instrs ADDP
+def : InstRW<[HIP12Write_2c_1V], (instregex "^ADDPv")>;
+
+// ASIMD arith, pair-wise
+// instrs SADDLP, UADDLP
+def : InstRW<[HIP12Write_3c_1V], (instregex "[SU]ADDLPv")>;
+
+// ASIMD arith, reduce
+// instrs ADDV
+def : InstRW<[HIP12Write_3c_1V], (instregex "^ADDVv")>;
+
+// ASIMD arith, reduce, S form
+// instrs SADDLV, UADDLV
+def : InstRW<[HIP12Write_5c_2V], (instregex "^[SU]ADDLVv4i32v$")>;
+
+// ASIMD arith, reduce, H form
+// instrs SADDLV, UADDLV
+def : InstRW<[HIP12Write_7c_3V], (instregex "^[SU]ADDLVv8i16v$",
+ "^[SU]ADDLVv4i16v$")>;
+
+// ASIMD arith, reduce, B form
+// instrs SADDLV, UADDLV
+def : InstRW<[HIP12Write_9c_4V], (instregex "^[SU]ADDLVv16i8v$",
+ "^[SU]ADDLVv8i8v$")>;
+
+// ASIMD compare
+// instrs CMGT, CMEQ, CMGE, CMLT, CMLE, CMTST, CMHI, CMHS
+// Handled by SchedAlias<WriteV[dq], ...>
+
+// ASIMD dot product
+// instrs SDOT, UDOT
+// ASIMD dot product using signed and unsigned integers
+// instrs SUDOT, USDOT
+def : InstRW<[HIP12Wr_VDOT, HIP12Rd_VDOT],
+ (instregex "^([SU]|SU|US)DOT(lane)?(v8|v16)i8$")>;
+
+// ASIMD logical
+// instrs AND, NOT, ORN, ORR, MOV, BIC, EOR, MVN
+def : InstRW<[HIP12Write_1c_1V], (instregex "^(AND|NOT|ORN|ORR|BIC|EOR)v")>;
+
+// ASIMD matrix multiply-accumulate
+def : InstRW<[HIP12Wr_VMMA, HIP12Rd_VMMA], (instrs SMMLA, UMMLA, USMMLA)>;
+
+// ASIMD max/min
+// instrs SMAX, SMIN, UMAX, UMIN
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU](MAX|MIN)v")>;
+
+// ASIMD max/min pair-wise
+// instrs SMAXP, SMINP, UMAXP, UMINP
+def : InstRW<[HIP12Write_3c_1V], (instregex "^[SU](MAX|MIN)Pv")>;
+
+// ASIMD max/min, reduce, S form
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_6c_2V], (instregex "^[SU](MAX|MIN)Vv4i32v$")>;
+
+// ASIMD max/min, reduce, H form
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_9c_3V], (instregex "^[SU](MAX|MIN)Vv4i16v$",
+ "^[SU](MAX|MIN)Vv8i16v$")>;
+
+// ASIMD max/min, reduce, B form
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_12c_4V], (instregex "^[SU](MAX|MIN)Vv8i8v$",
+ "^[SU](MAX|MIN)Vv16i8v$")>;
+
+// ASIMD multiply, B/H/S form
+// instrs MUL, SQDMULH, SQRDMULH
+def : InstRW<[HIP12Write_3c_1V], (instregex "^MULv", "^SQ(R)?DMULHv")>;
+
+// ASIMD multiply accumulate, B/H/S form
+// instrs MLA, MLS
+def : InstRW<[HIP12Wr_VMA, HIP12Rd_VMA], (instregex "^MLAv", "^MLSv")>;
+
+// ASIMD multiply accumulate high
+// instrs SQRDMLAH, SQRDMLSH
+def : InstRW<[HIP12Wr_VMAH, HIP12Rd_VMAH], (instregex "^SQRDMLAHv", "^SQRDMLSHv")>;
+
+// ASIMD multiply long
+// instrs SMULL{2}, SQDMULL{2}, UMULL{2}
+def : InstRW<[HIP12Write_3c_1V], (instregex "^[SU]MULLv", "^SQDMULL[iv]")>;
+
+// ASIMD multiply accumulate long
+// instrs SMLAL{2}, SMLSL{2}, UMLAL{2}, UMLSL{2},
+def : InstRW<[HIP12Wr_VMAL, HIP12Rd_VMAL], (instregex "^[SU]MLALv", "^[SU]MLSLv")>;
+
+// ASIMD multiply accumulate saturating long
+// instrs SQDMLAL{2}, SQDMLSL{2}
+def : InstRW<[HIP12Wr_VMAQL, HIP12Rd_VMAQL], (instregex "^SQDML[AS]L[iv]")>;
+
+// ASIMD multiply/multiply long (8x8) polynomial
+// instrs PMUL, PMULL{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^PMULL?(v8i8|v16i8)$")>;
+
+// ASIMD pairwise add and accumulate long
+// instrs SADALP, UADALP
+def : InstRW<[HIP12Wr_VPA, HIP12Rd_VPA], (instregex "^[SU]ADALPv")>;
+
+// ASIMD shift accumulate
+// instrs SSRA, SRSRA, USRA, URSRA
+def : InstRW<[HIP12Wr_VSA, HIP12Rd_VSA], (instregex "^[SU]SRA[dv]", "^[SU]RSRA[dv]")>;
+
+// ASIMD shift by immed, basic
+// instrs SHL, SHLL{2}, SHRN{2}, SSHLL{2}, SSHR, SXTL{2}, USHLL{2}, USHR, UXTL{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^SHL[dv]", "^SHLLv", "^SHRNv",
+ "^SSHLLv", "^SSHR[dv]", "^USHLLv",
+ "^USHR[dv]")>;
+
+// ASIMD shift by immed and insert, basic
+// instrs SLI, SRI
+def : InstRW<[HIP12Write_2c_1V], (instregex "^SLI[dv]", "^SRI[dv]")>;
+
+// ASIMD shift by immed, complex
+// instrs RSHRN{2}, SQRSHRN{2}, SQRSHRUN{2}, SRSHR, UQRSHRN{2}, URSHR
+def : InstRW<[HIP12Write_3c_1V], (instregex "^RSHRNv", "^UQRSHRN[bhsv]",
+ "^SQRSHRU?N[bhsv]", "^[SU]RSHR[dv]")>;
+
+// ASIMD shift by immed, complex
+// instrs SQSHRN{2}, SQSHRUN{2}, SQSHLU, UQSHRN{2},
+// ASIMD shift by immed, complex
+// instrs SQSHL, UQSHL
+def : InstRW<[HIP12Write_2c_1V],
+ (instregex "^(SQSHLU?|UQSHL)[bhsd]$",
+ "^(SQSHLU?|UQSHL)(v8i8|v16i8|v4i16|v8i16|v2i32|v4i32|v2i64)_shift$",
+ "^SQSHRU?N[bhsv]", "^UQSHRN[bhsv]")>;
+
+// ASIMD shift by register, basic
+// instrs SSHL, USHL
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]SHLv")>;
+
+// ASIMD shift by register, complex
+// instrs SRSHL, SQRSHL, URSHL, UQRSHL,
+def : InstRW<[HIP12Write_3c_1V],
+ (instregex "^[SU]RSHLv", "^[SU]QRSHLv")>;
+
+// ASIMD shift by register, complex
+// instrs SQSHL, UQSHL
+def : InstRW<[HIP12Write_2c_1V],
+ (instregex "^[SU]QSHL(v1i8|v1i16|v1i32|v1i64|v8i8|v16i8|v4i16|v8i16|v2i32|v4i32|v2i64)$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.15 ASIMD Floating-Point Instructions
+//===----------------------------------------------------------------------===//
+
+// ASIMD FP absolute value
+// instrs FABS
+def : InstRW<[HIP12Write_1c_1V], (instregex "^FABSv")>;
+
+// ASIMD FP negative value
+// instrs FNEG
+def : InstRW<[HIP12Write_1c_1V], (instregex "^FNEGv")>;
+
+// ASIMD FP absolute difference
+// instrs FABD
+def : InstRW<[HIP12Write_2c_1V], (instregex "^FABDv")>;
+
+// ASIMD FP arith
+// instrs FADD, FSUB
+def : InstRW<[HIP12Write_2c_1V], (instregex "^F(ADD|SUB)v")>;
+
+// ASIMD FP add pairwise
+// instrs FADDP
+def : InstRW<[HIP12Write_3c_1V], (instregex "^FADDPv")>;
+
+// ASIMD FP compare
+// instrs FACGE, FACGT, FCMEQ, FCMGE, FCMGT, FCMLE, FCMLT
+def : InstRW<[HIP12Write_2c_1V], (instregex "^FACG[ET]v",
+ "^FCM(EQ|GE|GT|LE|LT)v")>;
+
+// ASIMD FP convert long
+// instrs FCVTL{2}
+def : InstRW<[HIP12Write_4c_2V], (instregex "^FCVTLv")>;
+
+// ASIMD FP convert narrow
+// instrs FCVTXN{2}
+def : InstRW<[HIP12Write_4c_2V], (instregex "^FCVTXN(v2|v4)f32")>;
+
+// ASIMD FP convert narrow D-form
+// instrs FCVTN{2}
+def : InstRW<[HIP12Write_3c_1V], (instregex "^FCVTN(v2i32|v4i16)")>;
+
+// ASIMD FP convert narrow Q-form
+// instrs FCVTN{2}
+def : InstRW<[HIP12Write_4c_2V], (instregex "^FCVTN(v4i32|v8i16)")>;
+
+// ASIMD FP convert to Integer/Fixed point, D-form
+// instrs FCVTNS, FCVTNU, FCVTMS, FCVTMU, FCVTAS, FCVTAU, FCVTPS, FCVTPU, FCVTZS, FCVTZU
+// ASIMD FP convert from Integer/Fixed-point to FP, D-form
+// instrs SCVTF, UCVTF
+def : InstRW<[HIP12Write_3c_1V],
+ (instregex "^FCVT[AMNPZ][SU](v2f32|v4f16)$",
+ "^FCVT[AMNPZ][SU](v2i32|v4i16)_shift$",
+ "^FCVT[AMNPZ][SU]v1i(16|32|64)$",
+ "^FCVTZ[SU][hsd]$",
+ "^[SU]CVTF(v2f32|v4f16)$",
+ "^[SU]CVTF(v2i32|v4i16)_shift$",
+ "^[SU]CVTFv1i(16|32|64)$",
+ "^[SU]CVTF[hsd]$")>;
+
+// ASIMD FP convert to Integer/Fixed point, Q-form
+// instrs FCVTNS, FCVTNU, FCVTMS, FCVTMU, FCVTAS, FCVTAU, FCVTPS, FCVTPU, FCVTZS, FCVTZU
+// ASIMD FP convert from Integer/Fixed-point to FP, Q-form
+// instrs SCVTF, UCVTF
+def : InstRW<[HIP12Write_4c_2V],
+ (instregex "^FCVT[AMNPZ][SU](v2f64|v4f32|v8f16)$",
+ "^FCVT[AMNPZ][SU](v2i64|v4i32|v8i16)_shift$",
+ "^[SU]CVTF(v2f64|v4f32|v8f16)$",
+ "^[SU]CVTF(v2i64|v4i32|v8i16)_shift$")>;
+
+// ASIMD FP divide, D-form, F16
+// instrs FDIV
+def : InstRW<[HIP12Write_4c_1V], (instrs FDIVv4f16)>;
+
+// ASIMD FP divide, D-form, F32
+// instrs FDIV
+def : InstRW<[HIP12Write_6c_1V], (instrs FDIVv2f32)>;
+
+// ASIMD FP divide, Q-form, F16
+// instrs FDIV
+def : InstRW<[HIP12Write_5c_1V_2rc], (instrs FDIVv8f16)>;
+
+// ASIMD FP divide, Q-form, F32
+// instrs FDIV
+def : InstRW<[HIP12Write_7c_1V_2rc], (instrs FDIVv4f32)>;
+
+// ASIMD FP divide, Q-form, F64
+// instrs FDIV
+def : InstRW<[HIP12Write_9c_1V_2rc], (instrs FDIVv2f64)>;
+
+// ASIMD FP square root, D-form, F16
+// instrs FSQRT
+def : InstRW<[HIP12Write_4c_1V], (instrs FSQRTv4f16)>;
+
+// ASIMD FP square root, D-form, F32
+// instrs FSQRT
+def : InstRW<[HIP12Write_6c_1V], (instrs FSQRTv2f32)>;
+
+// ASIMD FP square root, Q-form, F16
+// instrs FSQRT
+def : InstRW<[HIP12Write_5c_1V_2rc], (instrs FSQRTv8f16)>;
+
+// ASIMD FP square root, Q-form, F32
+// instrs FSQRT
+def : InstRW<[HIP12Write_7c_1V_2rc], (instrs FSQRTv4f32)>;
+
+// ASIMD FP square root, Q-form, F64
+// instrs FSQRT
+def : InstRW<[HIP12Write_9c_1V_2rc], (instrs FSQRTv2f64)>;
+
+// ASIMD FP complex multiply-add
+def : InstRW<[HIP12Wr_VFCMA, HIP12Rd_VFCMA], (instregex "^FCMLAv")>;
+
+// ASIMD FP complex add
+def : InstRW<[HIP12Write_3c_1V], (instregex "^FCADDv")>;
+
+// ASIMD FP max/min
+// instrs FMAX, FMAXNM, FMIN, FMINNM,
+def : InstRW<[HIP12Write_2c_1V], (instregex "^F(MAX|MIN)(NM)?v")>;
+
+// ASIMD FP max/min, pairwise
+// instrs FMAXP, FMAXNMP, FMINP, FMINNMP
+def : InstRW<[HIP12Write_3c_1V], (instregex "^F(MAX|MIN)(NM)?Pv")>;
+
+// ASIMD FP max/min reduce, F16
+// instrs FMAXV, FMAXNMV, FMINV, FMINNMV
+// ASIMD FP max/min reduce, F32, F64
+// instrs FMAXV, FMAXNMV, FMINV, FMINNMV
+def : InstRW<[HIP12Write_3c_1V], (instregex "^F(MAX|MIN)(NM)?Vv")>;
+
+// ASIMD FP multiply
+// instrs FMUL, FMULX
+def : InstRW<[HIP12Wr_VFM], (instregex "^FMULv", "^FMULXv")>;
+
+// ASIMD FP fused multiply-add
+// instrs FMLA, FMLS
+def : InstRW<[HIP12Wr_VFMA, HIP12Rd_VFMA], (instregex "^FMLAv", "^FMLSv")>;
+
+// ASIMD FP fused multiply-add long
+// instrs FMLAL{2}, FMLSL{2}
+def : InstRW<[HIP12Wr_VFMAL, HIP12Rd_VFMAL], (instregex "^FML[AS]L2?(lane)?v")>;
+
+// ASIMD FP round to FP integral, D-form
+// instrs FRINTN, FRINTM, FRINTP, FRINTZ, FRINTA, FRINTX, FRINTI, FRINT32X, FRINT64X, FRINT32Z, FRINT64Z
+def : InstRW<[HIP12Write_3c_1V],
+ (instregex "^FRINT[AIMNPXZ](v2f32|v4f16)$",
+ "^FRINT(32|64)[XZ](v2f32|v4f16)$")>;
+
+// ASIMD FP round to FP integral, Q-form
+// instrs FRINTN, FRINTM, FRINTP, FRINTZ, FRINTA, FRINTX, FRINTI, FRINT32X, FRINT64X, FRINT32Z, FRINT64Z
+def : InstRW<[HIP12Write_4c_2V],
+ (instregex "^FRINT[AIMNPXZ](v8f16|v4f32|v2f64)$",
+ "^FRINT(32|64)[XZ](v8f16|v4f32|v2f64)$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.16 ASIMD Bfloat16 (BF16) Instructions
+//===----------------------------------------------------------------------===//
+
+// ASIMD convert, F32 to BF16
+// instrs BFCVTN{2}
+def : InstRW<[HIP12Write_4c_2V], (instrs BFCVTN, BFCVTN2)>;
+
+// ASIMD dot product
+// instrs BFDOT
+def : InstRW<[HIP12Write_6c_2V], (instrs BFDOTv4bf16, BFDOTv8bf16)>;
+
+// ASIMD matrix multiply accumulate
+// instrs BFMMLA
+def : InstRW<[HIP12Write_8c_4V], (instrs BFMMLA)>;
+
+// ASIMD multiply accumulate long
+// instrs BFMLALB, BFMLALT
+def : InstRW<[HIP12Wr_VBFMAL, HIP12Rd_VBFMAL],
+ (instrs BFMLALB, BFMLALBIdx, BFMLALT, BFMLALTIdx)>;
+
+// Scalar convert, F32 to BF16
+// instrs BFCVT
+def : InstRW<[HIP12Write_3c_1V], (instrs BFCVT)>;
+
+//===----------------------------------------------------------------------===//
+// 3.17 ASIMD Miscellaneous Instructions
+//===----------------------------------------------------------------------===//
+
+// ASIMD bit reverse
+// instrs RBIT
+def : InstRW<[HIP12Write_1c_1V], (instregex "^RBITv")>;
+
+// ASIMD bitwise insert
+// instrs BIF, BIT, BSL
+def : InstRW<[HIP12Write_1c_1V], (instregex "^(BIF|BIT|BSL)v")>;
+
+// ASIMD count
+// instrs CLZ, CLS
+def : InstRW<[HIP12Write_1c_1V], (instregex "^CL[Z|S]v")>;
+
+// ASIMD count, D/S
+// instrs CNT
+def : InstRW<[HIP12Write_2c_1V], (instrs CNTv16i8)>;
+
+// ASIMD count, B/H
+// instrs CNT
+def : InstRW<[HIP12Write_1c_1V], (instrs CNTv8i8)>;
+
+// ASIMD duplicate, gen reg
+// instrs DUP
+def : InstRW<[HIP12Write_6c_2ALU0134_2V], (instregex "^DUPv.+gpr")>;
+
+// ASIMD duplicate, element
+// instrs DUP
+def : InstRW<[HIP12Write_2c_1V], (instregex "^DUPv.+lane")>;
+
+// ASIMD extract
+// instrs EXT
+def : InstRW<[HIP12Write_2c_1V], (instregex "^EXTv")>;
+
+// ASIMD extract narrow
+// instrs XTN{2}
+def : InstRW<[HIP12Write_2c_1V], (instregex "^XTNv")>;
+
+// ASIMD extract narrow, saturating
+// instrs SQXTN{2}, SQXTUN{2}, UQXTN{2},
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]QXTNv", "^SQXTUNv")>;
+
+// ASIMD insert, element to element
+// instrs INS
+def : InstRW<[HIP12Write_2c_1V], (instregex "^INSvi(8|16|32|64)lane$")>;
+
+// ASIMD FP move, immed
+// instrs FMOV
+def : InstRW<[HIP12Write_2c_1V], (instregex "^FMOVv(2|4|8)f")>;
+
+// ASIMD move, integer immediate
+// instrs MOVI
+def : InstRW<[HIP12Write_2c_1V], (instregex "^MOVIv")>;
+
+// ASIMD move, integer immediate
+// instrs MVNI
+def : InstRW<[HIP12Write_1c_1V], (instregex "^MVNIv")>;
+
+// ASIMD reciprocal and square root estimate, D-form
+// instrs URECPE, URSQRTE
+def : InstRW<[HIP12Write_3c_1V], (instrs URECPEv2i32, URSQRTEv2i32)>;
+
+// ASIMD reciprocal and square root estimate, Q-form
+// instrs URECPE, URSQRTE
+def : InstRW<[HIP12Write_4c_2V], (instrs URECPEv4i32, URSQRTEv4i32)>;
+
+// ASIMD FP reciprocal and square root estimate, D-form
+// instrs FRECPE, FRSQRTE
+def : InstRW<[HIP12Write_3c_1V],
+ (instregex "^FRECPE(v4f16|v2f32)$",
+ "^FRSQRTE(v4f16|v2f32)$")>;
+
+// ASIMD FP reciprocal and square root estimate, Q-form
+// instrs FRECPE, FRSQRTE
+def : InstRW<[HIP12Write_4c_2V],
+ (instregex "^FRECPE(v8f16|v4f32|v2f64)$",
+ "^FRSQRTE(v8f16|v4f32|v2f64)$")>;
+
+// ASIMD FP reciprocal exponent
+// instrs FRECPX
+def : InstRW<[HIP12Write_3c_1V], (instregex "^FRECPXv")>;
+
+// ASIMD FP reciprocal step
+// instrs FRECPS, FRSQRTS
+def : InstRW<[HIP12Wr_VRECP, HIP12Rd_VRECP, HIP12Rd_VRECP],
+ (instregex "^FRECPS(32|64|v)", "^FRSQRTS(32|64|v)")>;
+
+// ASIMD reverse
+// instrs REV16, REV32, REV64
+def : InstRW<[HIP12Write_2c_1V], (instregex "^REV(16|32|64)v")>;
+
+// ASIMD table lookup 1 or 2 table regs
+// instrs TBL
+def : InstRW<[HIP12Write_2c_1V], (instrs TBLv8i8One, TBLv16i8One,
+ TBLv8i8Two, TBLv16i8Two)>;
+
+// ASIMD table lookup 3 table regs
+// instrs TBL
+def : InstRW<[HIP12Write_4c_2V], (instrs TBLv8i8Three, TBLv16i8Three)>;
+
+// ASIMD table lookup 4 table regs
+// instrs TBL
+def : InstRW<[HIP12Write_4c_3V], (instrs TBLv8i8Four, TBLv16i8Four)>;
+
+// ASIMD table lookup extension 1 table reg
+// instrs TBX
+def : InstRW<[HIP12Write_2c_1V], (instrs TBXv8i8One, TBXv16i8One)>;
+
+// ASIMD table lookup extension 2 table reg
+// instrs TBX
+def : InstRW<[HIP12Write_4c_2V], (instrs TBXv8i8Two, TBXv16i8Two)>;
+
+// ASIMD table lookup extension 3 table reg
+// instrs TBX
+def : InstRW<[HIP12Write_6c_3V], (instrs TBXv8i8Three, TBXv16i8Three)>;
+
+// ASIMD table lookup extension 4 table reg
+// instrs TBX
+def : InstRW<[HIP12Write_6c_4V], (instrs TBXv8i8Four, TBXv16i8Four)>;
+
+// ASIMD move FP to general register
+// instrs SMOV, UMOV
+def : InstRW<[HIP12Write_2c_1V], (instregex "^[SU]MOVv")>;
+
+// ASIMD transfer, gen reg to element
+// instrs INS
+def : InstRW<[HIP12Write_6c_2V_2ALU0134], (instregex "^INSvi(8|16|32|64)gpr$")>;
+
+// ASIMD transpose
+// instrs TRN1, TRN2
+def : InstRW<[HIP12Write_2c_1V], (instregex "^TRN[12]v")>;
+
+// ASIMD uzip/zip
+// instrs UZP1, UZP2, ZIP1, ZIP2
+def : InstRW<[HIP12Write_2c_1V], (instregex "^UZP[12]v", "^ZIP[12]v")>;
+
+//===----------------------------------------------------------------------===//
+// 3.18 ASIMD Load Instructions
+//===----------------------------------------------------------------------===//
+
+// SIMD load, 1-element, multiple, 1-reg
+// instrs LD1
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1Onev(8b|4h|2s|1d)$",
+ "^LD1Onev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_6c_1LD], (instregex "^LD1Onev(8b|4h|2s|1d)_POST$",
+ "^LD1Onev(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 1-element, multiple, 2-reg
+// instrs LD1
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1Twov(8b|4h|2s|1d)$",
+ "^LD1Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_6c_1LD], (instregex "^LD1Twov(8b|4h|2s|1d)_POST$",
+ "^LD1Twov(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 1-element, multiple, 3-reg
+// instrs LD1
+def : InstRW<[HIP12Write_7c_2LD], (instregex "^LD1Threev(8b|4h|2s|1d)$",
+ "^LD1Threev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_7c_2LD], (instregex "^LD1Threev(8b|4h|2s|1d)_POST$",
+ "^LD1Threev(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 1-element, multiple, 4-reg
+// instrs LD1
+def : InstRW<[HIP12Write_7c_2LD], (instregex "^LD1Fourv(8b|4h|2s|1d)$",
+ "^LD1Fourv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_7c_2LD], (instregex "^LD1Fourv(8b|4h|2s|1d)_POST$",
+ "^LD1Fourv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 1-element, single, 1 lane
+// instrs LD1
+def : InstRW<[HIP12Write_8c_1LD_1V], (instregex "LD1i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_1V], (instregex "LD1i(8|16|32|64)_POST$")>;
+
+// SIMD load, 1-element, single, replicate to all lanes
+// instrs LD1R
+def : InstRW<[HIP12Write_8c_1LD_1V], (instregex "LD1Rv(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_1V], (instregex "LD1Rv(8b|4h|2s|1d)_POST$")>;
+def : InstRW<[HIP12Write_8c_1LD_1V], (instregex "LD1Rv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_1V], (instregex "LD1Rv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 2-elements, multiple, Q form
+// instrs LD2
+def : InstRW<[HIP12Write_8c_2LD_2V], (instregex "LD2Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_2LD_2V], (instregex "LD2Twov(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 2-elements, multiple, D form
+// instrs LD2
+def : InstRW<[HIP12Write_8c_1LD_2V], (instregex "LD2Twov(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_2V], (instregex "LD2Twov(8b|4h|2s)_POST$")>;
+
+// SIMD load, 2-element, single, 1 lane
+// instrs LD2
+def : InstRW<[HIP12Write_8c_1LD_2V], (instregex "LD2i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_2V], (instregex "LD2i(8|16|32|64)_POST$")>;
+
+// SIMD load, 2-element, single, replicate to all lanes
+// instrs LD2R
+def : InstRW<[HIP12Write_8c_1LD_2V], (instregex "LD2Rv(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_2V], (instregex "LD2Rv(8b|4h|2s|1d)_POST$")>;
+def : InstRW<[HIP12Write_8c_1LD_2V], (instregex "LD2Rv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_1LD_2V], (instregex "LD2Rv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load LD3 (multiple structures), Q-form, B/H/S
+// instrs LD3
+def : InstRW<[HIP12Write_10c_3LD_6V], (instregex "LD3Threev(16b|8h|4s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_10c_3LD_6V], (instregex "LD3Threev(16b|8h|4s)_POST$")>;
+
+// SIMD load LD3 (multiple structures), Q-form,D
+// instrs LD3
+def : InstRW<[HIP12Write_8c_3LD_3V], (instregex "LD3Threev2d$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_3LD_3V], (instregex "LD3Threev2d_POST$")>;
+
+// SIMD load LD3 (multiple structures), D-form
+// instrs LD3
+def : InstRW<[HIP12Write_8c_2LD_3V], (instregex "LD3Threev(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_2LD_3V], (instregex "LD3Threev(8b|4h|2s)_POST$")>;
+
+// SIMD load, 3-element, single, 1 lane
+// instrs LD3
+def : InstRW<[HIP12Write_8c_2LD_3V], (instregex "LD3i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_2LD_3V], (instregex "LD3i(8|16|32|64)_POST$")>;
+
+// SIMD load, 3-element, single, replicate to all lanes
+// instrs LD3R
+def : InstRW<[HIP12Write_8c_2LD_3V], (instregex "LD3Rv(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_2LD_3V], (instregex "LD3Rv(8b|4h|2s|1d)_POST$")>;
+def : InstRW<[HIP12Write_8c_2LD_3V], (instregex "LD3Rv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_2LD_3V], (instregex "LD3Rv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD load, 4-element, multiple, Q-form, B/H/S
+// instrs LD4
+def : InstRW<[HIP12Write_11c_4LD_8V], (instregex "LD4Fourv(16b|8h|4s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_11c_4LD_8V], (instregex "LD4Fourv(16b|8h|4s)_POST$")>;
+
+// SIMD load, 4-element, multiple, Q-form, D
+// instrs LD4
+def : InstRW<[HIP12Write_9c_4LD_4V], (instregex "LD4Fourv2d$")>;
+def : InstRW<[WriteAdr, HIP12Write_9c_4LD_4V], (instregex "LD4Fourv2d_POST$")>;
+
+// SIMD load, 4-element, multiple, D-form
+// instrs LD4
+def : InstRW<[HIP12Write_8c_3LD_4V], (instregex "LD4Fourv(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_3LD_4V], (instregex "LD4Fourv(8b|4h|2s)_POST$")>;
+
+// SIMD load, 4-element, single, 1 lane
+// instrs LD4
+def : InstRW<[HIP12Write_8c_3LD_4V], (instregex "LD4i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_3LD_4V], (instregex "LD4i(8|16|32|64)_POST$")>;
+
+// SIMD load, 4-element, single, replicate to all lanes
+// instrs LD4R
+def : InstRW<[HIP12Write_8c_3LD_4V], (instregex "LD4Rv(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_3LD_4V], (instregex "LD4Rv(8b|4h|2s|1d)_POST$")>;
+def : InstRW<[HIP12Write_8c_3LD_4V], (instregex "LD4Rv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_8c_3LD_4V], (instregex "LD4Rv(16b|8h|4s|2d)_POST$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.19 ASIMD Store Instructions
+//===----------------------------------------------------------------------===//
+
+// SIMD store, 1-element, multiple, 1 reg, Q-form
+// instrs ST1
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "ST1Onev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD], (instregex "ST1Onev(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 2 reg, Q-form
+// instrs ST1
+def : InstRW<[HIP12Write_1c_2ST_2STD], (instregex "ST1Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_2ST_2STD], (instregex "ST1Twov(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 3 reg, Q-form
+// instrs ST1
+def : InstRW<[HIP12Write_2c_3ST_3STD], (instregex "ST1Threev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_2c_3ST_3STD], (instregex "ST1Threev(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 4 reg, Q-form
+// instrs ST1
+def : InstRW<[HIP12Write_2c_4ST_4STD], (instregex "ST1Fourv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_2c_4ST_4STD], (instregex "ST1Fourv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 1 reg, D-form
+// instrs ST1
+def : InstRW<[HIP12Write_1c_1ST_1STD_1V], (instregex "ST1Onev(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD_1V], (instregex "ST1Onev(8b|4h|2s|1d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 2 reg, D-form
+// instrs ST1
+def : InstRW<[HIP12Write_1c_1ST_1STD_1V], (instregex "ST1Twov(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD_1V], (instregex "ST1Twov(8b|4h|2s|1d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 3 reg, D-form
+// instrs ST1
+def : InstRW<[HIP12Write_1c_2ST_2STD_2V], (instregex "ST1Threev(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_2ST_2STD_2V], (instregex "ST1Threev(8b|4h|2s|1d)_POST$")>;
+
+// SIMD store, 1-element, multiple, 4 reg, D-form
+// instrs ST1
+def : InstRW<[HIP12Write_4c_2ST_2STD_2V], (instregex "ST1Fourv(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_2ST_2STD_2V], (instregex "ST1Fourv(8b|4h|2s|1d)_POST$")>;
+
+// SIMD store, 1-element, single, 1 lane
+// instrs ST1
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "ST1i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD], (instregex "ST1i(8|16|32|64)_POST$")>;
+
+// SIMD store, 2-element, multiple, Q-form
+// instrs ST2
+def : InstRW<[HIP12Write_1c_2ST_2STD], (instregex "ST2Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_2ST_2STD], (instregex "ST2Twov(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 2-element, multiple, D-form
+// instrs ST2
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "ST2Twov(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD], (instregex "ST2Twov(8b|4h|2s)_POST$")>;
+
+// SIMD store, 2-element, single, 1lane
+// instrs ST2
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "ST2i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_1c_1ST_1STD], (instregex "ST2i(8|16|32|64)_POST$")>;
+
+// SIMD store, 3-element, multiple, Q-form,B,H,S
+// instrs ST3
+def : InstRW<[HIP12Write_5c_6V_3ST_3STD], (instregex "ST3Threev(16b|8h|4s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_5c_6V_3ST_3STD], (instregex "ST3Threev(16b|8h|4s)_POST$")>;
+
+// SIMD store, 3-element, multiple, Q-form,D
+// instrs ST3
+def : InstRW<[HIP12Write_5c_6V_3ST_3STD], (instregex "ST3Threev2d$")>;
+def : InstRW<[WriteAdr, HIP12Write_5c_6V_3ST_3STD], (instregex "ST3Threev2d_POST$")>;
+
+// SIMD store, 3-element, multiple, D-form
+// instrs ST3
+def : InstRW<[HIP12Write_4c_4V_2ST_2STD], (instregex "ST3Threev(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_4V_2ST_2STD], (instregex "ST3Threev(8b|4h|2s)_POST$")>;
+
+// SIMD store, 3-element, single, 1 lane
+// instrs ST3
+def : InstRW<[HIP12Write_4c_4V_2ST_2STD], (instregex "ST3i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_4V_2ST_2STD], (instregex "ST3i(8|16|32|64)_POST$")>;
+
+// SIMD store, 4-element, multiple, Q-form
+// instrs ST4
+def : InstRW<[HIP12Write_5c_8V_4ST_4STD], (instregex "ST4Fourv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, HIP12Write_5c_8V_4ST_4STD], (instregex "ST4Fourv(16b|8h|4s|2d)_POST$")>;
+
+// SIMD store, 4-element, multiple, D-form
+// instrs ST4
+def : InstRW<[HIP12Write_4c_4V_2ST_2STD], (instregex "ST4Fourv(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_4V_2ST_2STD], (instregex "ST4Fourv(8b|4h|2s)_POST$")>;
+
+// SIMD store, 4-element, single, 1 lane,B/H/S
+// instrs ST4
+def : InstRW<[HIP12Write_4c_2V_1ST_1STD], (instregex "ST4i(8|16|32)$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_2V_1ST_1STD], (instregex "ST4i(8|16|32)_POST$")>;
+
+// SIMD store, 4-element, single, 1 lane,D
+// instrs ST4
+def : InstRW<[HIP12Write_4c_4V_2ST_2STD], (instregex "ST4i64$")>;
+def : InstRW<[WriteAdr, HIP12Write_4c_4V_2ST_2STD], (instregex "ST4i64_POST$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.20 Cryptography Extensions
+//===----------------------------------------------------------------------===//
+
+// crypto AES ops
+// instrs AESD, AESE, AESMC, AESIMC
+def : InstRW<[HIP12Write_2c_1V], (instregex "^AES[DE]rr$", "^AESI?MCrr")>;
+
+// Crypto polynomial (64x64) multiply long
+// instrs PMULL{2}
+def : InstRW<[HIP12Write_2c_1V], (instrs PMULLv1i64, PMULLv2i64)>;
+
+// Crypto SHA1 hash acceleration ops
+def : InstRW<[HIP12Write_2c_1V], (instregex "^SHA1H")>;
+
+// Crypto SHA1 hash acceleration ops
+def : InstRW<[HIP12Write_4c_1V02], (instregex "^SHA1[CMP]")>;
+
+// Crypto SHA1 schedule acceleration ops
+// instrs SHA1SU0, SHA1SU1
+def : InstRW<[HIP12Write_2c_1V02], (instregex "^SHA1(SU0|SU1)")>;
+
+// Crypto SHA256 hash acceleration ops
+// instrs SHA256H, SHA256H2
+def : InstRW<[HIP12Write_4c_1V02], (instregex "^SHA256H2?")>;
+
+// Crypto SHA256 schedule acceleration ops
+// instrs SHA256SU0, SHA256SU1
+def : InstRW<[HIP12Write_2c_1V02], (instregex "^SHA256SU[01]")>;
+
+// Crypto SHA512 hash acceleration ops
+// instrs SHA512H, SHA512H2, SHA512SU0, SHA512SU1
+def : InstRW<[HIP12Write_2c_1V02], (instregex "^SHA512(H|H2|SU0|SU1)")>;
+
+// Crypto SHA3 ops
+def : InstRW<[HIP12Write_1c_1V], (instrs BCAX, EOR3, RAX1)>;
+
+// Crypto SHA3 ops
+def : InstRW<[HIP12Write_2c_1V], (instrs XAR)>;
+
+// Crypto SM3 ops
+// instrs SM3PARTW1, SM3PARTW2, SM3SS1, SM3TT1A, SM3TT1B, SM3TT2A, SM3TT2B
+def : InstRW<[HIP12Write_2c_1V02], (instregex "^SM3PARTW[12]$", "^SM3SS1$",
+ "^SM3TT[12][AB]$")>;
+
+// Crypto SM4 ops
+// instrs SM4E, SM4EKEY
+def : InstRW<[HIP12Write_4c_1V], (instrs SM4E, SM4ENCKEY)>;
+
+//===----------------------------------------------------------------------===//
+// 3.21 CRC
+//===----------------------------------------------------------------------===//
+
+// CRC checksum ops
+// instrs CRC32, CRC32C
+def : InstRW<[HIP12Write_2c_1ALU25], (instregex "^CRC32")>;
+
+//===----------------------------------------------------------------------===//
+// 3.22 SVE Predicate instructions
+//===----------------------------------------------------------------------===//
+
+// Loop control, based on predicate
+// instrs BRKA, BRKB
+def : InstRW<[HIP12Write_2c_1V02], (instrs BRKA_PPmP, BRKA_PPzP,
+ BRKB_PPmP, BRKB_PPzP)>;
+
+// Loop control, based on predicate and flag setting
+// instrs BRKAS, BRKBS
+def : InstRW<[HIP12Write_2c_1V02], (instrs BRKAS_PPzP, BRKBS_PPzP)>;
+
+// Loop control, propagating
+// instrs BRKN, BRKPA, BRKPB
+def : InstRW<[HIP12Write_2c_2V], (instrs BRKN_PPzP, BRKPA_PPzPP,
+ BRKPB_PPzPP)>;
+
+// Loop control, propagating and flag setting
+// instrs BRKNS, BRKPAS, BRKPBS
+def : InstRW<[HIP12Write_2c_2V], (instrs BRKNS_PPzP, BRKPAS_PPzPP,
+ BRKPBS_PPzPP)>;
+
+// Loop control, based on GPR
+// instrs WHILEGE, WHILEGT, WHILEHI, WHILEHS, WHILELE, WHILELO, WHILELS, WHILELT, WHILERW, WHILEWR
+def : InstRW<[HIP12Write_2c_1ALU25],
+ (instregex "^WHILE(GE|GT|HI|HS|LE|LO|LS|LT)_P(WW|XX)_[BHSD]",
+ "^WHILE(RW|WR)_PXX_[BHSD]")>;
+
+// Loop terminate
+// instrs CTERMEQ, CTERMNE
+def : InstRW<[HIP12Write_1c_1ALU14], (instregex "^CTERM(EQ|NE)_(WW|XX)")>;
+
+// Predicate counting scalar
+// instrs ADDPL, ADDVL, CNTB, CNTH, CNTW, CNTD, DECB, DECH, DECW, DECD, INCB, INCH, INCW, INCD, RDVL
+def : InstRW<[HIP12Write_1c_1ALU],
+ (instregex "^(CNT|SQDEC|SQINC|UQDEC|UQINC)[BHWD]_XPiI",
+ "^SQ(DEC|INC)[BHWD]_XPiWdI",
+ "^UQ(DEC|INC)[BHWD]_WPiI")>;
+def : InstRW<[HIP12Write_1c_1ALU], (instrs ADDPL_XXI, ADDVL_XXI, RDVLI_XI)>;
+
+// Predicate counting scalar
+// instrs SQDECB, SQDECH, SQDECW, SQDECD, SQINCB, SQINCH, SQINCW, SQINCD, UQDECB, UQDECH, UQDECW, UQDECD, UQINCB, UQINCH, UQINCW, UQINCD
+def : InstRW<[HIP12Write_2c_1ALU25], (instregex "^(DEC|INC)[BHWD]_XPiI")>;
+
+// Predicate counting scalar, active predicate
+// instrs DECP, INCP
+def : InstRW<[HIP12Write_6c_1V02_1ALU],
+ (instregex "^(DEC|INC)P_XP_[BHSD]")>;
+
+// Predicate counting scalar, active predicate
+// instrs CNTP
+def : InstRW<[HIP12Write_5c_2V], (instregex "^CNTP_XPP_[BHSD]")>;
+
+// Predicate counting scalar, active predicate
+// instrs SQDECP, SQINCP, UQDECP, UQINCP
+def : InstRW<[HIP12Write_7c_1V02_1ALU25],
+ (instregex "^(SQDEC|SQINC|UQDEC|UQINC)P_XP_[BHSD]",
+ "^(UQDEC|UQINC)P_WP_[BHSD]",
+ "^(SQDEC|SQINC)P_XPWd_[BHSD]")>;
+
+// Predicate counting vector, active predicate
+// instrs DECP, INCP,
+def : InstRW<[HIP12Write_3c_2V], (instregex "^(DEC|INC)P_ZP_[HSD]")>;
+
+// Predicate counting vector, active predicate
+// instrs SQDECP, SQINCP, UQDECP, UQINCP
+def : InstRW<[HIP12Write_4c_2V],
+ (instregex "^(SQDEC|SQINC|UQDEC|UQINC)P_ZP_[HSD]")>;
+
+// Predicate logical
+// instrs AND, BIC, EOR, MOV, NAND, NOR, NOT, ORN, ORR
+def : InstRW<[HIP12Write_2c_2V], (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP")>;
+
+// Predicate logical, flag setting
+// instrs ANDS, BICS, EORS, NANDS, NORS, NOTS, ORNS, ORRS
+def : InstRW<[HIP12Write_2c_2V], (instregex "^(ANDS|BICS|EORS|NANDS|NORS|ORNS|ORRS)_PPzPP")>;
+
+// Predicate reverse
+// instrs REV
+def : InstRW<[HIP12Write_2c_2V], (instregex "^REV_PP_[BHSD]")>;
+
+// Predicate select
+// instrs SEL
+def : InstRW<[HIP12Write_2c_2V], (instrs SEL_PPPP)>;
+
+// Predicate set
+// instrs PFALSE, PTRUE
+def : InstRW<[HIP12Write_2c_2V], (instregex "^PFALSE", "^PTRUE_[BHSD]")>;
+
+// Predicate set/initialize, set flags
+// instrs PTRUES
+def : InstRW<[HIP12Write_2c_2V], (instregex "^PTRUES_[BHSD]")>;
+
+// Predicate find first/next
+// instrs PFIRST, PNEXT
+def : InstRW<[HIP12Write_2c_2V], (instregex "^PFIRST_B", "^PNEXT_[BHSD]")>;
+
+// Predicate test
+// instrs PTEST
+def : InstRW<[HIP12Write_2c_2V], (instrs PTEST_PP, PTEST_PP_ANY, PTEST_PP_FIRST)>;
+
+// Predicate transpose
+// instrs TRN1, TRN2
+def : InstRW<[HIP12Write_2c_2V], (instregex "^TRN[12]_PPP_[BHSD]")>;
+
+// Predicate unpack and widen
+// instrs PUNPKHI, PUNPKLO
+def : InstRW<[HIP12Write_2c_2V], (instrs PUNPKHI_PP, PUNPKLO_PP)>;
+
+// Predicate zip/unzip
+// instrs ZIP1, ZIP2, UZP1, UZP2
+def : InstRW<[HIP12Write_2c_2V], (instregex "^(ZIP|UZP)[12]_PPP_[BHSD]")>;
+
+//===----------------------------------------------------------------------===//
+// 3.23 SVE Integer Instructions
+//===----------------------------------------------------------------------===//
+
+// Arithmetic, absolute diff SABD, UABD SVE256
+// instrs SABD, UABD
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^[SU]ABD_ZPmZ_[BHSD]",
+ "^[SU]ABD_ZPZZ_[BHSD]")>;
+
+// Arithmetic, absolute diff accum SVE256
+// instrs SABA, UABA
+def : InstRW<[HIP12Wr_ZA, HIP12Rd_ZA], (instregex "^[SU]ABA_ZZZ_[BHSD]")>;
+
+// Arithmetic, absolute diff accum long SVE256
+// instrs SABALB, SABALT, UABALB, UABALT
+def : InstRW<[HIP12Wr_ZAL, HIP12Rd_ZAL], (instregex "^[SU]ABAL[TB]_ZZZ_[HSD]")>;
+
+// Arithmetic, absolute diff long SVE256
+// instrs SABDLB, SABDLT, UABDLB, UABDLT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^[SU]ABDL[TB]_ZZZ_[HSD]")>;
+
+// Arithmetic, address generation SVE256
+// instrs ADR
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^ADR_[SU]XTW_ZZZ_D_[0123]",
+ "^ADR_LSL_ZZZ_[SD]_[0123]")>;
+
+// Arithmetic, basic SVE256
+// instrs ABS, ADD, SUB, SUBR, NEG, CNOT
+def : InstRW<[HIP12Write_1c_1V02_1V13],
+ (instregex "^(ABS|ADD|CNOT|NEG|SUB|SUBR)_ZPmZ_[BHSD]",
+ "^(ADD|SUB)_ZZZ_[BHSD]",
+ "^(ADD|SUB|SUBR)_ZPZZ_[BHSD]",
+ "^(ADD|SUB|SUBR)_ZI_[BHSD]",
+ "^SADDLBT_ZZZ_[HSD]",
+ "^SSUBL(BT|TB)_ZZZ_[HSD]")>;
+
+// Arithmetic, basic SVE256
+// instrs SHADD, SHSUB, SHSUBR, SUBHNB, SUBHNT, UHADD, UHSUB, UHSUBR
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^[SU]H(ADD|SUB|SUBR)_(ZPmZ|ZPZZ)_[BHSD]")>;
+
+// Arithmetic, basic SVE256
+// instrs SADDWB, SADDWT, SSUBWB, SSUBWT, UADDWB, USUBWB, USUBWT
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^[SU](ADD|SUB)W[BT]_ZZZ_[HSD]")>;
+
+// Arithmetic, basic SVE256
+// instrs SADDLB, SADDLBT, SADDLT, SSUBLB, SSUBLBT, SSUBLT, SSUBLTB, UADDLB, UADDLT, USUBLB, USUBLT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^[SU](ADD|SUB)L[BT]_ZZZ_[HSD]")>;
+
+// Arithmetic, complex SVE256
+// instrs SQADD, SQSUB, UQADD, UQSUB
+// instrs ADDHNB, ADDHNT, RADDHNB, RADDHNT, RSUBHNB, RSUBHNT, SQABS, SQNEG, SQSUBR, SRHADD, SUQADD, UQSUBR, USQADD, URHADD
+def : InstRW<[HIP12Write_2c_1V02_1V13],
+ (instregex "^R?(ADD|SUB)HN[BT]_ZZZ_[BHS]",
+ "^SQ(ABS|ADD|NEG|SUB|SUBR)_ZPmZ_[BHSD]",
+ "^[SU]Q(ADD|SUB)_ZZZ_[BHSD]",
+ "^[SU]Q(ADD|SUB)_ZI_[BHSD]",
+ "^(SRH|SUQ|UQ|USQ|URH)ADD_ZPmZ_[BHSD]",
+ "^(UQSUB|UQSUBR)_ZPmZ_[BHSD]")>;
+
+// Arithmetic, large integer SVE256
+// instrs ADCLB, ADCLT, SBCLB, SBCLT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^(AD|SB)CL[BT]_ZZZ_[SD]")>;
+
+// Arithmetic, pairwise add SVE256
+// instrs ADDP
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^ADDP_ZPmZ_[BHSD]")>;
+
+// Arithmetic, pairwise add and accum long SVE256
+// instrs SADALP, UADALP
+def : InstRW<[HIP12Wr_ZPA, ReadDefault, HIP12Rd_ZPA], (instregex "^[SU]ADALP_ZPmZ_[HSD]")>;
+
+// Arithmetic, shift SVE256
+// instrs ASR, LSR, LSL ASRR, LSLR, LSRR
+def : InstRW<[HIP12Write_2c_1V02_1V13],
+ (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
+ "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
+ "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
+ "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
+ "^(ASR|LSL|LSR)_ZZI_[BHSD]",
+ "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
+ "^(ASRR|LSLR|LSRR)_ZPmZ_[BHSD]")>;
+
+// Arithmetic, shift and accumulate SVE256
+// instrs SRSRA, SSRA, URSRA, USRA
+def : InstRW<[HIP12Wr_ZSA, HIP12Rd_ZSA], (instregex "^[SU]R?SRA_ZZI_[BHSD]")>;
+
+// Arithmetic, shift by immediate SVE256
+// instrs SHRNB, SHRNT, SSHLLB, SSHLLT, USHLLB, USHLLT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^SHRN[BT]_ZZI_[BHS]",
+ "^[SU]SHLL[BT]_ZZI_[HSD]")>;
+
+// Arithmetic, shift by immediate and insert SVE256
+// instrs SLI, SRI
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^(SLI|SRI)_ZZI_[BHSD]")>;
+
+// Arithmetic, shift complex SVE256
+// instrs SQSHLU, SQSHRNB, SQSHRNT, SQSHRUNB, SQSHRUNT, UQSHRNB, UQSHRNT
+// Arithmetic, shift complex SVE256
+// instrs SQSHL, SQSHLR, UQSHL, UQSHLR
+// Arithmetic, shift complex SVE256
+// instrs RSHRNB, RSHRNT, SQRSHRNB, SQRSHRNT, SQRSHRUNB, SQRSHRUNT, UQRSHRNB, UQRSHRNT
+// Arithmetic, shift complex SVE256
+// instrs SQRSHL, SQRSHLR, UQRSHL, UQRSHLR
+def : InstRW<[HIP12Write_2c_1V02_1V13],
+ (instregex "^(SQ)?RSHRU?N[BT]_ZZI_[BHS]",
+ "^(SQRSHL|SQRSHLR|SQSHL|SQSHLR|UQRSHL|UQRSHLR|UQSHL|UQSHLR)_ZPmZ_[BHSD]",
+ "^[SU]QR?SHL_ZPZZ_[BHSD]",
+ "^(SQSHL|SQSHLU|UQSHL)_(ZPmI|ZPZI)_[BHSD]",
+ "^SQSHRU?N[BT]_ZZI_[BHS]",
+ "^UQR?SHRN[BT]_ZZI_[BHS]")>;
+
+// Arithmetic, shift right for divide SVE256
+// instrs ASRD
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^ASRD_(ZPmI|ZPZI)_[BHSD]")>;
+
+// Arithmetic, shift rounding SVE256
+// instrs SRSHL, SRSHLR, URSHL, URSHLR
+// Arithmetic, shift rounding SVE256
+// instrs SRSHR, URSHR
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^[SU]RSHLR?_ZPmZ_[BHSD]",
+ "^[SU]RSHL_ZPZZ_[BHSD]",
+ "^[SU]RSHR_(ZPmI|ZPZI)_[BHSD]")>;
+
+// Bit manipulation SVE256
+// instrs BDEP, BEXT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^(BDEP|BEXT)_ZZZ_[BHSD]")>;
+
+// Bit manipulation SVE256
+// instrs BGRP
+def : InstRW<[HIP12Write_6c_2V02_2V13], (instregex "^BGRP_ZZZ_[BHSD]")>;
+
+// Bitwise select SVE256
+// instrs BSL, BSL1N, BSL2N, NBSL
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^(BSL|BSL1N|BSL2N|NBSL)_ZZZZ",
+ "^(EON|NAND|NOR)_ZZZ")>;
+
+// Count/reverse bits SVE256
+// instrs CLS, CLZ, RBIT
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^(CLS|CLZ|RBIT)_ZPmZ_[BHSD]")>;
+
+// Count/reverse bits, B H form SVE256
+// instrs CNT
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^CNT_ZPmZ_[BH]")>;
+
+// Count/reverse bits, S D-form SVE256
+// instrs CNT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^CNT_ZPmZ_[SD]")>;
+
+// Broadcast logical bitmask immediate to vector SVE256
+// instrs DUPM, MOV
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instrs DUPM_ZI)>;
+
+// Compare and set flags
+// instrs CMPEQ, CMPGE, CMPGT, CMPHI, CMPHS, CMPLE, CMPLO, CMPLS, CMPLT, CMPNE
+def : InstRW<[HIP12Write_2c_1V02_1V13],
+ (instregex "^CMP(EQ|GE|GT|HI|HS|LE|LO|LS|LT|NE)_PPzZ[IZ]_[BHSD]",
+ "^CMP(EQ|GE|GT|HI|HS|LE|LO|LS|LT|NE)_WIDE_PPzZZ_[BHS]")>;
+
+// Complex add SVE256
+// instrs CADD
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^CADD_ZZI_[BHSD]")>;
+
+// Complex add SVE256
+// instrs SQCADD
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^SQCADD_ZZI_[BHSD]")>;
+
+// Complex dot product SVE256
+// instrs CDOT
+def : InstRW<[HIP12Wr_ZDOT, HIP12Rd_ZDOT],
+ (instrs CDOT_ZZZ_S, CDOT_ZZZI_S, CDOT_ZZZ_D, CDOT_ZZZI_D)>;
+
+// Complex multiply-add B, H, S element size SVE256
+// instrs CMLA
+def : InstRW<[HIP12Wr_ZCMABHS, HIP12Rd_ZCMABHS],
+ (instregex "^CMLA_ZZZ_[BHS]", "^CMLA_ZZZI_[HS]")>;
+
+// Complex multiply-add D element size SVE256
+// instrs CMLA
+def : InstRW<[HIP12Wr_ZCMAD, HIP12Rd_ZCMAD], (instrs CMLA_ZZZ_D)>;
+
+// Conditional extract operations, scalar form SVE256
+// instrs CLASTA, CLASTB
+def : InstRW<[HIP12Write_9c_1ALU0134_1V02_1V13], (instregex "^CLAST[AB]_RPZ_[BHSD]")>;
+
+// Conditional extract operations, SIMD&FP scalar and vector forms SVE256
+// instrs CLASTA, CLASTB
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^CLAST[AB]_[VZ]PZ_[BHSD]")>;
+
+// Conditional extract operations, SIMD&FP scalar and vector forms SVE256
+// instrs SPLICE
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^SPLICE_ZPZZ?_[BHSD]")>;
+
+// Conditional extract operations, SIMD&FP scalar and vector forms SVE256
+// instrs COMPACT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^COMPACT_ZPZ_[SD]")>;
+
+// Convert to floating point SVE256
+// instrs SCVTF, UCVTF
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^[SU]CVTF_ZPmZ_Dto[HSD]",
+ "^[SU]CVTF_ZPmZ_StoD",
+ "^[SU]CVTF_ZPmZ_Sto[HS]",
+ "^[SU]CVTF_ZPmZ_HtoH")>;
+
+// Copy, scalar SVE256
+// instrs CPY
+def : InstRW<[HIP12Write_6c_1ALU0134_1V02_1V13], (instregex "^CPY_ZPmR_[BHSD]")>;
+
+// Copy, imm SVE256
+// instrs CPY
+// Copy, scalar SIMD&FP SVE256
+// instrs CPY
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^CPY_ZPm[IV]_[BHSD]",
+ "^CPY_ZPzI_[BHSD]")>;
+
+// Divides, 32-bit SVE256
+// instrs SDIV, SDIVR, UDIV, UDIVR
+def : InstRW<[HIP12Write_7c_2V02_2V13], (instregex "^[SU]DIVR?_ZPmZ_S",
+ "^[SU]DIV_ZPZZ_S")>;
+
+// Divides, 64-bit SVE256
+// instrs SDIV, SDIVR, UDIV, UDIVR
+def : InstRW<[HIP12Write_9c_2V02_2V13], (instregex "^[SU]DIVR?_ZPmZ_D",
+ "^[SU]DIV_ZPZZ_D")>;
+
+// Dot product SVE256
+// instrs SDOT, UDOT
+def : InstRW<[HIP12Wr_ZDOT, HIP12Rd_ZDOT], (instregex "^[SU]DOT_ZZZI?_BtoS",
+ "^[SU]DOT_ZZZI?_HtoD")>;
+
+// Dot product, 8-bit, using signed and unsigned integers SVE256
+// instrs SUDOT, USDOT
+def : InstRW<[HIP12Wr_ZDOT, HIP12Rd_ZDOT], (instrs SUDOT_ZZZI, USDOT_ZZZI, USDOT_ZZZ)>;
+
+// Duplicate, indexed SVE256
+// instrs DUP, MOV
+// Duplicate, immediate SVE256
+// instrs DUP, MOV
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^DUP_ZI_[BHSD]",
+ "^DUP_ZZI_[BHSDQ]")>;
+
+// Duplicate, scalar SVE256
+// instrs DUP, MOV
+def : InstRW<[HIP12Write_6c_1ALU0134_1V02_1V13], (instregex "^DUP_ZR_[BHSD]")>;
+
+// Extend, sign or zero SVE256
+// instrs SXTB, SXTH, SXTW, UXTB, UXTH, UXTW
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^[SU]XTB_ZPmZ_[HSD]",
+ "^[SU]XTH_ZPmZ_[SD]",
+ "^[SU]XTW_ZPmZ_[D]")>;
+
+// Extract SVE256
+// instrs EXT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instrs EXT_ZZI, EXT_ZZI_CONSTRUCTIVE, EXT_ZZI_B)>;
+
+// Extract narrow saturating SVE256
+// instrs SQXTNB, SQXTNT, SQXTUNB, SQXTUNT, UQXTNB, UQXTNT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^[SU]QXTN[BT]_ZZ_[BHS]",
+ "^SQXTUN[BT]_ZZ_[BHS]")>;
+
+// Insert operation, scalar SVE256
+// instrs INSR
+def : InstRW<[HIP12Write_6c_1ALU0134_1V02_1V13], (instregex "^INSR_ZR_[BHSD]")>;
+
+// Insert operation, SIMD and FP scalar SVE256
+// instrs INSR
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^INSR_ZV_[BHSD]")>;
+
+// Extract operation, SIMD and FP scalar SVE256
+// instrs LASTA, LASTB
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^LAST[AB]_VPZ_[BHSD]")>;
+
+// Extract operation, scalar SVE256
+// instrs LASTA, LASTB
+def : InstRW<[HIP12Write_5c_1ALU0134_1V02_1V13], (instregex "^LAST[AB]_RPZ_[BHSD]")>;
+
+// Histogram operations SVE256
+// instrs HISTCNT, HISTSEG
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^HISTCNT_ZPzZZ_[SD]",
+ "^HISTSEG_ZZZ")>;
+
+// Horizontal operations, B, H, S form, immediate operands only SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^INDEX_II_[BHS]")>;
+
+// Horizontal operations, D form, immediate operands only SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instrs INDEX_II_D)>;
+
+// Horizontal operations, B, H, S form, scalar start, immediate increment SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_10c_1ALU0134_1V02_1V13], (instregex "^INDEX_RI_[BHS]")>;
+
+// Horizontal operations, D form, scalar start, immediate increment SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_11c_2ALU0134_2V02_2V13], (instregex "^INDEX_RI_D")>;
+
+// Horizontal operations, B, H, S form, immediate start, scalar increment SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_10c_1ALU0134_1V02_1V13], (instregex "^INDEX_IR_[BHS]")>;
+
+// Horizontal operations, D form, immediate start, scalar increment SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_11c_2ALU0134_2V02_2V13], (instregex "^INDEX_IR_D")>;
+
+// Horizontal operations, B, H, S form, scalar operands only SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_10c_3ALU0134_3V02_3V13], (instregex "^INDEX_RR_[BHS]")>;
+
+// Horizontal operations, D form, scalar, scalar operands only SVE256
+// instrs INDEX
+def : InstRW<[HIP12Write_11c_4ALU0134_4V02_4V13], (instregex "^INDEX_RR_D")>;
+
+// Logical SVE256
+// instrs AND, ORR, EOR, BIC, NOT, EON, MOV, ORN
+// Logical SVE256
+// instrs EORBT, EORTB
+def : InstRW<[HIP12Write_1c_1V02_1V13],
+ (instregex "^(AND|EOR|ORR)_ZI",
+ "^(AND|BIC|EOR|ORR)_ZZZ",
+ "^EOR(BT|TB)_ZZZ_[BHSD]",
+ "^(AND|BIC|EOR|NOT|ORR)_(ZPmZ|ZPZZ)_[BHSD]",
+ "^NOT_ZPmZ_[BHSD]")>;
+
+// Max/min, basic and pairwise SVE256
+// instrs SMAX, SMIN, UMAX, UMIN,
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^[SU](MAX|MIN)_ZI_[BHSD]",
+ "^[SU](MAX|MIN)_ZPmZ_[BHSD]",
+ "^[SU](MAX|MIN)_ZPZZ_[BHSD]")>;
+
+// Max/Min, basic and pairwise SVE256
+// instrs SMAXP, SMINP, UMAXP, UMINP
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^[SU](MAX|MIN)P_ZPmZ_[BHSD]")>;
+
+// Matching operations
+// instrs MATCH, NMATCH
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^N?MATCH_PPzZZ_[BH]")>;
+
+// Matrix multiply-accumulate SVE256
+// instrs SMMLA, UMMLA, USMMLA
+def : InstRW<[HIP12Wr_ZMMA, HIP12Rd_ZMMA],
+ (instrs SMMLA_ZZZ, UMMLA_ZZZ, USMMLA_ZZZ)>;
+
+// Move prefix SVE256
+// instrs MOVPRFX
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^MOVPRFX_ZP[mz]Z_[BHSD]",
+ "^MOVPRFX_ZZ")>;
+
+// Multiply, B, H, S element size SVE256
+// instrs MUL, SMULH, UMULH
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ)_[BHS]",
+ "^MUL_ZPZZ_[BHS]",
+ "^[SU]MULH_(ZPmZ|ZZZ)_[BHS]",
+ "^[SU]MULH_ZPZZ_[BHS]")>;
+
+// Multiply, D element size SVE256
+// instrs MUL, SMULH, UMULH
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ)_D",
+ "^MUL_ZPZZ_D",
+ "^[SU]MULH_(ZPmZ|ZZZ)_D",
+ "^[SU]MULH_ZPZZ_D")>;
+
+// Multiply long, B, H, S element size SVE256
+// instrs SMULLB, SMULLT, UMULLB, UMULLT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^[SU]MULL[BT]_ZZZI_[SD]",
+ "^[SU]MULL[BT]_ZZZ_[HSD]")>;
+
+// Multiply accumulate, B, H, S element size SVE256
+// instrs MLA, MLS, MAD, MSB
+def : InstRW<[HIP12Wr_ZMABHS, HIP12Rd_ZMABHS],
+ (instregex "^ML[AS]_ZZZI_[HS]", "^ML[AS]_ZPZZZ_[BHS]")>;
+def : InstRW<[HIP12Wr_ZMABHS, ReadDefault, HIP12Rd_ZMABHS],
+ (instregex "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
+
+// Multiply accumulate, D element size SVE256
+// instrs MLA, MLS, MAD, MSB
+def : InstRW<[HIP12Wr_ZMAD, HIP12Rd_ZMAD],
+ (instregex "^ML[AS]_ZZZI_D", "^ML[AS]_ZPZZZ_D")>;
+def : InstRW<[HIP12Wr_ZMAD, ReadDefault, HIP12Rd_ZMAD],
+ (instregex "^(ML[AS]|MAD|MSB)_ZPmZZ_D")>;
+
+// Multiply accumulate long, B, H, S element size SVE256
+// instrs SMLALB, MLALT, SMLSLB, SMLSLT, UMLALB, UMLALT, UMLSLB, UMLSLT
+def : InstRW<[HIP12Wr_ZMALBHS, HIP12Rd_ZMALBHS],
+ (instregex "^[SU]ML[AS]L[BT]_ZZZ_[HS]",
+ "^[SU]ML[AS]L[BT]_ZZZI_S")>;
+
+// Multiply accumulate long, D element size SVE256
+// instrs SMLALB, MLALT, SMLSLB, SMLSLT, UMLALB, UMLALT, UMLSLB, UMLSLT
+def : InstRW<[HIP12Wr_ZMALD, HIP12Rd_ZMALD],
+ (instregex "^[SU]ML[AS]L[BT]_ZZZ_D", "^[SU]ML[AS]L[BT]_ZZZI_D")>;
+
+// Multiply accumulate saturating doubling long regular, B, H, S element size SVE256
+// instrs SQDMLALB, SQDMLALT, SQDMLALBT, SQDMLSLB, SQDMLSLT, SQDMLSLBT
+def : InstRW<[HIP12Wr_ZMASQLBHS, HIP12Rd_ZMASQ],
+ (instregex "^SQDML[AS]L(B|T|BT)_ZZZ_[HS]",
+ "^SQDML[AS]L[BT]_ZZZI_[S]")>;
+
+// Multiply accumulate saturating doubling long regular, D element size SVE256
+// instrs SQDMLALB, SQDMLALT, SQDMLALBT, SQDMLSLB, SQDMLSLT, SQDMLSLBT
+def : InstRW<[HIP12Wr_ZMASQLD, HIP12Rd_ZMASQ],
+ (instregex "^SQDML[AS]L(B|T|BT)_ZZZ_D",
+ "^SQDML[AS]L[BT]_ZZZI_D")>;
+
+// Multiply saturating doubling high, B, H, S element size SVE256
+// instrs SQDMULH
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^SQDMULH_ZZZ_[BHS]",
+ "^SQDMULH_ZZZI_[HS]")>;
+
+// Multiply saturating doubling high, D element size SVE256
+// instrs SQDMULH
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instrs SQDMULH_ZZZ_D, SQDMULH_ZZZI_D)>;
+
+// Multiply saturating doubling long, B, H, S element size SVE256
+// instrs SQDMULLB, SQDMULLT
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^SQDMULL[BT]_ZZZ_[HS]",
+ "^SQDMULL[BT]_ZZZI_S")>;
+
+// Multiply saturating doubling long, D element size SVE256
+// instrs SQDMULLB, SQDMULLT
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^SQDMULL[BT]_ZZZ_D",
+ "^SQDMULL[BT]_ZZZI_D")>;
+
+// Multiply saturating rounding doubling regular/complex accumulate, B, H, S element size SVE256
+// instrs SQRDMLAH, SQRDMLSH
+// Multiply saturating rounding doubling regular/complex accumulate, B, H, S element size SVE256
+// instrs SQRDCMLAH
+def : InstRW<[HIP12Wr_ZMASQBHS, HIP12Rd_ZMASQ], (instregex "^SQRDML[AS]H_ZZZ_[BHS]",
+ "^SQRDCMLAH_ZZZ_[BHS]",
+ "^SQRDML[AS]H_ZZZI_[HS]",
+ "^SQRDCMLAH_ZZZI_[HS]")>;
+
+// Multiply saturating rounding doubling regular/complex accumulate, D element size SVE256
+// instrs SQRDMLAH, SQRDMLSH
+// Multiply saturating rounding doubling regular/complex accumulate, D element size SVE256
+// instrs SQRDCMLAH
+def : InstRW<[HIP12Wr_ZMASQD, HIP12Rd_ZMASQ], (instregex "^SQRDML[AS]H_ZZZI?_D",
+ "^SQRDCMLAH_ZZZ_D")>;
+
+// Multiply saturating rounding doubling regular/complex, B, H, S element size SVE256
+// instrs SQRDMULH
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^SQRDMULH_ZZZ_[BHS]",
+ "^SQRDMULH_ZZZI_[HS]")>;
+
+// Multiply saturating rounding doubling regular/complex, D element size SVE256
+// instrs SQRDMULH
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^SQRDMULH_ZZZI?_D")>;
+
+// Multiply/multiply long, (8x8) polynomial SVE256
+// instrs PMUL, PMULLB, PMULLT
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^PMUL_ZZZ_B",
+ "^PMULL[BT]_ZZZ_[HDQ]")>;
+
+// Predicate counting vector SVE256
+// instrs SQINCH, SQINCW, SQINCD, SQDECH, SQDECW, SQDECD, INCH, INCW, INCD, DECH, DECW, DECD, UQINCH, UQINCW, UQINCD, UQDECH, UQDECW, UQDECD
+def : InstRW<[HIP12Write_5c_2V02_2V13], (instregex "^([SU]Q)?(DEC|INC)[HWD]_ZPiI")>;
+
+// Reciprocal estimate SVE256
+// instrs URECPE, URSQRTE
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^URECPE_ZPmZ_S", "^URSQRTE_ZPmZ_S")>;
+
+// Reduction, arithmetic, D SVE256
+// instrs UADDV
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^UADDV_VPZ_D")>;
+
+// Reduction, arithmetic, S SVE256
+// instrs SADDV, UADDV
+def : InstRW<[HIP12Write_7c_3V02_3V13], (instregex "^[SU]ADDV_VPZ_S")>;
+
+// Reduction, arithmetic, H SVE256
+// instrs SADDV, UADDV
+def : InstRW<[HIP12Write_10c_4V02_4V13], (instregex "^[SU]ADDV_VPZ_H")>;
+
+// Reduction, arithmetic, B SVE256
+// instrs SADDV, UADDV
+def : InstRW<[HIP12Write_13c_5V02_5V13], (instregex "^[SU]ADDV_VPZ_B")>;
+
+// Reduction, arithmetic, D SVE256
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_5c_2V02_2V13], (instregex "^[SU](MAX|MIN)V_VPZ_D")>;
+
+// Reduction, arithmetic, S SVE256
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_8c_3V02_3V13], (instregex "^[SU](MAX|MIN)V_VPZ_S")>;
+
+// Reduction, arithmetic, H SVE256
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_11c_4V02_4V13], (instregex "^[SU](MAX|MIN)V_VPZ_H")>;
+
+// Reduction, arithmetic, B SVE256
+// instrs SMAXV, SMINV, UMAXV, UMINV
+def : InstRW<[HIP12Write_14c_5V02_5V13], (instregex "^[SU](MAX|MIN)V_VPZ_B")>;
+
+// Reduction, logical SVE256
+// instrs ANDV, EORV, ORV
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^(AND|EOR|OR)V_VPZ_[BHSD]")>;
+
+// Reverse, vector SVE256
+// instrs REV
+// Reverse, vector SVE256
+// instrs REVB, REVH, REVW
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^REV_ZZ_[BHSD]",
+ "^REVB_ZPmZ_[HSD]",
+ "^REVH_ZPmZ_[SD]",
+ "^REVW_ZPmZ_D")>;
+
+// Select, vector form SVE256
+// instrs MOV, SEL
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^SEL_ZPZZ_[BHSD]")>;
+
+// Table lookup SVE256
+// instrs TBL
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^TBL_ZZZZ?_[BHSD]")>;
+
+// Table lookup extension SVE256
+// instrs TBX
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^TBX_ZZZ_[BHSD]")>;
+
+// Transpose, vector form SVE256
+// instrs TRN1, TRN2
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^TRN[12]_ZZZ_[BHSDQ]")>;
+
+// Unpack and extend SVE256
+// instrs SUNPKHI, SUNPKLO, UUNPKHI, UUNPKLO
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^[SU]UNPK(HI|LO)_ZZ_[HSD]")>;
+
+// Zip/unzip SVE256
+// instrs UZP1, UZP2, ZIP1, ZIP2
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^(UZP|ZIP)[12]_ZZZ_[BHSDQ]")>;
+
+//===----------------------------------------------------------------------===//
+// 3.24 SVE Floating-point Instructions
+//===----------------------------------------------------------------------===//
+
+// Floating point absolute value SVE256
+// instrs FABS
+// Floating point negative value SVE256
+// instrs FNEG
+def : InstRW<[HIP12Write_1c_1V02_1V13],
+ (instregex "^FABS_ZPmZ_[HSD]",
+ "^FNEG_ZPmZ_[HSD]")>;
+
+// Floating point absolute difference SVE256
+// instrs FABD
+// Floating point arithmetic SVE256
+// instrs FADD, FSUB, FSUBR
+def : InstRW<[HIP12Write_2c_1V02_1V13],
+ (instregex "^F(ADD|SUB)_(ZPm[IZ]|ZZZ)_[HSD]",
+ "^F(ADD|SUB)_ZPZ[IZ]_[HSD]",
+ "^FABD_ZP[mZ]Z_[HSD]",
+ "^FSUBR_ZPm[IZ]_[HSD]",
+ "^FSUBR_(ZPZI|ZPZZ)_[HSD]")>;
+
+// Floating point arithmetic pairwise SVE256
+// instrs FADDP
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^FADDP_ZPmZZ_[HSD]")>;
+
+// Floating point associative add, F16 SVE256
+// instrs FADDA
+def : InstRW<[HIP12Write_42c_1V02_1V13_18rc], (instrs FADDA_VPZ_H)>;
+
+// Floating point associative add, F32 SVE256
+// instrs FADDA
+def : InstRW<[HIP12Write_26c_1V02_1V13_10rc], (instrs FADDA_VPZ_S)>;
+
+// Floating point associative add, F64 SVE256
+// instrs FADDA
+def : InstRW<[HIP12Write_20c_1V02_1V13_12rc], (instrs FADDA_VPZ_D)>;
+
+// Floating point compare SVE256
+// instrs FACGE, FACGT, FACLE, FACLT, FCMEQ, FCMGE, FCMGT, FCMLE, FCMLT, FCMNE, FCMUO
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^FACG[ET]_PPzZZ_[HSD]",
+ "^FCM(EQ|GE|GT|NE)_PPzZ[0Z]_[HSD]",
+ "^FCM(LE|LT)_PPzZ0_[HSD]",
+ "^FCMUO_PPzZZ_[HSD]")>;
+
+// Floating point complex add
+// instrs FCADD
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^FCADD_ZPmZ_[HSD]")>;
+
+// Floating point complex multiply add(vectors) SVE256
+// instrs FCMLA
+def : InstRW<[HIP12Wr_ZFCMA, ReadDefault, HIP12Rd_ZFCMA], (instregex "^FCMLA_ZPmZZ_[HSD]")>;
+
+// Floating point complex multiply add(indexed) SVE256
+// instrs FCMLA
+def : InstRW<[HIP12Wr_ZFCMA, HIP12Rd_ZFCMA], (instregex "^FCMLA_ZZZI_[HS]")>;
+
+// Floating point convert, long or narrow SVE256
+// instrs FCVT
+// Floating point convert, long or narrow SVE256
+// instrs FCVTLT, FCVTNT
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FCVT_ZPmZ_(HtoS|StoH)",
+ "^FCVTLT_ZPmZ_HtoS",
+ "^FCVTNT_ZPmZ_StoH",
+ "^FCVT_ZPmZ_(HtoD|StoD|DtoS|DtoH)",
+ "^FCVTLT_ZPmZ_StoD",
+ "^FCVTNT_ZPmZ_DtoS")>;
+
+// Floating point convert, round to odd SVE256
+// instrs FCVTX, FCVTXNT
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instrs FCVTX_ZPmZ_DtoS, FCVTXNT_ZPmZ_DtoS)>;
+
+// Floating point base2 log SVE256
+// instrs FLOGB
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FLOGB_(ZPmZ|ZPZZ)_[HSD]")>;
+
+// Floating point convert to integer SVE256
+// instrs FCVTZS, FCVTZU
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FCVTZ[SU]_ZPmZ_HtoH",
+ "^FCVTZ[SU]_ZPmZ_(HtoS|StoS)",
+ "^FCVTZ[SU]_ZPmZ_(HtoD|StoD|DtoS|DtoD)")>;
+
+// Floating point copy SVE256
+// instrs FCPY, FDUP, FMOV
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^FCPY_ZPmI_[HSD]", "^FDUP_ZI_[HSD]")>;
+
+// Floating point divide, F16 SVE256
+// instrs FDIV, FDIVR
+def : InstRW<[HIP12Write_5c_1V02_1V13_2rc], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_H")>;
+
+// Floating point divide, F32 SVE256
+// instrs FDIV, FDIVR
+def : InstRW<[HIP12Write_7c_1V02_1V13_2rc], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_S")>;
+
+// Floating point divide, F64 SVE256
+// instrs FDIV, FDIVR
+def : InstRW<[HIP12Write_9c_1V02_1V13_2rc], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
+
+// Floating point min/max pairwise SVE256
+// instrs FMAXP, FMAXNMP, FMINP, FMINNMP
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^F(MAX|MIN)(NM)?P_ZPmZZ_[HSD]")>;
+
+// Floating point min/max SVE256
+// instrs FMAX, FMIN, FMAXNM, FMINNM
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^F(MAX|MIN)(NM)?_ZPm[IZ]_[HSD]",
+ "^F(MAX|MIN)(NM)?_ZPZ[IZ]_[HSD]")>;
+
+// Floating point multiply SVE256
+// instrs FMUL
+// instrs FSCALE, FMULX
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^(FSCALE|FMULX)_ZPmZ_[HSD]",
+ "^FMULX_ZPZZ_[HSD]",
+ "^FMUL_(ZPm[IZ]|ZZZI?)_[HSD]",
+ "^FMUL_ZPZ[IZ]_[HSD]")>;
+
+// Floating point multiply accumulate SVE256
+// instrs FMLA, FMLS, FMAD, FMSB, FNMAD, FNMLA, FNMLS, FNMSB
+def : InstRW<[HIP12Wr_ZFMA, ReadDefault, HIP12Rd_ZFMA],
+ (instregex "^FN?ML[AS]_ZPmZZ_[HSD]",
+ "^FN?(MAD|MSB)_ZPmZZ_[HSD]")>;
+def : InstRW<[HIP12Wr_ZFMA, HIP12Rd_ZFMA],
+ (instregex "^FML[AS]_ZZZI_[HSD]",
+ "^FN?ML[AS]_ZPZZZ_[HSD]")>;
+
+// Floating point multiply add/sub accumulate long SVE256
+// instrs FMLALB, FMLALT, FMLSLB, FMLSLT
+def : InstRW<[HIP12Wr_ZFMAL, HIP12Rd_ZFMAL], (instregex "^FML[AS]L[BT]_ZZZI?_SHH")>;
+
+// Floating point reciprocal estimate SVE256
+// instrs FRECPE, FRECPX, FRSQRTE
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FR(ECP|SQRT)E_ZZ_[HSD]",
+ "^FRECPX_ZPmZ_[HSD]")>;
+
+// Floating point reciprocal step SVE256
+// instrs FRECPS, FRSQRTS
+def : InstRW<[HIP12Write_4c_1V02_1V13], (instregex "^F(RECPS|RSQRTS)_ZZZ_[HSD]")>;
+
+// Floating point reduction, F16 SVE256
+// instrs FADDV
+def : InstRW<[HIP12Write_15c_5V02_5V13], (instregex "^FADDV_VPZ_H")>;
+
+// Floating point reduction, F32 SVE256
+// instrs FADDV
+def : InstRW<[HIP12Write_12c_4V02_4V13], (instregex "^FADDV_VPZ_S")>;
+
+// Floating point reduction, F64 SVE256
+// instrs FADDV
+def : InstRW<[HIP12Write_9c_3V02_3V13], (instregex "^FADDV_VPZ_D")>;
+
+// Floating point reduction SVE256
+// instrs FMAXNMV, FMAXV, FMINNMV, FMINV
+def : InstRW<[HIP12Write_6c_2V02_2V13], (instregex "^(FMAXNMV|FMAXV|FMINNMV|FMINV)_VPZ_[HSD]")>;
+
+// Floating point round to integral SVE256
+// instrs FRINTA, FRINTM, FRINTN, FRINTP, FRINTX, FRINTZ
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FRINT[AIMNPXZ]_ZPmZ_[HSD]")>;
+
+// Floating point square root, F16 SVE256
+// instrs FSQRT
+def : InstRW<[HIP12Write_5c_1V02_1V13_2rc], (instregex "^FSQRT_ZPmZ_H")>;
+
+// Floating point square root, F32 SVE256
+// instrs FSQRT
+def : InstRW<[HIP12Write_7c_1V02_1V13_2rc], (instregex "^FSQRT_ZPmZ_S")>;
+
+// Floating point square root, F64 SVE256
+// instrs FSQRT
+def : InstRW<[HIP12Write_9c_1V02_1V13_2rc], (instregex "^FSQRT_ZPmZ_D")>;
+
+// Floating point trigonometric exponentiation SVE256
+// instrs FEXPA
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instregex "^FEXPA_ZZ_[HSD]")>;
+
+// Floating point trigonometric multiply add SVE256
+// instrs FTMAD
+def : InstRW<[HIP12Write_4c_1V02_1V13], (instregex "^FTMAD_ZZI_[HSD]")>;
+
+// Floating point trigonometric, miscellaneous SVE256
+// instrs FTSMUL
+def : InstRW<[HIP12Write_3c_1V02_1V13], (instregex "^FTSMUL_ZZZ_[HSD]")>;
+
+// Floating point trigonometric, miscellaneous SVE256
+// instrs FTSSEL
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^FTSSEL_ZZZ_[HSD]")>;
+
+//===----------------------------------------------------------------------===//
+// 3.25 SVE BFlot16 (BF16) Instructions
+//===----------------------------------------------------------------------===//
+
+// Convert, F32 to BF16 SVE256
+// instrs BFCVT, BFCVTNT
+def : InstRW<[HIP12Write_4c_2V02_2V13], (instrs BFCVT_ZPmZ, BFCVTNT_ZPmZ)>;
+
+// Dot product SVE256
+// instrs BFDOT
+def : InstRW<[HIP12Write_6c_2V02_2V13], (instrs BFDOT_ZZI, BFDOT_ZZZ)>;
+
+// Matrix multiply accumulate SVE256
+// instrs BFMMLA
+def : InstRW<[HIP12Write_8c_4V02_4V13], (instrs BFMMLA_ZZZ_HtoS)>;
+
+// Multiply accumulate long SVE256
+// instrs BFMLALB, BFMLALT, BFMLALB, BFMLALT
+def : InstRW<[HIP12Wr_ZBFMAL, HIP12Rd_ZBFMAL], (instregex "^BFMLAL[BT]_ZZZI?")>;
+
+//===----------------------------------------------------------------------===//
+// 3.26 SVE Load Instructions
+//===----------------------------------------------------------------------===//
+
+// Load vector
+// instrs LDR
+def : InstRW<[HIP12Write_6c_1LD], (instrs LDR_ZXI)>;
+
+// Load predicate SVE256
+// instrs LDR
+def : InstRW<[HIP12Write_8c_1LD_1V02_1V13], (instrs LDR_PXI)>;
+
+// Contiguous load, scalar + imm
+// instrs LD1B, LD1H, LD1W, LD1D, LD1SB, LD1SH, LD1SW
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1[BHWD]_IMM$",
+ "^LD1S?B_[HSD]_IMM$",
+ "^LD1S?H_[SD]_IMM$",
+ "^LD1S?W_D_IMM$" )>;
+
+// Contiguous load, scalar + scalar
+// instrs LD1B, LD1H, LD1W, LD1D, LD1SB, LD1SH, LD1SW
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1[BHWD]$",
+ "^LD1S?B_[HSD]$",
+ "^LD1S?H_[SD]$",
+ "^LD1S?W_D$" )>;
+
+// Contiguous load broadcast, scalar + imm SVE256
+// instrs LD1RB, LD1RH, LD1RW, LD1RD, LD1RSB, LD1RSH, LD1RSW
+def : InstRW<[HIP12Write_8c_1LD_1V02_1V13], (instregex "^LD1R[BHWD]_IMM$",
+ "^LD1RS?B_[HSD]_IMM$",
+ "^LD1RS?H_[SD]_IMM$",
+ "^LD1RW_D_IMM$",
+ "^LD1RSW_IMM$")>;
+
+// Contiguous load broadcast, scalar + imm
+// instrs LD1RQB, LD1RQH, LD1RQW, LD1RQD
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1RQ_[BHWD]_IMM$")>;
+
+// Contiguous load broadcast, scalar + scalar
+// instrs LD1RQB, LD1RQH, LD1RQW, LD1RQD
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LD1RQ_[BHWD]$")>;
+
+// Non-temporal load, scalar + imm
+// instrs LDNT1B, LDNT1H, LDNT1W, LDNT1D
+// Non-temporal load, scalar + scalar
+// instrs LDNT1B, LDNT1H, LDNT1W, LDNT1D
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDNT1[BHWD]_ZR[IR]$")>;
+
+// Non-temporal gather load, vector + scalar 32-bit element size
+// instrs LDNT1B, LDNT1H, LDNT1W, LDNT1SB, LDNT1SH
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDNT1[BHW]_ZZR_S$",
+ "^LDNT1S[BH]_ZZR_S$")>;
+
+// Non-temporal gather load, vector + scalar 64-bit element size
+// instrs LDNT1B, LDNT1H, LDNT1W, LDNT1SB, LDNT1SH, LDNT1SW
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDNT1S?[BHW]_ZZR_D$")>;
+def : InstRW<[HIP12Write_6c_1LD], (instrs LDNT1D_ZZR_D)>;
+
+// Contiguous first faulting load, scalar + scalar
+// instrs LDFF1B, LDFF1H, LDFF1W, LDFF1D, LDFF1SB, LDFF1SH, LDFF1SW, LDFF1SD
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDFF1[BHWD]$",
+ "^LDFF1S?B_[HSD]$",
+ "^LDFF1S?H_[SD]$",
+ "^LDFF1S?W_D$")>;
+
+// Contiguous non-faulting load, scalar + imm
+// instrs LDNF1B, LDNF1D, LDNF1H, LDNF1W, LDNF1SB, LDNF1SH, LDNF1SW
+def : InstRW<[HIP12Write_6c_1LD], (instregex "^LDNF1[BHWD]_IMM$",
+ "^LDNF1S?B_[HSD]_IMM$",
+ "^LDNF1S?H_[SD]_IMM$",
+ "^LDNF1S?W_D_IMM$")>;
+
+// Contiguous Load two structures to two vectors, scalar + imm SVE256
+// instrs LD2B, LD2D, LD2H, LD2W
+def : InstRW<[HIP12Write_8c_2LD_2V02_2V13], (instregex "^LD2[BHWD]_IMM$")>;
+
+// Contiguous Load two structures to two vectors, scalar + scalar SVE256
+// instrs LD2B, LD2D, LD2H, LD2W
+def : InstRW<[HIP12Write_8c_2LD_2V02_2V13], (instregex "^LD2[BHWD]$")>;
+
+// Contiguous Load three structures to three vectors, scalar + imm SVE256
+// instrs LD3B, LD3H, LD3W
+def : InstRW<[HIP12Write_10c_3LD_6V02_6V13], (instregex "^LD3[BHW]_IMM$")>;
+
+// Contiguous Load three structures to three vectors, scalar + imm SVE256
+// instrs LD3D
+def : InstRW<[HIP12Write_10c_3LD_3V02_3V13], (instregex "^LD3D_IMM$")>;
+
+// Contiguous Load three structures to three vectors, scalar + scalar SVE256
+// instrs LD3B, LD3H, LD3W
+def : InstRW<[HIP12Write_10c_3LD_6V02_6V13], (instregex "^LD3[BHW]$")>;
+
+// Contiguous Load three structures to three vectors, scalar + scalar SVE256
+// instrs LD3D
+def : InstRW<[HIP12Write_10c_3LD_3V02_3V13], (instregex "^LD3D$")>;
+
+// Contiguous Load four structures to four vectors, scalar + imm SVE256
+// instrs LD4B, LD4H LD4W
+def : InstRW<[HIP12Write_11c_4LD_8V02_8V13], (instregex "^LD4[BHW]_IMM$")>;
+
+// Contiguous Load four structures to four vectors, scalar + imm SVE256
+// instrs LD4D
+def : InstRW<[HIP12Write_11c_4LD_4V02_4V13], (instregex "^LD4D_IMM$")>;
+
+// Contiguous Load four structures to four vectors, scalar + scalar SVE256
+// instrs LD4B, LD4H, LD4W
+def : InstRW<[HIP12Write_11c_4LD_8V02_8V13], (instregex "^LD4[BHW]$")>;
+
+// Contiguous Load four structures to four vectors, scalar + scalar SVE256
+// instrs LD4D
+def : InstRW<[HIP12Write_11c_4LD_4V02_4V13], (instregex "^LD4D$")>;
+
+// Gather load, vector + imm, 32- bit element size SVE256
+// instrs LD1B, LD1H, LD1W, LD1SB, LD1SH, LD1SW, LDFF1B, LDFF1H, LDFF1W, LDFF1SB, LDFF1SH, LDFF1SW
+def : InstRW<[HIP12Write_10c_8LD], (instregex "^GLD(FF)?1S?[BH]_S_IMM$",
+ "^GLD(FF)?1W_IMM$")>;
+
+// Gather load, vector + imm, 64- bit element size SVE256
+// instrs LD1B, LD1H, LD1W, LD1D, LD1SB, LD1SH, LD1SW, LDFF1B, LDFF1D, LDFF1H, LDFF1W, LDFF1SB, LDFF1SD, LDFF1SH, LDFF1SW
+def : InstRW<[HIP12Write_9c_4LD], (instregex "^GLD(FF)?1S?[BHW]_D_IMM$",
+ "^GLD(FF)?1D_IMM$")>;
+
+// Gather load, 32-bit scaled offset SVE256
+// instrs LD1H, LD1SH, LDFF1H, LDFF1SH, LD1W, LDFF1W, LDFF1SW
+def : InstRW<[HIP12Write_10c_8LD],
+ (instregex "^GLD(FF)?1S?H_S_[SU]XTW_SCALED$",
+ "^GLD(FF)?1W_[SU]XTW_SCALED")>;
+
+// Gather load, 64-bit scaled offset SVE256
+// NOTE: These instructions are not specified in the SOG.
+def : InstRW<[HIP12Write_10c_8LD],
+ (instregex "^GLD(FF)?1S?[HW]_D_([SU]XTW_)?SCALED$",
+ "^GLD(FF)?1D_([SU]XTW_)?SCALED$")>;
+
+// Gather load, 32-bit unpacked unscaled offset SVE256
+// instrs LD1B, LD1SB, LDFF1B, LDFF1SB, LD1D, LDFF1D, LD1H, LD1SH, LDFF1H, LDFF1SH, LD1W, LD1SW, LDFF1W, LDFF1SW
+def : InstRW<[HIP12Write_9c_4LD],
+ (instregex "^GLD(FF)?1S?[BH]_S_[SU]XTW$",
+ "^GLD(FF)?1W_[SU]XTW$")>;
+
+// Gather load, 64-bit unpacked unscaled offset SVE256
+// NOTE: These instructions are not specified in the SOG.
+def : InstRW<[HIP12Write_9c_4LD],
+ (instregex "^GLD(FF)?1S?[BHW]_D(_[SU]XTW)?$",
+ "^GLD(FF)?1D(_[SU]XTW)?$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.27 SVE Store Instructions
+//===----------------------------------------------------------------------===//
+
+// Store from predicate reg
+// instrs STR
+def : InstRW<[HIP12Write_4c_1V02_1V13_1ST_1STD], (instrs STR_PXI)>;
+
+// Store from vector reg
+// instrs STR
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instrs STR_ZXI)>;
+
+// Contiguous store, scalar + imm
+// instrs ST1B, ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^ST1[BHWD]_IMM$",
+ "^ST1B_[HSD]_IMM$",
+ "^ST1H_[SD]_IMM$",
+ "^ST1W_D_IMM$")>;
+
+// Contiguous store, scalar + scalar
+// instrs ST1B, ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^ST1H(_[SD])?$")>;
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^ST1[BWD]$",
+ "^ST1B_[HSD]$",
+ "^ST1W_D$")>;
+
+// Contiguous store two structures from two vectors, scalar + imm SVE256
+// instrs ST2B, ST2H, ST2W, ST2D
+def : InstRW<[HIP12Write_4c_2V02_2V13_2ST_2STD], (instregex "^ST2[BHWD]_IMM$")>;
+
+// Contiguous store two structures from two vectors, scalar + scalar SVE256
+// instrs ST2B, ST2H, ST2W, ST2D
+def : InstRW<[HIP12Write_4c_2V02_2V13_2ST_2STD], (instrs ST2H)>;
+def : InstRW<[HIP12Write_4c_2V02_2V13_2ST_2STD], (instregex "^ST2[BWD]$")>;
+
+// Contiguous store three structures from three vectors, scalar + imm SVE256
+// instrs ST3B, ST3H, ST3W, ST3D
+def : InstRW<[HIP12Write_7c_6V02_6V13_6ST_6STD], (instregex "^ST3[BHWD]_IMM$")>;
+
+// Contiguous store three structures from three vectors, scalar + scalar SVE256
+// instrs ST3B, ST3H, ST3W, ST3D
+def : InstRW<[HIP12Write_7c_6V02_6V13_6ST_6STD], (instregex "^ST3[BHWD]$")>;
+
+// Contiguous store four structures from four vectors, scalar + imm SVE256
+// instrs ST4B, ST4H, ST4W, ST4D
+def : InstRW<[HIP12Write_7c_8V02_8V13_8ST_8STD], (instregex "^ST4[BHWD]_IMM$")>;
+
+// Contiguous store four structures from four vectors, scalar + scalar SVE256
+// instrs ST4B, ST4H, ST4W, ST4D
+def : InstRW<[HIP12Write_7c_8V02_8V13_8ST_8STD], (instregex "^ST4[BHWD]$")>;
+
+// Non-temporal store, scalar + imm
+// instrs STNT1B, STNT1H, STNT1W, STNT1D
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^STNT1[BHWD]_ZRI$")>;
+
+// Non-temporal store, scalar + scalar
+// instrs STNT1B, STNT1H, STNT1W, STNT1D
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instrs STNT1H_ZRR)>;
+def : InstRW<[HIP12Write_1c_1ST_1STD], (instregex "^STNT1[BWD]_ZRR$")>;
+
+// Scatter non-temporal store, vector + scalar 32-bit element size SVE256
+// instrs STNT1B, STNT1H, STNT1W
+def : InstRW<[HIP12Write_8c_8ST_8STD], (instregex "^STNT1[BHW]_ZZR_S")>;
+
+// Scatter non-temporal store, vector + scalar 64-bit element size SVE256
+// instrs STNT1B, STNT1H, STNT1W, STNT1D
+def : InstRW<[HIP12Write_4c_4ST_4STD], (instregex "^STNT1[BHWD]_ZZR_D")>;
+
+// Scatter store vector + imm 32-bit element size SVE256
+// instrs ST1B, ST1H, ST1W
+def : InstRW<[HIP12Write_8c_8ST_8STD], (instregex "^SST1[BH]_S_IMM$",
+ "^SST1W_IMM$")>;
+
+// Scatter store vector + imm 64-bit element size SVE256
+// instrs ST1B, ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_4c_4ST_4STD], (instregex "^SST1[BHW]_D_IMM$",
+ "^SST1D_IMM$")>;
+
+// Scatter store, 32-bit scaled offset SVE256
+// instrs ST1H, ST1W
+def : InstRW<[HIP12Write_8c_8ST_8STD],
+ (instregex "^SST1(H_S|W)_[SU]XTW_SCALED$")>;
+
+// Scatter store, 32-bit unpacked unscaled offset SVE256
+// instrs ST1B, ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_8c_8ST_8STD], (instregex "^SST1[BHW]_D_[SU]XTW$",
+ "^SST1D_[SU]XTW$")>;
+
+// Scatter store, 32-bit unpacked scaled offset SVE256
+// instrs ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_8c_8ST_8STD], (instregex "^SST1[HW]_D_[SU]XTW_SCALED$",
+ "^SST1D_[SU]XTW_SCALED$")>;
+
+// Scatter store, 32-bit unscaled offset SVE256
+// instrs ST1B, ST1H, ST1W
+def : InstRW<[HIP12Write_8c_8ST_8STD], (instregex "^SST1[BH]_S_[SU]XTW$",
+ "^SST1W_[SU]XTW$")>;
+
+// Scatter store, 64-bit scaled offset SVE256
+// instrs ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_4c_4ST_4STD], (instregex "^SST1[HW]_D_SCALED$",
+ "^SST1D_SCALED$")>;
+
+// Scatter store, 64-bit unscaled offset SVE256
+// instrs ST1B, ST1H, ST1W, ST1D
+def : InstRW<[HIP12Write_4c_4ST_4STD], (instregex "^SST1[BHW]_D$",
+ "^SST1D$")>;
+
+//===----------------------------------------------------------------------===//
+// 3.28 SVE Miscellaneous Instructions
+//===----------------------------------------------------------------------===//
+
+// Read first fault register, unpredicated
+// instrs RDFFR
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instrs RDFFR_P)>;
+
+// Read first fault register, predicated
+// instrs RDFFR
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instrs RDFFR_PPz)>;
+
+// Read first fault register and set flags
+// instrs RDFFRS
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instrs RDFFRS_PPz)>;
+
+// Set first fault register
+// instrs SETFFR
+def : InstRW<[HIP12Write_0c], (instrs SETFFR)>;
+
+// Write to first fault register
+// instrs WRFFR
+def : InstRW<[HIP12Write_9c_1V02_1V13_1ALU25_18rc], (instrs WRFFR)>;
+
+//===----------------------------------------------------------------------===//
+// Prefetch
+//===----------------------------------------------------------------------===//
+
+// NOTE: This is not specified in the SOG.
+def : InstRW<[HIP12Write_4c_1LD], (instregex "^PRF[BHWD]")>;
+
+//===----------------------------------------------------------------------===//
+// 3.29 SVE Cryptographic Instructions
+//===----------------------------------------------------------------------===//
+
+// crypto AES ops SVE256
+// instrs AESD, AESE, AESMC, AESIMC
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^AES[DE]_ZZZ_B$",
+ "^AESI?MC_ZZ_B$")>;
+
+// Crypto SHA3 ops SVE256
+// instrs BCAX, EOR3, RAX1
+def : InstRW<[HIP12Write_1c_1V02_1V13], (instregex "^(BCAX|EOR3)_ZZZZ$",
+ "^RAX1_ZZZ_D$")>;
+
+// Crypto SHA3 ops SVE256
+// instrs XAR
+def : InstRW<[HIP12Write_2c_1V02_1V13], (instregex "^XAR_ZZZI_[BHSD]$")>;
+
+// Crypto SM4 ops SVE256
+// instrs SM4E, SM4EKEY
+def : InstRW<[HIP12Write_4c_1V02_1V13], (instregex "^SM4E(KEY)?_ZZZ_S$")>;
+
+} // SchedModel = HIP12Model
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-basic-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-basic-instructions.s
new file mode 100644
index 0000000000000..956b3efdede2b
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-basic-instructions.s
@@ -0,0 +1,2519 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/basic-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.17 add w2, w3, #4095
+# CHECK-NEXT: 1 1 0.17 add w30, w29, #1, lsl #12
+# CHECK-NEXT: 1 1 0.17 add w13, w5, #4095, lsl #12
+# CHECK-NEXT: 1 1 0.17 add x5, x7, #1638
+# CHECK-NEXT: 1 1 0.17 add w20, wsp, #801
+# CHECK-NEXT: 1 1 0.17 add wsp, wsp, #1104
+# CHECK-NEXT: 1 1 0.17 add wsp, w30, #4084
+# CHECK-NEXT: 1 1 0.17 add x0, x24, #291
+# CHECK-NEXT: 1 1 0.17 add x3, x24, #4095, lsl #12
+# CHECK-NEXT: 1 1 0.17 add x8, sp, #1074
+# CHECK-NEXT: 1 1 0.17 add sp, x29, #3816
+# CHECK-NEXT: 1 1 0.17 sub w0, wsp, #4077
+# CHECK-NEXT: 1 1 0.17 sub w4, w20, #546, lsl #12
+# CHECK-NEXT: 1 1 0.17 sub sp, sp, #288
+# CHECK-NEXT: 1 1 0.17 sub wsp, w19, #16
+# CHECK-NEXT: 1 1 0.25 adds w13, w23, #291, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmn w2, #4095
+# CHECK-NEXT: 1 1 0.25 adds w20, wsp, #0
+# CHECK-NEXT: 1 1 0.25 cmn x3, #1, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmp wsp, #2342
+# CHECK-NEXT: 1 1 0.25 cmp sp, #20, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmp x30, #4095
+# CHECK-NEXT: 1 1 0.25 subs x4, sp, #3822
+# CHECK-NEXT: 1 1 0.25 cmn w3, #291, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmn wsp, #1365
+# CHECK-NEXT: 1 1 0.25 cmn sp, #1092, lsl #12
+# CHECK-NEXT: 1 1 0.17 mov x10, #-63432
+# CHECK-NEXT: 1 2 0.50 add wsp, wsp, w10
+# CHECK-NEXT: 1 2 0.50 add x25, x9, w25, uxtb
+# CHECK-NEXT: 1 1 0.17 add w3, w5, w7
+# CHECK-NEXT: 1 1 0.17 add wzr, w3, w5
+# CHECK-NEXT: 1 1 0.17 add w20, wzr, w4
+# CHECK-NEXT: 1 1 0.17 add w4, w6, wzr
+# CHECK-NEXT: 1 1 0.17 add w11, w13, w15
+# CHECK-NEXT: 1 2 0.50 add w9, w3, wzr, lsl #1
+# CHECK-NEXT: 1 2 0.50 add w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.17 add w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 2 0.50 add w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 2 0.50 add w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.17 add w2, w3, w4, asr #0
+# CHECK-NEXT: 1 2 0.50 add w5, w6, w7, asr #21
+# CHECK-NEXT: 1 2 0.50 add w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.17 add x3, x5, x7
+# CHECK-NEXT: 1 1 0.17 add xzr, x3, x5
+# CHECK-NEXT: 1 1 0.17 add x20, xzr, x4
+# CHECK-NEXT: 1 1 0.17 add x4, x6, xzr
+# CHECK-NEXT: 1 1 0.17 add x11, x13, x15
+# CHECK-NEXT: 1 2 0.50 add x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 2 0.50 add x17, x29, x20, lsl #3
+# CHECK-NEXT: 1 1 0.17 add x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 2 0.50 add x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 2 0.50 add x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.17 add x2, x3, x4, asr #0
+# CHECK-NEXT: 1 2 0.50 add x5, x6, x7, asr #21
+# CHECK-NEXT: 1 2 0.50 add x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 adds w3, w5, w7
+# CHECK-NEXT: 1 2 0.50 adds w17, wsp, w25
+# CHECK-NEXT: 1 2 0.50 adds x13, x23, w8, uxtb
+# CHECK-NEXT: 1 1 0.25 cmn w3, w5
+# CHECK-NEXT: 1 1 0.25 adds w20, wzr, w4
+# CHECK-NEXT: 1 1 0.25 adds w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 adds w11, w13, w15
+# CHECK-NEXT: 1 2 0.50 adds w9, w3, wzr, lsl #1
+# CHECK-NEXT: 1 2 0.50 adds w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 adds w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 2 0.50 adds w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 2 0.50 adds w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 adds w2, w3, w4, asr #0
+# CHECK-NEXT: 1 2 0.50 adds w5, w6, w7, asr #21
+# CHECK-NEXT: 1 2 0.50 adds w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 adds x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 cmn x3, x5
+# CHECK-NEXT: 1 1 0.25 adds x20, xzr, x4
+# CHECK-NEXT: 1 1 0.25 adds x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 adds x11, x13, x15
+# CHECK-NEXT: 1 2 0.50 adds x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 2 0.50 adds x17, x29, x20, lsl #3
+# CHECK-NEXT: 1 1 0.25 adds x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 2 0.50 adds x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 2 0.50 adds x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 adds x2, x3, x4, asr #0
+# CHECK-NEXT: 1 2 0.50 adds x5, x6, x7, asr #21
+# CHECK-NEXT: 1 2 0.50 adds x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.17 sub w3, w5, w7
+# CHECK-NEXT: 1 1 0.17 sub wzr, w3, w5
+# CHECK-NEXT: 1 1 0.17 sub w4, w6, wzr
+# CHECK-NEXT: 1 1 0.17 sub w11, w13, w15
+# CHECK-NEXT: 1 2 0.50 sub w9, w3, wzr, lsl #1
+# CHECK-NEXT: 1 2 0.50 sub w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.17 sub w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 2 0.50 sub w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 2 0.50 sub w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.17 sub w2, w3, w4, asr #0
+# CHECK-NEXT: 1 2 0.50 sub w5, w6, w7, asr #21
+# CHECK-NEXT: 1 2 0.50 sub w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.17 sub x3, x5, x7
+# CHECK-NEXT: 1 1 0.17 sub xzr, x3, x5
+# CHECK-NEXT: 1 1 0.17 sub x4, x6, xzr
+# CHECK-NEXT: 1 1 0.17 sub x11, x13, x15
+# CHECK-NEXT: 1 2 0.50 sub x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 2 0.50 sub x17, x29, x20, lsl #3
+# CHECK-NEXT: 1 1 0.17 sub x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 2 0.50 sub x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 2 0.50 sub x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.17 sub x2, x3, x4, asr #0
+# CHECK-NEXT: 1 2 0.50 sub x5, x6, x7, asr #21
+# CHECK-NEXT: 1 2 0.50 sub x8, x9, x10, asr #63
+# CHECK-NEXT: 1 2 0.50 sub w13, wsp, w10
+# CHECK-NEXT: 1 2 0.50 sub x16, x2, w19, uxtb
+# CHECK-NEXT: 1 2 0.50 subs x13, x15, x14, sxtx #1
+# CHECK-NEXT: 1 1 0.25 subs w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 cmp w3, w5
+# CHECK-NEXT: 1 1 0.25 subs w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 subs w11, w13, w15
+# CHECK-NEXT: 1 2 0.50 subs w9, w3, wzr, lsl #1
+# CHECK-NEXT: 1 2 0.50 subs w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 subs w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 2 0.50 subs w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 2 0.50 subs w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 subs w2, w3, w4, asr #0
+# CHECK-NEXT: 1 2 0.50 subs w5, w6, w7, asr #21
+# CHECK-NEXT: 1 2 0.50 subs w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 subs x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 cmp x3, x5
+# CHECK-NEXT: 1 1 0.25 subs x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 subs x11, x13, x15
+# CHECK-NEXT: 1 2 0.50 subs x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 2 0.50 subs x17, x29, x20, lsl #3
+# CHECK-NEXT: 1 1 0.25 subs x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 2 0.50 subs x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 2 0.50 subs x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 subs x2, x3, x4, asr #0
+# CHECK-NEXT: 1 2 0.50 subs x5, x6, x7, asr #21
+# CHECK-NEXT: 1 2 0.50 subs x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 cmn wzr, w4
+# CHECK-NEXT: 1 1 0.25 cmn w5, wzr
+# CHECK-NEXT: 1 1 0.25 cmn w6, w7
+# CHECK-NEXT: 1 2 0.50 cmn w8, w9, lsl #1
+# CHECK-NEXT: 1 2 0.50 cmn w10, w11, lsl #31
+# CHECK-NEXT: 1 1 0.25 cmn w12, w13, lsr #0
+# CHECK-NEXT: 1 2 0.50 cmn w14, w15, lsr #21
+# CHECK-NEXT: 1 2 0.50 cmn w16, w17, lsr #31
+# CHECK-NEXT: 1 1 0.25 cmn w18, w19, asr #0
+# CHECK-NEXT: 1 2 0.50 cmn w20, w21, asr #22
+# CHECK-NEXT: 1 2 0.50 cmn w22, w23, asr #31
+# CHECK-NEXT: 1 1 0.25 cmn x0, x3
+# CHECK-NEXT: 1 1 0.25 cmn xzr, x4
+# CHECK-NEXT: 1 1 0.25 cmn x5, xzr
+# CHECK-NEXT: 1 1 0.25 cmn x6, x7
+# CHECK-NEXT: 1 2 0.50 cmn x8, x9, lsl #15
+# CHECK-NEXT: 1 2 0.50 cmn x10, x11, lsl #3
+# CHECK-NEXT: 1 1 0.25 cmn x12, x13, lsr #0
+# CHECK-NEXT: 1 2 0.50 cmn x14, x15, lsr #41
+# CHECK-NEXT: 1 2 0.50 cmn x16, x17, lsr #63
+# CHECK-NEXT: 1 1 0.25 cmn x18, x19, asr #0
+# CHECK-NEXT: 1 2 0.50 cmn x20, x21, asr #55
+# CHECK-NEXT: 1 2 0.50 cmn x22, x23, asr #63
+# CHECK-NEXT: 1 1 0.25 cmp w0, w3
+# CHECK-NEXT: 1 1 0.25 cmp wzr, w4
+# CHECK-NEXT: 1 1 0.25 cmp w5, wzr
+# CHECK-NEXT: 1 1 0.25 cmp w6, w7
+# CHECK-NEXT: 1 2 0.50 cmp w8, w9, lsl #1
+# CHECK-NEXT: 1 2 0.50 cmp w10, w11, lsl #31
+# CHECK-NEXT: 1 1 0.25 cmp w12, w13, lsr #0
+# CHECK-NEXT: 1 2 0.50 cmp w14, w15, lsr #21
+# CHECK-NEXT: 1 1 0.25 cmp w18, w19, asr #0
+# CHECK-NEXT: 1 2 0.50 cmp w20, w21, asr #22
+# CHECK-NEXT: 1 2 0.50 cmp w22, w23, asr #31
+# CHECK-NEXT: 1 2 0.50 cmp wsp, w26
+# CHECK-NEXT: 1 2 0.50 cmp x16, w27, uxtb
+# CHECK-NEXT: 1 1 0.25 cmp x0, x3
+# CHECK-NEXT: 1 1 0.25 cmp xzr, x4
+# CHECK-NEXT: 1 1 0.25 cmp x5, xzr
+# CHECK-NEXT: 1 1 0.25 cmp x6, x7
+# CHECK-NEXT: 1 2 0.50 cmp x8, x9, lsl #15
+# CHECK-NEXT: 1 2 0.50 cmp x10, x11, lsl #3
+# CHECK-NEXT: 1 1 0.25 cmp x12, x13, lsr #0
+# CHECK-NEXT: 1 2 0.50 cmp x14, x15, lsr #41
+# CHECK-NEXT: 1 2 0.50 cmp x16, x17, lsr #63
+# CHECK-NEXT: 1 1 0.25 cmp x18, x19, asr #0
+# CHECK-NEXT: 1 2 0.50 cmp x20, x21, asr #55
+# CHECK-NEXT: 1 2 0.50 cmp x22, x23, asr #63
+# CHECK-NEXT: 1 1 0.25 cmp wzr, w0
+# CHECK-NEXT: 1 1 0.25 cmp xzr, x0
+# CHECK-NEXT: 1 1 0.17 mov sp, x30
+# CHECK-NEXT: 1 1 0.17 mov wsp, w20
+# CHECK-NEXT: 1 1 0.17 mov x11, sp
+# CHECK-NEXT: 1 1 0.17 mov w24, wsp
+# CHECK-NEXT: 1 1 0.17 adc w29, w27, w25
+# CHECK-NEXT: 1 1 0.17 adc wzr, w3, w4
+# CHECK-NEXT: 1 1 0.17 adc w9, wzr, w10
+# CHECK-NEXT: 1 1 0.17 adc w20, w0, wzr
+# CHECK-NEXT: 1 1 0.17 adc x29, x27, x25
+# CHECK-NEXT: 1 1 0.17 adc xzr, x3, x4
+# CHECK-NEXT: 1 1 0.17 adc x9, xzr, x10
+# CHECK-NEXT: 1 1 0.17 adc x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 adcs w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 adcs wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 adcs w9, wzr, w10
+# CHECK-NEXT: 1 1 0.25 adcs w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 adcs x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 adcs xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 adcs x9, xzr, x10
+# CHECK-NEXT: 1 1 0.25 adcs x20, x0, xzr
+# CHECK-NEXT: 1 1 0.17 sbc w29, w27, w25
+# CHECK-NEXT: 1 1 0.17 sbc wzr, w3, w4
+# CHECK-NEXT: 1 1 0.17 ngc w9, w10
+# CHECK-NEXT: 1 1 0.17 sbc w20, w0, wzr
+# CHECK-NEXT: 1 1 0.17 sbc x29, x27, x25
+# CHECK-NEXT: 1 1 0.17 sbc xzr, x3, x4
+# CHECK-NEXT: 1 1 0.17 ngc x9, x10
+# CHECK-NEXT: 1 1 0.17 sbc x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 sbcs w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 sbcs wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 ngcs w9, w10
+# CHECK-NEXT: 1 1 0.25 sbcs w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 sbcs x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 sbcs xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 ngcs x9, x10
+# CHECK-NEXT: 1 1 0.25 sbcs x20, x0, xzr
+# CHECK-NEXT: 1 1 0.17 ngc w3, w12
+# CHECK-NEXT: 1 1 0.17 ngc wzr, w9
+# CHECK-NEXT: 1 1 0.17 ngc w23, wzr
+# CHECK-NEXT: 1 1 0.17 ngc x29, x30
+# CHECK-NEXT: 1 1 0.17 ngc xzr, x0
+# CHECK-NEXT: 1 1 0.17 ngc x0, xzr
+# CHECK-NEXT: 1 1 0.25 ngcs w3, w12
+# CHECK-NEXT: 1 1 0.25 ngcs wzr, w9
+# CHECK-NEXT: 1 1 0.25 ngcs w23, wzr
+# CHECK-NEXT: 1 1 0.25 ngcs x29, x30
+# CHECK-NEXT: 1 1 0.25 ngcs xzr, x0
+# CHECK-NEXT: 1 1 0.25 ngcs x0, xzr
+# CHECK-NEXT: 1 1 0.50 sbfx x1, x2, #3, #2
+# CHECK-NEXT: 1 1 0.50 asr x3, x4, #63
+# CHECK-NEXT: 1 1 0.50 asr wzr, wzr, #31
+# CHECK-NEXT: 1 1 0.50 sbfx w12, w9, #0, #1
+# CHECK-NEXT: 1 1 0.50 ubfiz x4, x5, #52, #11
+# CHECK-NEXT: 1 1 0.50 ubfx xzr, x4, #0, #1
+# CHECK-NEXT: 1 1 0.50 ubfiz x4, xzr, #1, #6
+# CHECK-NEXT: 1 1 0.50 lsr x5, x6, #12
+# CHECK-NEXT: 1 1 0.50 bfi x4, x5, #52, #11
+# CHECK-NEXT: 1 1 0.50 bfxil xzr, x4, #0, #1
+# CHECK-NEXT: 1 1 0.50 bfc x4, #1, #6
+# CHECK-NEXT: 1 1 0.50 bfxil x5, x6, #12, #52
+# CHECK-NEXT: 1 1 0.50 sxtb w1, w2
+# CHECK-NEXT: 1 1 0.50 sxtb xzr, w3
+# CHECK-NEXT: 1 1 0.50 sxth w9, w10
+# CHECK-NEXT: 1 1 0.50 sxth x0, w1
+# CHECK-NEXT: 1 1 0.50 sxtw x3, w30
+# CHECK-NEXT: 1 1 0.50 uxtb w1, w2
+# CHECK-NEXT: 1 1 0.50 uxth w9, w10
+# CHECK-NEXT: 1 1 0.50 ubfx x3, x30, #0, #32
+# CHECK-NEXT: 1 1 0.50 asr w3, w2, #0
+# CHECK-NEXT: 1 1 0.50 asr w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 asr x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 asr w1, wzr, #3
+# CHECK-NEXT: 1 1 0.50 lsr w3, w2, #0
+# CHECK-NEXT: 1 1 0.50 lsr w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 lsr x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 lsr wzr, wzr, #3
+# CHECK-NEXT: 1 1 0.50 lsl w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 lsl x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 lsl w1, wzr, #3
+# CHECK-NEXT: 1 1 0.50 sbfiz x2, x3, #63, #1
+# CHECK-NEXT: 1 1 0.50 sbfiz x9, x10, #5, #59
+# CHECK-NEXT: 1 1 0.50 sbfiz w11, w12, #31, #1
+# CHECK-NEXT: 1 1 0.50 sbfiz w13, w14, #29, #3
+# CHECK-NEXT: 1 1 0.50 sbfiz xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 sbfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 asr x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 asr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 asr x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 asr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 asr w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 asr w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 sbfx xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 bfi x2, x3, #63, #1
+# CHECK-NEXT: 1 1 0.50 bfi x9, x10, #5, #59
+# CHECK-NEXT: 1 1 0.50 bfi w11, w12, #31, #1
+# CHECK-NEXT: 1 1 0.50 bfi w13, w14, #29, #3
+# CHECK-NEXT: 1 1 0.50 bfc xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 bfxil w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 bfxil x2, x3, #63, #1
+# CHECK-NEXT: 1 1 0.50 bfxil x19, x20, #0, #64
+# CHECK-NEXT: 1 1 0.50 bfxil x9, x10, #5, #59
+# CHECK-NEXT: 1 1 0.50 bfxil w9, w10, #0, #32
+# CHECK-NEXT: 1 1 0.50 bfxil w11, w12, #31, #1
+# CHECK-NEXT: 1 1 0.50 bfxil w13, w14, #29, #3
+# CHECK-NEXT: 1 1 0.50 bfxil xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 lsl x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 lsl x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 lsl w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 lsl w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 ubfiz xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 ubfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 lsr x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 lsr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 lsr x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 lsr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 lsr w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 lsr w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 ubfx xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 cbz w5, #4
+# CHECK-NEXT: 1 1 0.50 cbz x5, #0
+# CHECK-NEXT: 1 1 0.50 cbnz x2, #-4
+# CHECK-NEXT: 1 1 0.50 cbnz x26, #1048572
+# CHECK-NEXT: 1 1 0.50 cbz wzr, #0
+# CHECK-NEXT: 1 1 0.50 cbnz xzr, #0
+# CHECK-NEXT: 1 1 0.50 cbnz w21, test
+# CHECK-NEXT: 1 1 0.50 b.ne #4
+# CHECK-NEXT: 1 1 0.50 b.ge #1048572
+# CHECK-NEXT: 1 1 0.50 b.ge #-4
+# CHECK-NEXT: 1 1 0.50 ccmp w1, #31, #0, eq
+# CHECK-NEXT: 1 1 0.50 ccmp w3, #0, #15, hs
+# CHECK-NEXT: 1 1 0.50 ccmp wzr, #15, #13, hs
+# CHECK-NEXT: 1 1 0.50 ccmp x9, #31, #0, le
+# CHECK-NEXT: 1 1 0.50 ccmp x3, #0, #15, gt
+# CHECK-NEXT: 1 1 0.50 ccmp xzr, #5, #7, ne
+# CHECK-NEXT: 1 1 0.50 ccmn w1, #31, #0, eq
+# CHECK-NEXT: 1 1 0.50 ccmn w3, #0, #15, hs
+# CHECK-NEXT: 1 1 0.50 ccmn wzr, #15, #13, hs
+# CHECK-NEXT: 1 1 0.50 ccmn x9, #31, #0, le
+# CHECK-NEXT: 1 1 0.50 ccmn x3, #0, #15, gt
+# CHECK-NEXT: 1 1 0.50 ccmn xzr, #5, #7, ne
+# CHECK-NEXT: 1 1 0.50 ccmp w1, wzr, #0, eq
+# CHECK-NEXT: 1 1 0.50 ccmp w3, w0, #15, hs
+# CHECK-NEXT: 1 1 0.50 ccmp wzr, w15, #13, hs
+# CHECK-NEXT: 1 1 0.50 ccmp x9, xzr, #0, le
+# CHECK-NEXT: 1 1 0.50 ccmp x3, x0, #15, gt
+# CHECK-NEXT: 1 1 0.50 ccmp xzr, x5, #7, ne
+# CHECK-NEXT: 1 1 0.50 ccmn w1, wzr, #0, eq
+# CHECK-NEXT: 1 1 0.50 ccmn w3, w0, #15, hs
+# CHECK-NEXT: 1 1 0.50 ccmn wzr, w15, #13, hs
+# CHECK-NEXT: 1 1 0.50 ccmn x9, xzr, #0, le
+# CHECK-NEXT: 1 1 0.50 ccmn x3, x0, #15, gt
+# CHECK-NEXT: 1 1 0.50 ccmn xzr, x5, #7, ne
+# CHECK-NEXT: 1 1 0.50 csel w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.50 csel wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.50 csel w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.50 csel w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.50 csel x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.50 csel xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.50 csel x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.50 csel x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.50 csinc w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.50 csinc wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.50 csinc w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.50 csinc w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.50 csinc x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.50 csinc xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.50 csinc x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.50 csinc x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.50 csinv w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.50 csinv wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.50 csinv w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.50 csinv w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.50 csinv x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.50 csinv xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.50 csinv x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.50 csinv x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.50 csneg w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.50 csneg wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.50 csneg w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.50 csneg w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.50 csneg x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.50 csneg xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.50 csneg x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.50 csneg x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.50 cset w3, eq
+# CHECK-NEXT: 1 1 0.50 cset x9, pl
+# CHECK-NEXT: 1 1 0.50 csetm w20, ne
+# CHECK-NEXT: 1 1 0.50 csetm x30, ge
+# CHECK-NEXT: 1 1 0.50 csinc w2, wzr, wzr, al
+# CHECK-NEXT: 1 1 0.50 csinv x3, xzr, xzr, nv
+# CHECK-NEXT: 1 1 0.50 cinc w3, w5, gt
+# CHECK-NEXT: 1 1 0.50 cinc wzr, w4, le
+# CHECK-NEXT: 1 1 0.50 cset w9, lt
+# CHECK-NEXT: 1 1 0.50 cinc x3, x5, gt
+# CHECK-NEXT: 1 1 0.50 cinc xzr, x4, le
+# CHECK-NEXT: 1 1 0.50 cset x9, lt
+# CHECK-NEXT: 1 1 0.50 csinc w5, w6, w6, nv
+# CHECK-NEXT: 1 1 0.50 csinc x1, x2, x2, al
+# CHECK-NEXT: 1 1 0.50 cinv w3, w5, gt
+# CHECK-NEXT: 1 1 0.50 cinv wzr, w4, le
+# CHECK-NEXT: 1 1 0.50 csetm w9, lt
+# CHECK-NEXT: 1 1 0.50 cinv x3, x5, gt
+# CHECK-NEXT: 1 1 0.50 cinv xzr, x4, le
+# CHECK-NEXT: 1 1 0.50 csetm x9, lt
+# CHECK-NEXT: 1 1 0.50 csinv x1, x0, x0, al
+# CHECK-NEXT: 1 1 0.50 csinv w9, w8, w8, nv
+# CHECK-NEXT: 1 1 0.50 cneg w3, w5, gt
+# CHECK-NEXT: 1 1 0.50 cneg wzr, w4, le
+# CHECK-NEXT: 1 1 0.50 cneg w9, wzr, lt
+# CHECK-NEXT: 1 1 0.50 cneg x3, x5, gt
+# CHECK-NEXT: 1 1 0.50 cneg xzr, x4, le
+# CHECK-NEXT: 1 1 0.50 cneg x9, xzr, lt
+# CHECK-NEXT: 1 1 0.50 csneg x4, x8, x8, al
+# CHECK-NEXT: 1 1 0.50 rbit w0, w7
+# CHECK-NEXT: 1 1 0.50 rbit x18, x3
+# CHECK-NEXT: 1 1 0.50 rev16 w17, w1
+# CHECK-NEXT: 1 1 0.50 rev16 x5, x2
+# CHECK-NEXT: 1 1 0.50 rev w18, w0
+# CHECK-NEXT: 1 1 0.50 rev32 x20, x1
+# CHECK-NEXT: 1 1 0.50 rev x22, x2
+# CHECK-NEXT: 1 1 0.50 clz w24, w3
+# CHECK-NEXT: 1 1 0.50 clz x26, x4
+# CHECK-NEXT: 1 1 0.50 cls w3, w5
+# CHECK-NEXT: 1 1 0.50 cls x20, x5
+# CHECK-NEXT: 1 6 1.00 udiv w0, w7, w10
+# CHECK-NEXT: 1 8 1.00 udiv x9, x22, x4
+# CHECK-NEXT: 1 6 1.00 sdiv w12, w21, w0
+# CHECK-NEXT: 1 8 1.00 sdiv x13, x2, x1
+# CHECK-NEXT: 1 1 0.50 lsl w11, w12, w13
+# CHECK-NEXT: 1 1 0.50 lsl x14, x15, x16
+# CHECK-NEXT: 1 1 0.50 lsr w17, w18, w19
+# CHECK-NEXT: 1 1 0.50 lsr x20, x21, x22
+# CHECK-NEXT: 1 1 0.50 asr w23, w24, w25
+# CHECK-NEXT: 1 1 0.50 asr x26, x27, x28
+# CHECK-NEXT: 1 1 0.50 ror w0, w1, w2
+# CHECK-NEXT: 1 1 0.50 ror x3, x4, x5
+# CHECK-NEXT: 1 1 0.50 lsl w6, w7, w8
+# CHECK-NEXT: 1 1 0.50 lsl x9, x10, x11
+# CHECK-NEXT: 1 1 0.50 lsr w12, w13, w14
+# CHECK-NEXT: 1 1 0.50 lsr x15, x16, x17
+# CHECK-NEXT: 1 1 0.50 asr w18, w19, w20
+# CHECK-NEXT: 1 1 0.50 asr x21, x22, x23
+# CHECK-NEXT: 1 1 0.50 ror w24, w25, w26
+# CHECK-NEXT: 1 1 0.50 ror x27, x28, x29
+# CHECK-NEXT: 1 2 0.50 crc32cb w30, w23, w15
+# CHECK-NEXT: 1 2 0.50 crc32cb wzr, w12, w14
+# CHECK-NEXT: 1 2 0.50 crc32cb w28, w10, w11
+# CHECK-NEXT: 1 2 0.50 crc32b w27, w12, w15
+# CHECK-NEXT: 1 2 0.50 crc32h w3, w15, w21
+# CHECK-NEXT: 1 2 0.50 crc32w w9, w18, w24
+# CHECK-NEXT: 1 2 0.50 crc32x w19, w6, x25
+# CHECK-NEXT: 1 2 0.50 crc32ch w25, w26, w16
+# CHECK-NEXT: 1 2 0.50 crc32cw w27, w12, w23
+# CHECK-NEXT: 1 2 0.50 crc32cx w21, w28, x5
+# CHECK-NEXT: 1 3 0.50 smulh x30, x29, x28
+# CHECK-NEXT: 1 3 0.50 smulh xzr, x27, x26
+# CHECK-NEXT: 1 3 0.50 umulh x30, x29, x28
+# CHECK-NEXT: 1 3 0.50 umulh x23, x30, xzr
+# CHECK-NEXT: 2 3 0.50 madd w1, w3, w7, w4
+# CHECK-NEXT: 2 3 0.50 madd wzr, w0, w9, w11
+# CHECK-NEXT: 2 3 0.50 madd w13, wzr, w4, w4
+# CHECK-NEXT: 2 3 0.50 madd w19, w30, wzr, w29
+# CHECK-NEXT: 2 3 0.50 mul w4, w5, w6
+# CHECK-NEXT: 2 4 0.50 madd x1, x3, x7, x4
+# CHECK-NEXT: 2 4 0.50 madd xzr, x0, x9, x11
+# CHECK-NEXT: 2 4 0.50 madd x13, xzr, x4, x4
+# CHECK-NEXT: 2 4 0.50 madd x19, x30, xzr, x29
+# CHECK-NEXT: 2 4 0.50 mul x4, x5, x6
+# CHECK-NEXT: 2 3 0.50 msub w1, w3, w7, w4
+# CHECK-NEXT: 2 3 0.50 msub wzr, w0, w9, w11
+# CHECK-NEXT: 2 3 0.50 msub w13, wzr, w4, w4
+# CHECK-NEXT: 2 3 0.50 msub w19, w30, wzr, w29
+# CHECK-NEXT: 2 3 0.50 mneg w4, w5, w6
+# CHECK-NEXT: 2 4 0.50 msub x1, x3, x7, x4
+# CHECK-NEXT: 2 4 0.50 msub xzr, x0, x9, x11
+# CHECK-NEXT: 2 4 0.50 msub x13, xzr, x4, x4
+# CHECK-NEXT: 2 4 0.50 msub x19, x30, xzr, x29
+# CHECK-NEXT: 2 4 0.50 mneg x4, x5, x6
+# CHECK-NEXT: 2 3 0.50 smaddl x3, w5, w2, x9
+# CHECK-NEXT: 2 3 0.50 smaddl xzr, w10, w11, x12
+# CHECK-NEXT: 2 3 0.50 smaddl x13, wzr, w14, x15
+# CHECK-NEXT: 2 3 0.50 smaddl x16, w17, wzr, x18
+# CHECK-NEXT: 1 2 0.50 smull x19, w20, w21
+# CHECK-NEXT: 2 3 0.50 smsubl x3, w5, w2, x9
+# CHECK-NEXT: 2 3 0.50 smsubl xzr, w10, w11, x12
+# CHECK-NEXT: 2 3 0.50 smsubl x13, wzr, w14, x15
+# CHECK-NEXT: 2 3 0.50 smsubl x16, w17, wzr, x18
+# CHECK-NEXT: 1 2 0.50 smnegl x19, w20, w21
+# CHECK-NEXT: 2 3 0.50 umaddl x3, w5, w2, x9
+# CHECK-NEXT: 2 3 0.50 umaddl xzr, w10, w11, x12
+# CHECK-NEXT: 2 3 0.50 umaddl x13, wzr, w14, x15
+# CHECK-NEXT: 2 3 0.50 umaddl x16, w17, wzr, x18
+# CHECK-NEXT: 1 2 0.50 umull x19, w20, w21
+# CHECK-NEXT: 2 3 0.50 umsubl x3, w5, w2, x9
+# CHECK-NEXT: 2 3 0.50 umsubl x16, w17, wzr, x18
+# CHECK-NEXT: 1 2 0.50 umnegl x19, w20, w21
+# CHECK-NEXT: 1 3 0.50 smulh x23, x22, xzr
+# CHECK-NEXT: 1 3 0.50 umulh x23, x22, xzr
+# CHECK-NEXT: 2 4 0.50 mul x19, x20, xzr
+# CHECK-NEXT: 2 3 0.50 mneg w21, w22, w23
+# CHECK-NEXT: 1 2 0.50 smull x11, w13, w17
+# CHECK-NEXT: 1 2 0.50 umull x11, w13, w17
+# CHECK-NEXT: 1 2 0.50 smnegl x11, w13, w17
+# CHECK-NEXT: 1 2 0.50 umnegl x11, w13, w17
+# CHECK-NEXT: 1 1 0.50 extr w3, w5, w7, #0
+# CHECK-NEXT: 1 1 0.50 extr w11, w13, w17, #31
+# CHECK-NEXT: 1 1 0.50 extr x3, x5, x7, #15
+# CHECK-NEXT: 1 1 0.50 extr x11, x13, x17, #63
+# CHECK-NEXT: 1 1 0.50 ror x19, x23, #24
+# CHECK-NEXT: 1 1 0.50 ror x29, xzr, #63
+# CHECK-NEXT: 1 1 0.50 ror w9, w13, #31
+# CHECK-NEXT: 2 2 0.50 fcmp h5, h21
+# CHECK-NEXT: 2 2 0.50 fcmp h5, #0.0
+# CHECK-NEXT: 2 2 0.50 fcmpe h22, h21
+# CHECK-NEXT: 2 2 0.50 fcmpe h13, #0.0
+# CHECK-NEXT: 2 2 0.50 fcmp s3, s5
+# CHECK-NEXT: 2 2 0.50 fcmp s31, #0.0
+# CHECK-NEXT: 2 2 0.50 fcmpe s29, s30
+# CHECK-NEXT: 2 2 0.50 fcmpe s15, #0.0
+# CHECK-NEXT: 2 2 0.50 fcmp d4, d12
+# CHECK-NEXT: 2 2 0.50 fcmp d23, #0.0
+# CHECK-NEXT: 2 2 0.50 fcmpe d26, d22
+# CHECK-NEXT: 2 2 0.50 fcmpe d29, #0.0
+# CHECK-NEXT: 2 4 0.50 fccmp s1, s31, #0, eq
+# CHECK-NEXT: 2 4 0.50 fccmp s3, s0, #15, hs
+# CHECK-NEXT: 2 4 0.50 fccmp s31, s15, #13, hs
+# CHECK-NEXT: 2 4 0.50 fccmp d9, d31, #0, le
+# CHECK-NEXT: 2 4 0.50 fccmp d3, d0, #15, gt
+# CHECK-NEXT: 2 4 0.50 fccmp d31, d5, #7, ne
+# CHECK-NEXT: 2 4 0.50 fccmp h31, h3, #11, hs
+# CHECK-NEXT: 2 4 0.50 fccmpe h6, h1, #12, ne
+# CHECK-NEXT: 2 4 0.50 fccmpe s1, s31, #0, eq
+# CHECK-NEXT: 2 4 0.50 fccmpe s3, s0, #15, hs
+# CHECK-NEXT: 2 4 0.50 fccmpe s31, s15, #13, hs
+# CHECK-NEXT: 2 4 0.50 fccmpe d9, d31, #0, le
+# CHECK-NEXT: 2 4 0.50 fccmpe d3, d0, #15, gt
+# CHECK-NEXT: 2 4 0.50 fccmpe d31, d5, #7, ne
+# CHECK-NEXT: 2 6 0.50 fcsel s3, s20, s9, pl
+# CHECK-NEXT: 2 6 0.50 fcsel d9, d10, d11, mi
+# CHECK-NEXT: 2 6 0.50 fcsel h26, h2, h11, hs
+# CHECK-NEXT: 1 2 0.25 fmov h18, h28
+# CHECK-NEXT: 1 2 0.25 fmov s0, s1
+# CHECK-NEXT: 1 1 0.25 fabs s2, s3
+# CHECK-NEXT: 1 1 0.25 fneg h2, h9
+# CHECK-NEXT: 1 1 0.25 fneg s4, s5
+# CHECK-NEXT: 1 6 0.25 fsqrt s6, s7
+# CHECK-NEXT: 1 3 0.25 fcvt d8, s9
+# CHECK-NEXT: 1 3 0.25 fcvt h10, s11
+# CHECK-NEXT: 1 3 0.25 frintn h12, h3
+# CHECK-NEXT: 1 3 0.25 frintn s12, s13
+# CHECK-NEXT: 1 3 0.25 frintp h17, h31
+# CHECK-NEXT: 1 3 0.25 frintp s14, s15
+# CHECK-NEXT: 1 3 0.25 frintm h0, h21
+# CHECK-NEXT: 1 3 0.25 frintm s16, s17
+# CHECK-NEXT: 1 3 0.25 frintz h10, h29
+# CHECK-NEXT: 1 3 0.25 frintz s18, s19
+# CHECK-NEXT: 1 3 0.25 frinta h22, h10
+# CHECK-NEXT: 1 3 0.25 frinta s20, s21
+# CHECK-NEXT: 1 3 0.25 frintx h4, h5
+# CHECK-NEXT: 1 3 0.25 frintx s22, s23
+# CHECK-NEXT: 1 3 0.25 frinti s24, s25
+# CHECK-NEXT: 1 3 0.25 frinti h31, h14
+# CHECK-NEXT: 1 2 0.25 fmov d0, d1
+# CHECK-NEXT: 1 1 0.25 fabs d2, d3
+# CHECK-NEXT: 1 1 0.25 fneg d4, d5
+# CHECK-NEXT: 1 4 0.25 fsqrt h13, h24
+# CHECK-NEXT: 1 8 0.25 fsqrt d6, d7
+# CHECK-NEXT: 1 3 0.25 fcvt s8, d9
+# CHECK-NEXT: 1 3 0.25 fcvt h10, d11
+# CHECK-NEXT: 1 3 0.25 frintn d12, d13
+# CHECK-NEXT: 1 3 0.25 frintp d14, d15
+# CHECK-NEXT: 1 3 0.25 frintm d16, d17
+# CHECK-NEXT: 1 3 0.25 frintz d18, d19
+# CHECK-NEXT: 1 3 0.25 frinta d20, d21
+# CHECK-NEXT: 1 3 0.25 frintx d22, d23
+# CHECK-NEXT: 1 3 0.25 frinti d24, d25
+# CHECK-NEXT: 1 3 0.25 fcvt s26, h27
+# CHECK-NEXT: 1 3 0.25 fcvt d28, h29
+# CHECK-NEXT: 1 3 0.25 fmul s20, s19, s17
+# CHECK-NEXT: 1 4 0.25 fdiv h1, h26, h23
+# CHECK-NEXT: 1 6 0.25 fdiv s1, s2, s3
+# CHECK-NEXT: 1 2 0.25 fadd h23, h27, h22
+# CHECK-NEXT: 1 2 0.25 fadd s4, s5, s6
+# CHECK-NEXT: 1 2 0.25 fsub h20, h11, h18
+# CHECK-NEXT: 1 2 0.25 fsub s7, s8, s9
+# CHECK-NEXT: 1 2 0.25 fmax s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 fmax h8, h7, h11
+# CHECK-NEXT: 1 2 0.25 fmin s13, s14, s15
+# CHECK-NEXT: 1 2 0.25 fmaxnm h29, h13, h14
+# CHECK-NEXT: 1 2 0.25 fmaxnm s16, s17, s18
+# CHECK-NEXT: 1 2 0.25 fminnm s19, s20, s21
+# CHECK-NEXT: 1 3 0.25 fnmul h3, h15, h7
+# CHECK-NEXT: 1 3 0.25 fnmul s22, s23, s2
+# CHECK-NEXT: 1 3 0.25 fmul d20, d19, d17
+# CHECK-NEXT: 1 8 0.25 fdiv d1, d2, d3
+# CHECK-NEXT: 1 2 0.25 fadd d4, d5, d6
+# CHECK-NEXT: 1 2 0.25 fsub d7, d8, d9
+# CHECK-NEXT: 1 2 0.25 fmax d10, d11, d12
+# CHECK-NEXT: 1 2 0.25 fmin d13, d14, d15
+# CHECK-NEXT: 1 2 0.25 fmin h4, h13, h17
+# CHECK-NEXT: 1 2 0.25 fmaxnm d16, d17, d18
+# CHECK-NEXT: 1 2 0.25 fminnm d19, d20, d21
+# CHECK-NEXT: 1 2 0.25 fminnm h29, h23, h17
+# CHECK-NEXT: 1 3 0.25 fnmul d22, d23, d24
+# CHECK-NEXT: 1 4 0.25 fmadd h27, h0, h6, h28
+# CHECK-NEXT: 1 4 0.25 fmadd s3, s5, s6, s31
+# CHECK-NEXT: 1 4 0.25 fmadd d3, d13, d0, d23
+# CHECK-NEXT: 1 4 0.25 fmsub h25, h28, h12, h24
+# CHECK-NEXT: 1 4 0.25 fmsub s3, s5, s6, s31
+# CHECK-NEXT: 1 4 0.25 fmsub d3, d13, d0, d23
+# CHECK-NEXT: 1 4 0.25 fnmadd h3, h18, h31, h24
+# CHECK-NEXT: 1 4 0.25 fnmadd s3, s5, s6, s31
+# CHECK-NEXT: 1 4 0.25 fnmadd d3, d13, d0, d23
+# CHECK-NEXT: 1 4 0.25 fnmsub s3, s5, s6, s31
+# CHECK-NEXT: 1 4 0.25 fnmsub d3, d13, d0, d23
+# CHECK-NEXT: 1 4 0.25 fnmsub h3, h29, h24, h17
+# CHECK-NEXT: 1 5 0.25 fcvtzs w3, h5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs wzr, h20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzs w19, h0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzs x3, h5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, h30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzs x19, h0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtzs w3, s5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs wzr, s20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzs w19, s0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzs x3, s5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, s30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzs x19, s0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtzs w3, d5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs wzr, d20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzs w19, d0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzs x3, d5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, d30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzs x19, d0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtzu w3, h5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu wzr, h20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w19, h0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzu x3, h5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu x12, h30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzu x19, h0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtzu w3, s5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu wzr, s20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w19, s0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzu x3, s5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu x12, s30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzu x19, s0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtzu w3, d5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu wzr, d20, #13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w19, d0, #32
+# CHECK-NEXT: 1 5 0.25 fcvtzu x3, d5, #1
+# CHECK-NEXT: 1 5 0.25 fcvtzu x12, d30, #45
+# CHECK-NEXT: 1 5 0.25 fcvtzu x19, d0, #64
+# CHECK-NEXT: 2 7 0.50 scvtf h23, w19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf h31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf h14, w0, #32
+# CHECK-NEXT: 2 7 0.50 scvtf h23, x19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf h31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf h14, x0, #64
+# CHECK-NEXT: 2 7 0.50 scvtf s23, w19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf s31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf s14, w0, #32
+# CHECK-NEXT: 2 7 0.50 scvtf s23, x19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf s31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf s14, x0, #64
+# CHECK-NEXT: 2 7 0.50 scvtf d23, w19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf d31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf d14, w0, #32
+# CHECK-NEXT: 2 7 0.50 scvtf d23, x19, #1
+# CHECK-NEXT: 2 7 0.50 scvtf d31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 scvtf d14, x0, #64
+# CHECK-NEXT: 2 7 0.50 ucvtf h23, w19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf h31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf h14, w0, #32
+# CHECK-NEXT: 2 7 0.50 ucvtf h23, x19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf h31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf h14, x0, #64
+# CHECK-NEXT: 2 7 0.50 ucvtf s23, w19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf s31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf s14, w0, #32
+# CHECK-NEXT: 2 7 0.50 ucvtf s23, x19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf s31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf s14, x0, #64
+# CHECK-NEXT: 2 7 0.50 ucvtf d23, w19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf d31, wzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf d14, w0, #32
+# CHECK-NEXT: 2 7 0.50 ucvtf d23, x19, #1
+# CHECK-NEXT: 2 7 0.50 ucvtf d31, xzr, #20
+# CHECK-NEXT: 2 7 0.50 ucvtf d14, x0, #64
+# CHECK-NEXT: 1 5 0.25 fcvtns w3, h31
+# CHECK-NEXT: 1 5 0.25 fcvtns xzr, h12
+# CHECK-NEXT: 1 5 0.25 fcvtnu wzr, h12
+# CHECK-NEXT: 1 5 0.25 fcvtnu x0, h0
+# CHECK-NEXT: 1 5 0.25 fcvtps wzr, h9
+# CHECK-NEXT: 1 5 0.25 fcvtps x12, h20
+# CHECK-NEXT: 1 5 0.25 fcvtpu w30, h23
+# CHECK-NEXT: 1 5 0.25 fcvtpu x29, h3
+# CHECK-NEXT: 1 5 0.25 fcvtms w2, h3
+# CHECK-NEXT: 1 5 0.25 fcvtms x4, h5
+# CHECK-NEXT: 1 5 0.25 fcvtmu w6, h7
+# CHECK-NEXT: 1 5 0.25 fcvtmu x8, h9
+# CHECK-NEXT: 1 5 0.25 fcvtzs w10, h11
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, h13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w14, h15
+# CHECK-NEXT: 1 5 0.25 fcvtzu x15, h16
+# CHECK-NEXT: 2 7 0.50 scvtf h17, w18
+# CHECK-NEXT: 2 7 0.50 scvtf h19, x20
+# CHECK-NEXT: 2 7 0.50 ucvtf h21, w22
+# CHECK-NEXT: 2 7 0.50 scvtf h23, x24
+# CHECK-NEXT: 1 5 0.25 fcvtas w25, h26
+# CHECK-NEXT: 1 5 0.25 fcvtas x27, h28
+# CHECK-NEXT: 1 5 0.25 fcvtau w29, h30
+# CHECK-NEXT: 1 5 0.25 fcvtau xzr, h0
+# CHECK-NEXT: 1 5 0.25 fcvtns w3, s31
+# CHECK-NEXT: 1 5 0.25 fcvtns xzr, s12
+# CHECK-NEXT: 1 5 0.25 fcvtnu wzr, s12
+# CHECK-NEXT: 1 5 0.25 fcvtnu x0, s0
+# CHECK-NEXT: 1 5 0.25 fcvtps wzr, s9
+# CHECK-NEXT: 1 5 0.25 fcvtps x12, s20
+# CHECK-NEXT: 1 5 0.25 fcvtpu w30, s23
+# CHECK-NEXT: 1 5 0.25 fcvtpu x29, s3
+# CHECK-NEXT: 1 5 0.25 fcvtms w2, s3
+# CHECK-NEXT: 1 5 0.25 fcvtms x4, s5
+# CHECK-NEXT: 1 5 0.25 fcvtmu w6, s7
+# CHECK-NEXT: 1 5 0.25 fcvtmu x8, s9
+# CHECK-NEXT: 1 5 0.25 fcvtzs w10, s11
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, s13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w14, s15
+# CHECK-NEXT: 1 5 0.25 fcvtzu x15, s16
+# CHECK-NEXT: 2 7 0.50 scvtf s17, w18
+# CHECK-NEXT: 2 7 0.50 scvtf s19, x20
+# CHECK-NEXT: 2 7 0.50 ucvtf s21, w22
+# CHECK-NEXT: 2 7 0.50 scvtf s23, x24
+# CHECK-NEXT: 1 5 0.25 fcvtas w25, s26
+# CHECK-NEXT: 1 5 0.25 fcvtas x27, s28
+# CHECK-NEXT: 1 5 0.25 fcvtau w29, s30
+# CHECK-NEXT: 1 5 0.25 fcvtau xzr, s0
+# CHECK-NEXT: 1 5 0.25 fcvtns w3, d31
+# CHECK-NEXT: 1 5 0.25 fcvtns xzr, d12
+# CHECK-NEXT: 1 5 0.25 fcvtnu wzr, d12
+# CHECK-NEXT: 1 5 0.25 fcvtnu x0, d0
+# CHECK-NEXT: 1 5 0.25 fcvtps wzr, d9
+# CHECK-NEXT: 1 5 0.25 fcvtps x12, d20
+# CHECK-NEXT: 1 5 0.25 fcvtpu w30, d23
+# CHECK-NEXT: 1 5 0.25 fcvtpu x29, d3
+# CHECK-NEXT: 1 5 0.25 fcvtms w2, d3
+# CHECK-NEXT: 1 5 0.25 fcvtms x4, d5
+# CHECK-NEXT: 1 5 0.25 fcvtmu w6, d7
+# CHECK-NEXT: 1 5 0.25 fcvtmu x8, d9
+# CHECK-NEXT: 1 5 0.25 fcvtzs w10, d11
+# CHECK-NEXT: 1 5 0.25 fcvtzs x12, d13
+# CHECK-NEXT: 1 5 0.25 fcvtzu w14, d15
+# CHECK-NEXT: 1 5 0.25 fcvtzu x15, d16
+# CHECK-NEXT: 2 7 0.50 scvtf d17, w18
+# CHECK-NEXT: 2 7 0.50 scvtf d19, x20
+# CHECK-NEXT: 2 7 0.50 ucvtf d21, w22
+# CHECK-NEXT: 2 7 0.50 ucvtf d23, x24
+# CHECK-NEXT: 1 5 0.25 fcvtas w25, d26
+# CHECK-NEXT: 1 5 0.25 fcvtas x27, d28
+# CHECK-NEXT: 1 5 0.25 fcvtau w29, d30
+# CHECK-NEXT: 1 5 0.25 fcvtau xzr, d0
+# CHECK-NEXT: 1 4 0.50 fmov h6, w5
+# CHECK-NEXT: 1 4 0.50 fmov h16, x27
+# CHECK-NEXT: 1 2 0.25 fmov w15, h31
+# CHECK-NEXT: 1 2 0.25 fmov w3, s9
+# CHECK-NEXT: 1 4 0.50 fmov s9, w3
+# CHECK-NEXT: 1 2 0.25 fmov x21, h14
+# CHECK-NEXT: 1 2 0.25 fmov x20, d31
+# CHECK-NEXT: 1 4 0.50 fmov d1, x15
+# CHECK-NEXT: 1 2 0.25 fmov x3, v12.d[1]
+# CHECK-NEXT: 2 6 0.50 fmov v1.d[1], x19
+# CHECK-NEXT: 1 2 0.25 fmov h29, #0.50000000
+# CHECK-NEXT: 1 2 0.25 fmov s2, #0.12500000
+# CHECK-NEXT: 1 2 0.25 fmov s3, #1.00000000
+# CHECK-NEXT: 1 2 0.25 fmov d30, #16.00000000
+# CHECK-NEXT: 1 2 0.25 fmov s4, #1.06250000
+# CHECK-NEXT: 1 2 0.25 fmov d10, #1.93750000
+# CHECK-NEXT: 1 2 0.25 fmov s12, #-1.00000000
+# CHECK-NEXT: 1 2 0.25 fmov d16, #8.50000000
+# CHECK-NEXT: 1 4 0.33 * ldr w3, #0
+# CHECK-NEXT: 1 4 0.33 * ldr x29, #4
+# CHECK-NEXT: 1 4 0.33 * ldrsw xzr, #-4
+# CHECK-NEXT: 1 6 0.33 * ldr s0, #8
+# CHECK-NEXT: 1 6 0.33 * ldr d0, #1048572
+# CHECK-NEXT: 1 6 0.33 * ldr q0, #-1048576
+# CHECK-NEXT: 1 4 0.33 U prfm pldl1strm, #0
+# CHECK-NEXT: 1 4 0.33 U prfm #25, #0
+# CHECK-NEXT: 3 5 0.50 * * U stxrb w18, w8, [sp]
+# CHECK-NEXT: 3 5 0.50 * * U stxrh w24, w15, [x16]
+# CHECK-NEXT: 3 5 0.50 * * U stxr w5, w6, [x17]
+# CHECK-NEXT: 3 5 0.50 * * U stxr w1, x10, [x21]
+# CHECK-NEXT: 1 4 0.33 * * U ldxrb w30, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U ldxrh w17, [x4]
+# CHECK-NEXT: 1 4 0.33 * * U ldxr w22, [sp]
+# CHECK-NEXT: 1 4 0.33 * * U ldxr x11, [x29]
+# CHECK-NEXT: 3 5 0.50 * * U stxp w12, w11, w10, [sp]
+# CHECK-NEXT: 3 5 0.50 * * U stxp wzr, x27, x9, [x12]
+# CHECK-NEXT: 2 4 0.33 * * U ldxp w0, wzr, [sp]
+# CHECK-NEXT: 2 4 0.33 * * U ldxp x17, x0, [x18]
+# CHECK-NEXT: 3 5 0.50 * * U stlxrb w12, w22, [x0]
+# CHECK-NEXT: 3 5 0.50 * * U stlxrh w10, w1, [x1]
+# CHECK-NEXT: 3 5 0.50 * * U stlxr w9, w2, [x2]
+# CHECK-NEXT: 3 5 0.50 * * U stlxr w9, x3, [sp]
+# CHECK-NEXT: 1 4 0.33 * * U ldaxrb w8, [x4]
+# CHECK-NEXT: 1 4 0.33 * * U ldaxrh w7, [x5]
+# CHECK-NEXT: 1 4 0.33 * * U ldaxr w6, [sp]
+# CHECK-NEXT: 1 4 0.33 * * U ldaxr x5, [x6]
+# CHECK-NEXT: 3 5 0.50 * * U stlxp w4, w5, w6, [sp]
+# CHECK-NEXT: 3 5 0.50 * * U stlxp wzr, x6, x7, [x1]
+# CHECK-NEXT: 2 4 0.33 * * U ldaxp w5, w18, [sp]
+# CHECK-NEXT: 2 4 0.33 * * U ldaxp x6, x19, [x22]
+# CHECK-NEXT: 2 1 0.50 * U stlrb w24, [sp]
+# CHECK-NEXT: 2 1 0.50 * U stlrh w25, [x30]
+# CHECK-NEXT: 2 1 0.50 * U stlr w26, [x29]
+# CHECK-NEXT: 2 1 0.50 * U stlr x27, [x28]
+# CHECK-NEXT: 1 4 0.33 * U ldarb w16, [x21]
+# CHECK-NEXT: 1 4 0.33 * U ldarb w23, [sp]
+# CHECK-NEXT: 1 4 0.33 * U ldarh w22, [x30]
+# CHECK-NEXT: 1 4 0.33 * U ldar wzr, [x29]
+# CHECK-NEXT: 1 4 0.33 * U ldar x21, [x28]
+# CHECK-NEXT: 2 1 0.50 * sturb w9, [sp]
+# CHECK-NEXT: 2 1 0.50 * sturh wzr, [x12, #255]
+# CHECK-NEXT: 2 1 0.50 * stur w16, [x0, #-256]
+# CHECK-NEXT: 2 1 0.50 * stur x28, [x14, #1]
+# CHECK-NEXT: 1 4 0.33 * ldurb w1, [x20, #255]
+# CHECK-NEXT: 1 4 0.33 * ldurh w20, [x1, #255]
+# CHECK-NEXT: 1 4 0.33 * ldur w12, [sp, #255]
+# CHECK-NEXT: 1 4 0.33 * ldur xzr, [x12, #255]
+# CHECK-NEXT: 1 4 0.33 * ldursb x9, [x7, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldursh x17, [x19, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldursw x20, [x15, #-256]
+# CHECK-NEXT: 1 4 0.33 U prfum pldl2keep, [sp, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldursb w19, [x1, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldursh w15, [x21, #-256]
+# CHECK-NEXT: 2 1 0.50 * stur b0, [sp, #1]
+# CHECK-NEXT: 2 1 0.50 * stur h12, [x12, #-1]
+# CHECK-NEXT: 2 1 0.50 * stur s15, [x0, #255]
+# CHECK-NEXT: 2 1 0.50 * stur d31, [x5, #25]
+# CHECK-NEXT: 2 1 0.50 * stur q9, [x5]
+# CHECK-NEXT: 1 6 0.33 * ldur b3, [sp]
+# CHECK-NEXT: 1 6 0.33 * ldur h5, [x4, #-256]
+# CHECK-NEXT: 1 6 0.33 * ldur s7, [x12, #-1]
+# CHECK-NEXT: 1 6 0.33 * ldur d11, [x19, #4]
+# CHECK-NEXT: 1 6 0.33 * ldur q13, [x1, #2]
+# CHECK-NEXT: 3 1 0.50 * strb w9, [x2], #255
+# CHECK-NEXT: 3 1 0.50 * strb w10, [x3], #1
+# CHECK-NEXT: 3 1 0.50 * strb w10, [x3], #-256
+# CHECK-NEXT: 3 1 0.50 * strh w9, [x2], #255
+# CHECK-NEXT: 3 1 0.50 * strh w9, [x2], #1
+# CHECK-NEXT: 3 1 0.50 * strh w10, [x3], #-256
+# CHECK-NEXT: 3 1 0.50 * str w19, [sp], #255
+# CHECK-NEXT: 3 1 0.50 * str w20, [x30], #1
+# CHECK-NEXT: 3 1 0.50 * str w21, [x12], #-256
+# CHECK-NEXT: 3 1 0.50 * str xzr, [x9], #255
+# CHECK-NEXT: 3 1 0.50 * str x2, [x3], #1
+# CHECK-NEXT: 3 1 0.50 * str x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrb w9, [x2], #255
+# CHECK-NEXT: 2 4 0.33 * ldrb w10, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrb w10, [x3], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrh w9, [x2], #255
+# CHECK-NEXT: 2 4 0.33 * ldrh w9, [x2], #1
+# CHECK-NEXT: 2 4 0.33 * ldrh w10, [x3], #-256
+# CHECK-NEXT: 2 4 0.33 * ldr w19, [sp], #255
+# CHECK-NEXT: 2 4 0.33 * ldr w20, [x30], #1
+# CHECK-NEXT: 2 4 0.33 * ldr w21, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldr xzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldr x2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldr x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrsb xzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldrsb x2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrsb x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrsh xzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldrsh x2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrsh x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrsw xzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldrsw x2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrsw x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrsb wzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldrsb w2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrsb w19, [x12], #-256
+# CHECK-NEXT: 2 4 0.33 * ldrsh wzr, [x9], #255
+# CHECK-NEXT: 2 4 0.33 * ldrsh w2, [x3], #1
+# CHECK-NEXT: 2 4 0.33 * ldrsh w19, [x12], #-256
+# CHECK-NEXT: 4 1 0.50 * str b0, [x0], #255
+# CHECK-NEXT: 4 1 0.50 * str b3, [x3], #1
+# CHECK-NEXT: 4 1 0.50 * str b5, [sp], #-256
+# CHECK-NEXT: 4 1 0.50 * str h10, [x10], #255
+# CHECK-NEXT: 4 1 0.50 * str h13, [x23], #1
+# CHECK-NEXT: 4 1 0.50 * str h15, [sp], #-256
+# CHECK-NEXT: 4 1 0.50 * str s20, [x20], #255
+# CHECK-NEXT: 4 1 0.50 * str s23, [x23], #1
+# CHECK-NEXT: 4 1 0.50 * str s25, [x0], #-256
+# CHECK-NEXT: 4 1 0.50 * str d20, [x20], #255
+# CHECK-NEXT: 4 1 0.50 * str d23, [x23], #1
+# CHECK-NEXT: 4 1 0.50 * str d25, [x0], #-256
+# CHECK-NEXT: 3 6 0.33 * ldr b0, [x0], #255
+# CHECK-NEXT: 3 6 0.33 * ldr b3, [x3], #1
+# CHECK-NEXT: 3 6 0.33 * ldr b5, [sp], #-256
+# CHECK-NEXT: 3 6 0.33 * ldr h10, [x10], #255
+# CHECK-NEXT: 3 6 0.33 * ldr h13, [x23], #1
+# CHECK-NEXT: 3 6 0.33 * ldr h15, [sp], #-256
+# CHECK-NEXT: 3 6 0.33 * ldr s20, [x20], #255
+# CHECK-NEXT: 3 6 0.33 * ldr s23, [x23], #1
+# CHECK-NEXT: 3 6 0.33 * ldr s25, [x0], #-256
+# CHECK-NEXT: 3 6 0.33 * ldr d20, [x20], #255
+# CHECK-NEXT: 3 6 0.33 * ldr d23, [x23], #1
+# CHECK-NEXT: 3 6 0.33 * ldr d25, [x0], #-256
+# CHECK-NEXT: 3 6 0.33 * ldr q20, [x1], #255
+# CHECK-NEXT: 3 6 0.33 * ldr q23, [x9], #1
+# CHECK-NEXT: 3 6 0.33 * ldr q25, [x20], #-256
+# CHECK-NEXT: 4 1 0.50 * str q10, [x1], #255
+# CHECK-NEXT: 4 1 0.50 * str q22, [sp], #1
+# CHECK-NEXT: 4 1 0.50 * str q21, [x20], #-256
+# CHECK-NEXT: 2 4 0.33 * ldr x3, [x4, #0]!
+# CHECK-NEXT: 3 1 0.50 * strb w9, [x2, #255]!
+# CHECK-NEXT: 3 1 0.50 * strb w10, [x3, #1]!
+# CHECK-NEXT: 3 1 0.50 * strb w10, [x3, #-256]!
+# CHECK-NEXT: 3 1 0.50 * strh w9, [x2, #255]!
+# CHECK-NEXT: 3 1 0.50 * strh w9, [x2, #1]!
+# CHECK-NEXT: 3 1 0.50 * strh w10, [x3, #-256]!
+# CHECK-NEXT: 3 1 0.50 * str w19, [sp, #255]!
+# CHECK-NEXT: 3 1 0.50 * str w20, [x30, #1]!
+# CHECK-NEXT: 3 1 0.50 * str w21, [x12, #-256]!
+# CHECK-NEXT: 3 1 0.50 * str xzr, [x9, #255]!
+# CHECK-NEXT: 3 1 0.50 * str x2, [x3, #1]!
+# CHECK-NEXT: 3 1 0.50 * str x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrb w9, [x2, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrb w10, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrb w10, [x3, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrh w9, [x2, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrh w9, [x2, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrh w10, [x3, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldr w19, [sp, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldr w20, [x30, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldr w21, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldr xzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldr x2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldr x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb xzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb x2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh xzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh x2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrsw xzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrsw x2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrsw x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb wzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb w2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrsb w19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh wzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh w2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.33 * ldrsh w19, [x12, #-256]!
+# CHECK-NEXT: 4 1 0.50 * str b0, [x0, #255]!
+# CHECK-NEXT: 4 1 0.50 * str b3, [x3, #1]!
+# CHECK-NEXT: 4 1 0.50 * str b5, [sp, #-256]!
+# CHECK-NEXT: 4 1 0.50 * str h10, [x10, #255]!
+# CHECK-NEXT: 4 1 0.50 * str h13, [x23, #1]!
+# CHECK-NEXT: 4 1 0.50 * str h15, [sp, #-256]!
+# CHECK-NEXT: 4 1 0.50 * str s20, [x20, #255]!
+# CHECK-NEXT: 4 1 0.50 * str s23, [x23, #1]!
+# CHECK-NEXT: 4 1 0.50 * str s25, [x0, #-256]!
+# CHECK-NEXT: 4 1 0.50 * str d20, [x20, #255]!
+# CHECK-NEXT: 4 1 0.50 * str d23, [x23, #1]!
+# CHECK-NEXT: 4 1 0.50 * str d25, [x0, #-256]!
+# CHECK-NEXT: 3 6 0.33 * ldr b0, [x0, #255]!
+# CHECK-NEXT: 3 6 0.33 * ldr b3, [x3, #1]!
+# CHECK-NEXT: 3 6 0.33 * ldr b5, [sp, #-256]!
+# CHECK-NEXT: 3 6 0.33 * ldr h10, [x10, #255]!
+# CHECK-NEXT: 3 6 0.33 * ldr h13, [x23, #1]!
+# CHECK-NEXT: 3 6 0.33 * ldr h15, [sp, #-256]!
+# CHECK-NEXT: 3 6 0.33 * ldr s20, [x20, #255]!
+# CHECK-NEXT: 3 6 0.33 * ldr s23, [x23, #1]!
+# CHECK-NEXT: 3 6 0.33 * ldr s25, [x0, #-256]!
+# CHECK-NEXT: 3 6 0.33 * ldr d20, [x20, #255]!
+# CHECK-NEXT: 3 6 0.33 * ldr d23, [x23, #1]!
+# CHECK-NEXT: 3 6 0.33 * ldr d25, [x0, #-256]!
+# CHECK-NEXT: 3 6 0.33 * ldr q20, [x1, #255]!
+# CHECK-NEXT: 3 6 0.33 * ldr q23, [x9, #1]!
+# CHECK-NEXT: 3 6 0.33 * ldr q25, [x20, #-256]!
+# CHECK-NEXT: 4 1 0.50 * str q10, [x1, #255]!
+# CHECK-NEXT: 4 1 0.50 * str q22, [sp, #1]!
+# CHECK-NEXT: 4 1 0.50 * str q21, [x20, #-256]!
+# CHECK-NEXT: 2 1 0.50 * sttrb w9, [sp]
+# CHECK-NEXT: 2 1 0.50 * sttrh wzr, [x12, #255]
+# CHECK-NEXT: 2 1 0.50 * sttr w16, [x0, #-256]
+# CHECK-NEXT: 2 1 0.50 * sttr x28, [x14, #1]
+# CHECK-NEXT: 1 4 0.33 * ldtrb w1, [x20, #255]
+# CHECK-NEXT: 1 4 0.33 * ldtrh w20, [x1, #255]
+# CHECK-NEXT: 1 4 0.33 * ldtr w12, [sp, #255]
+# CHECK-NEXT: 1 4 0.33 * ldtr xzr, [x12, #255]
+# CHECK-NEXT: 1 4 0.33 * ldtrsb x9, [x7, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldtrsh x17, [x19, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldtrsw x20, [x15, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldtrsb w19, [x1, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldtrsh w15, [x21, #-256]
+# CHECK-NEXT: 1 4 0.33 * ldr x4, [x29]
+# CHECK-NEXT: 1 4 0.33 * ldr x30, [x12, #32760]
+# CHECK-NEXT: 1 4 0.33 * ldr x20, [sp, #8]
+# CHECK-NEXT: 1 4 0.33 * ldr xzr, [sp]
+# CHECK-NEXT: 1 4 0.33 * ldr w2, [sp]
+# CHECK-NEXT: 1 4 0.33 * ldr w17, [sp, #16380]
+# CHECK-NEXT: 1 4 0.33 * ldr w13, [x2, #4]
+# CHECK-NEXT: 1 4 0.33 * ldrsw x2, [x5, #4]
+# CHECK-NEXT: 1 4 0.33 * ldrsw x23, [sp, #16380]
+# CHECK-NEXT: 1 4 0.33 * ldrsw x21, [x25, x7]
+# CHECK-NEXT: 1 4 0.33 * ldrh w2, [x4]
+# CHECK-NEXT: 1 4 0.33 * ldrsh w23, [x6, #8190]
+# CHECK-NEXT: 1 4 0.33 * ldrsh wzr, [sp, #2]
+# CHECK-NEXT: 1 4 0.33 * ldrsh x29, [x2, #2]
+# CHECK-NEXT: 1 4 0.33 * ldrsh x25, [x8, w13, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrb w26, [x3, #121]
+# CHECK-NEXT: 1 4 0.33 * ldrb w12, [x2]
+# CHECK-NEXT: 1 4 0.33 * ldrsb w27, [sp, #4095]
+# CHECK-NEXT: 1 4 0.33 * ldrsb xzr, [x15]
+# CHECK-NEXT: 1 4 0.33 * ldrsb x12, [x28, x27]
+# CHECK-NEXT: 2 1 0.50 * str x30, [sp]
+# CHECK-NEXT: 2 1 0.50 * str w20, [x4, #16380]
+# CHECK-NEXT: 2 1 0.50 * str b5, [x11]
+# CHECK-NEXT: 2 1 0.50 * str h23, [x15]
+# CHECK-NEXT: 2 1 0.50 * str s25, [x19]
+# CHECK-NEXT: 2 1 0.50 * str d15, [x2]
+# CHECK-NEXT: 2 1 0.50 * strh w17, [sp, #8190]
+# CHECK-NEXT: 2 1 0.50 * strb w23, [x3, #4095]
+# CHECK-NEXT: 2 1 0.50 * strb wzr, [x2]
+# CHECK-NEXT: 1 6 0.33 * ldr b31, [sp, #4095]
+# CHECK-NEXT: 1 6 0.33 * ldr h20, [x2, #8190]
+# CHECK-NEXT: 1 6 0.33 * ldr s10, [x19, #16380]
+# CHECK-NEXT: 1 6 0.33 * ldr d3, [x10, #32760]
+# CHECK-NEXT: 2 1 0.50 * str q12, [sp, #65520]
+# CHECK-NEXT: 1 6 0.33 * ldr q14, [x6, #4624]
+# CHECK-NEXT: 1 4 0.33 * ldrb w3, [sp, x5]
+# CHECK-NEXT: 1 4 0.33 * ldrb w9, [x27, x6]
+# CHECK-NEXT: 1 4 0.33 * ldrsb w10, [x30, x7]
+# CHECK-NEXT: 1 4 0.33 * ldrb w11, [x29, x3, sxtx]
+# CHECK-NEXT: 2 1 0.50 * strb w12, [x28, xzr, sxtx]
+# CHECK-NEXT: 2 1 0.50 * strb w5, [x26, w7, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrb w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrsb w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrb w17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrsb x18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrsh w3, [sp, x5]
+# CHECK-NEXT: 1 4 0.33 * ldrsh w9, [x27, x6]
+# CHECK-NEXT: 1 4 0.33 * ldrh w10, [x30, x7, lsl #1]
+# CHECK-NEXT: 2 1 0.50 * strh w11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 4 0.33 * ldrh w12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 4 0.33 * ldrsh x13, [x27, x5, sxtx #1]
+# CHECK-NEXT: 1 4 0.33 * ldrh w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrh w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrsh w16, [x24, w8, uxtw #1]
+# CHECK-NEXT: 1 4 0.33 * ldrh w17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrh w18, [x22, w10, sxtw]
+# CHECK-NEXT: 2 1 0.50 * strh w19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: 1 6 0.33 * ldr b25, [x21, w8, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr b8, [x30, x10]
+# CHECK-NEXT: 2 1 0.50 * str b14, [x13, x25]
+# CHECK-NEXT: 2 1 0.50 * str b30, [x16, w26, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr h3, [sp, x5]
+# CHECK-NEXT: 1 6 0.33 * ldr h9, [x27, x6]
+# CHECK-NEXT: 1 6 0.33 * ldr h10, [x30, x7, lsl #1]
+# CHECK-NEXT: 2 1 0.50 * str h11, [x29, x3, sxtx]
+# CHECK-NEXT: 2 1 0.50 * str h12, [x28, xzr, sxtx]
+# CHECK-NEXT: 2 1 0.50 * str h13, [x27, x5, sxtx #1]
+# CHECK-NEXT: 1 6 0.33 * ldr h14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr h15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr h16, [x24, w8, uxtw #1]
+# CHECK-NEXT: 1 6 0.33 * ldr h17, [x23, w9, sxtw]
+# CHECK-NEXT: 2 1 0.50 * str h18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr h19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: 1 6 0.33 * ldr s12, [x30, w5, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr d24, [x26, w7, uxtw]
+# CHECK-NEXT: 2 1 0.50 * str s20, [x24, w10, uxtw]
+# CHECK-NEXT: 2 1 0.50 * str d5, [x26, x6]
+# CHECK-NEXT: 1 4 0.33 * ldr w3, [sp, x5]
+# CHECK-NEXT: 1 6 0.33 * ldr s9, [x27, x6]
+# CHECK-NEXT: 1 4 0.33 * ldr w10, [x30, x7, lsl #2]
+# CHECK-NEXT: 1 4 0.33 * ldr w11, [x29, x3, sxtx]
+# CHECK-NEXT: 2 1 0.50 * str s12, [x28, xzr, sxtx]
+# CHECK-NEXT: 2 1 0.50 * str w13, [x27, x5, sxtx #2]
+# CHECK-NEXT: 2 1 0.50 * str w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr w16, [x24, w8, uxtw #2]
+# CHECK-NEXT: 1 4 0.33 * ldrsw x17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr w18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldrsw x19, [x21, wzr, sxtw #2]
+# CHECK-NEXT: 1 4 0.33 * ldr x3, [sp, x5]
+# CHECK-NEXT: 2 1 0.50 * str x9, [x27, x6]
+# CHECK-NEXT: 1 6 0.33 * ldr d10, [x30, x7, lsl #3]
+# CHECK-NEXT: 2 1 0.50 * str x11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 4 0.33 * ldr x12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 4 0.33 * ldr x13, [x27, x5, sxtx #3]
+# CHECK-NEXT: 1 4 0.33 U prfm pldl1keep, [x26, w6, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr x15, [x25, w7, uxtw]
+# CHECK-NEXT: 2 1 0.50 * str x27, [x26, w24, uxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr x16, [x24, w8, uxtw #3]
+# CHECK-NEXT: 1 4 0.33 * ldr x17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 4 0.33 * ldr x18, [x22, w10, sxtw]
+# CHECK-NEXT: 2 1 0.50 * str d19, [x21, wzr, sxtw #3]
+# CHECK-NEXT: 1 6 0.33 * ldr q3, [sp, x5]
+# CHECK-NEXT: 1 6 0.33 * ldr q9, [x27, x6]
+# CHECK-NEXT: 1 8 0.33 * ldr q10, [x30, x7, lsl #4]
+# CHECK-NEXT: 2 1 0.50 * str q11, [x29, x3, sxtx]
+# CHECK-NEXT: 2 1 0.50 * str q12, [x28, xzr, sxtx]
+# CHECK-NEXT: 2 3 0.50 * str q13, [x27, x5, sxtx #4]
+# CHECK-NEXT: 1 6 0.33 * ldr q14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ldr q15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 8 0.33 * ldr q16, [x24, w8, uxtw #4]
+# CHECK-NEXT: 1 6 0.33 * ldr q17, [x23, w9, sxtw]
+# CHECK-NEXT: 2 1 0.50 * str q18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 8 0.33 * ldr q19, [x21, wzr, sxtw #4]
+# CHECK-NEXT: 2 4 0.33 * ldp w3, w5, [sp]
+# CHECK-NEXT: 2 1 0.50 * stp wzr, w9, [sp, #252]
+# CHECK-NEXT: 2 4 0.33 * ldp w2, wzr, [sp, #-256]
+# CHECK-NEXT: 2 4 0.33 * ldp w9, w10, [sp, #4]
+# CHECK-NEXT: 2 4 0.33 * ldpsw x9, x10, [sp, #4]
+# CHECK-NEXT: 2 4 0.33 * ldpsw x9, x10, [x2, #-256]
+# CHECK-NEXT: 2 4 0.33 * ldpsw x20, x30, [sp, #252]
+# CHECK-NEXT: 2 4 0.33 * ldp x21, x29, [x2, #504]
+# CHECK-NEXT: 2 4 0.33 * ldp x22, x23, [x3, #-512]
+# CHECK-NEXT: 2 4 0.33 * ldp x24, x25, [x4, #8]
+# CHECK-NEXT: 2 6 0.33 * ldp s29, s28, [sp, #252]
+# CHECK-NEXT: 2 1 0.50 * stp s27, s26, [sp, #-256]
+# CHECK-NEXT: 2 6 0.33 * ldp s1, s2, [x3, #44]
+# CHECK-NEXT: 2 1 0.50 * stp d3, d5, [x9, #504]
+# CHECK-NEXT: 2 1 0.50 * stp d7, d11, [x10, #-512]
+# CHECK-NEXT: 2 1 0.50 * stnp x20, x16, [x8]
+# CHECK-NEXT: 2 1 0.50 * stp x3, x6, [x16]
+# CHECK-NEXT: 2 6 0.33 * ldp d2, d3, [x30, #-8]
+# CHECK-NEXT: 4 1 1.00 * stp q3, q5, [sp]
+# CHECK-NEXT: 4 1 1.00 * stp q17, q19, [sp, #1008]
+# CHECK-NEXT: 3 6 0.67 * ldp q23, q29, [x1, #-1024]
+# CHECK-NEXT: 3 4 0.33 * ldp w3, w5, [sp], #0
+# CHECK-NEXT: 3 1 0.50 * stp wzr, w9, [sp], #252
+# CHECK-NEXT: 3 4 0.33 * ldp w2, wzr, [sp], #-256
+# CHECK-NEXT: 3 4 0.33 * ldp w9, w10, [sp], #4
+# CHECK-NEXT: 3 4 0.33 * ldpsw x9, x10, [sp], #4
+# CHECK-NEXT: 3 4 0.33 * ldpsw x9, x10, [x2], #-256
+# CHECK-NEXT: 3 4 0.33 * ldpsw x20, x30, [sp], #252
+# CHECK-NEXT: 3 4 0.33 * ldp x21, x29, [x2], #504
+# CHECK-NEXT: 3 4 0.33 * ldp x22, x23, [x3], #-512
+# CHECK-NEXT: 3 4 0.33 * ldp x24, x25, [x4], #8
+# CHECK-NEXT: 4 6 0.33 * ldp s29, s28, [sp], #252
+# CHECK-NEXT: 4 1 0.50 * stp s27, s26, [sp], #-256
+# CHECK-NEXT: 4 6 0.33 * ldp s1, s2, [x3], #44
+# CHECK-NEXT: 4 1 0.50 * stp d3, d5, [x9], #504
+# CHECK-NEXT: 4 1 0.50 * stp d7, d11, [x10], #-512
+# CHECK-NEXT: 4 6 0.33 * ldp d2, d3, [x30], #-8
+# CHECK-NEXT: 7 1 1.00 * stp q3, q5, [sp], #0
+# CHECK-NEXT: 7 1 1.00 * stp q17, q19, [sp], #1008
+# CHECK-NEXT: 6 6 0.67 * ldp q23, q29, [x1], #-1024
+# CHECK-NEXT: 3 4 0.33 * ldp w3, w5, [sp, #0]!
+# CHECK-NEXT: 3 1 0.50 * stp wzr, w9, [sp, #252]!
+# CHECK-NEXT: 3 4 0.33 * ldp w2, wzr, [sp, #-256]!
+# CHECK-NEXT: 3 4 0.33 * ldp w9, w10, [sp, #4]!
+# CHECK-NEXT: 3 4 0.33 * ldpsw x9, x10, [sp, #4]!
+# CHECK-NEXT: 3 4 0.33 * ldpsw x9, x10, [x2, #-256]!
+# CHECK-NEXT: 3 4 0.33 * ldpsw x20, x30, [sp, #252]!
+# CHECK-NEXT: 3 4 0.33 * ldp x21, x29, [x2, #504]!
+# CHECK-NEXT: 3 4 0.33 * ldp x22, x23, [x3, #-512]!
+# CHECK-NEXT: 3 4 0.33 * ldp x24, x25, [x4, #8]!
+# CHECK-NEXT: 4 6 0.33 * ldp s29, s28, [sp, #252]!
+# CHECK-NEXT: 4 1 0.50 * stp s27, s26, [sp, #-256]!
+# CHECK-NEXT: 4 6 0.33 * ldp s1, s2, [x3, #44]!
+# CHECK-NEXT: 4 1 0.50 * stp d3, d5, [x9, #504]!
+# CHECK-NEXT: 4 1 0.50 * stp d7, d11, [x10, #-512]!
+# CHECK-NEXT: 4 6 0.33 * ldp d2, d3, [x30, #-8]!
+# CHECK-NEXT: 7 1 1.00 * stp q3, q5, [sp, #0]!
+# CHECK-NEXT: 7 1 1.00 * stp q17, q19, [sp, #1008]!
+# CHECK-NEXT: 6 6 0.67 * ldp q23, q29, [x1, #-1024]!
+# CHECK-NEXT: 2 4 0.33 * ldnp w3, w5, [sp]
+# CHECK-NEXT: 2 1 0.50 * stnp wzr, w9, [sp, #252]
+# CHECK-NEXT: 2 4 0.33 * ldnp w2, wzr, [sp, #-256]
+# CHECK-NEXT: 2 4 0.33 * ldnp w9, w10, [sp, #4]
+# CHECK-NEXT: 2 4 0.33 * ldnp x21, x29, [x2, #504]
+# CHECK-NEXT: 2 4 0.33 * ldnp x22, x23, [x3, #-512]
+# CHECK-NEXT: 2 4 0.33 * ldnp x24, x25, [x4, #8]
+# CHECK-NEXT: 2 6 0.33 * ldnp s29, s28, [sp, #252]
+# CHECK-NEXT: 2 1 0.50 * stnp s27, s26, [sp, #-256]
+# CHECK-NEXT: 2 6 0.33 * ldnp s1, s2, [x3, #44]
+# CHECK-NEXT: 2 1 0.50 * stnp d3, d5, [x9, #504]
+# CHECK-NEXT: 2 1 0.50 * stnp d7, d11, [x10, #-512]
+# CHECK-NEXT: 2 6 0.33 * ldnp d2, d3, [x30, #-8]
+# CHECK-NEXT: 4 1 1.00 * stnp q3, q5, [sp]
+# CHECK-NEXT: 4 1 1.00 * stnp q17, q19, [sp, #1008]
+# CHECK-NEXT: 3 6 0.67 * ldnp q23, q29, [x1, #-1024]
+# CHECK-NEXT: 1 1 0.17 and wsp, w16, #0xe00
+# CHECK-NEXT: 1 1 0.17 and x2, x22, #0x1e00
+# CHECK-NEXT: 1 1 0.25 ands w14, w8, #0x70
+# CHECK-NEXT: 1 1 0.25 ands x4, x10, #0x60
+# CHECK-NEXT: 1 1 0.17 eor wsp, w4, #0xe00
+# CHECK-NEXT: 1 1 0.17 eor x27, x25, #0x1e00
+# CHECK-NEXT: 1 1 0.17 mov w3, #983055
+# CHECK-NEXT: 1 1 0.17 mov x10, #-6148914691236517206
+# CHECK-NEXT: 1 1 0.17 and w12, w23, w21
+# CHECK-NEXT: 1 1 0.50 and w16, w15, w1, lsl #1
+# CHECK-NEXT: 1 1 0.50 and w9, w4, w10, lsl #31
+# CHECK-NEXT: 1 1 0.17 and w3, w30, w11
+# CHECK-NEXT: 1 1 0.50 and x3, x5, x7, lsl #63
+# CHECK-NEXT: 1 1 0.50 and x5, x14, x19, asr #4
+# CHECK-NEXT: 1 1 0.50 and w3, w17, w19, ror #31
+# CHECK-NEXT: 1 1 0.50 and w0, w2, wzr, lsr #17
+# CHECK-NEXT: 1 1 0.50 and w3, w30, w11, asr #2
+# CHECK-NEXT: 1 1 0.17 and xzr, x4, x26
+# CHECK-NEXT: 1 1 0.50 and w3, wzr, w20, ror #2
+# CHECK-NEXT: 1 1 0.50 and x7, x20, xzr, asr #63
+# CHECK-NEXT: 1 1 0.50 bic x13, x20, x14, lsl #47
+# CHECK-NEXT: 1 1 0.17 bic w2, w7, w9
+# CHECK-NEXT: 1 1 0.17 eon w29, w4, w19
+# CHECK-NEXT: 1 1 0.17 eon x19, x12, x2
+# CHECK-NEXT: 1 1 0.17 eor w8, w27, w2
+# CHECK-NEXT: 1 1 0.17 eor x22, x16, x6
+# CHECK-NEXT: 1 1 0.50 orr w2, w7, w0, asr #31
+# CHECK-NEXT: 1 1 0.50 orr x8, x9, x10, lsl #12
+# CHECK-NEXT: 1 1 0.50 orn x3, x5, x7, asr #2
+# CHECK-NEXT: 1 1 0.17 orn w2, w5, w29
+# CHECK-NEXT: 1 2 0.50 ands w7, wzr, w9, lsl #1
+# CHECK-NEXT: 1 2 0.50 ands x3, x5, x20, ror #63
+# CHECK-NEXT: 1 1 0.25 bics w3, w5, w7
+# CHECK-NEXT: 1 2 0.50 bics x3, xzr, x3, lsl #1
+# CHECK-NEXT: 1 2 0.50 tst w3, w7, lsl #31
+# CHECK-NEXT: 1 2 0.50 tst x2, x20, asr #2
+# CHECK-NEXT: 1 1 0.17 mov x3, x6
+# CHECK-NEXT: 1 1 0.17 mov x3, xzr
+# CHECK-NEXT: 1 1 0.17 mov wzr, w2
+# CHECK-NEXT: 1 1 0.17 mov w3, w5
+# CHECK-NEXT: 1 1 0.17 movz w2, #0, lsl #16
+# CHECK-NEXT: 1 1 0.17 mov w2, #-1235
+# CHECK-NEXT: 1 1 0.17 mov x2, #5299989643264
+# CHECK-NEXT: 1 1 0.17 mov x2, #0
+# CHECK-NEXT: 1 1 0.17 movk w3, #0
+# CHECK-NEXT: 1 1 0.17 movz x4, #0, lsl #16
+# CHECK-NEXT: 1 1 0.17 movk w5, #0, lsl #16
+# CHECK-NEXT: 1 1 0.17 movz x6, #0, lsl #32
+# CHECK-NEXT: 1 1 0.17 movk x7, #0, lsl #32
+# CHECK-NEXT: 1 1 0.17 movz x8, #0, lsl #48
+# CHECK-NEXT: 1 1 0.17 movk x9, #0, lsl #48
+# CHECK-NEXT: 1 1 0.50 U msr DAIFSet, #0
+# CHECK-NEXT: 1 1 0.50 adr x2, #1600
+# CHECK-NEXT: 1 1 0.50 adrp x21, #6553600
+# CHECK-NEXT: 1 1 0.50 adr x0, #262144
+# CHECK-NEXT: 1 1 0.50 tbz x12, #62, #0
+# CHECK-NEXT: 1 1 0.50 tbz x12, #62, #4
+# CHECK-NEXT: 1 1 0.50 tbz x12, #62, #-32768
+# CHECK-NEXT: 1 1 0.50 tbz w17, #16, test
+# CHECK-NEXT: 1 1 0.50 tbnz x12, #60, #32764
+# CHECK-NEXT: 1 1 0.50 tbnz w3, #28, test
+# CHECK-NEXT: 1 1 0.50 b #4
+# CHECK-NEXT: 1 1 0.50 b #-4
+# CHECK-NEXT: 1 1 0.50 b #134217724
+# CHECK-NEXT: 2 1 0.50 bl test
+# CHECK-NEXT: 1 1 0.50 br x20
+# CHECK-NEXT: 2 1 0.50 blr xzr
+# CHECK-NEXT: 1 1 0.50 U ret x10
+# CHECK-NEXT: 1 1 0.50 U ret
+# CHECK-NEXT: 1 1 0.50 U eret
+# CHECK-NEXT: 1 1 0.50 U drps
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: 13.00 13.00 4.00 93.33 93.33 93.33 68.83 229.58 68.83 229.58 162.08 162.08 75.00 75.00 75.00 75.00 68.75 62.75 68.75 62.75
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w2, w3, #4095
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w30, w29, #1, lsl #12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w13, w5, #4095, lsl #12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x5, x7, #1638
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w20, wsp, #801
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add wsp, wsp, #1104
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add wsp, w30, #4084
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x0, x24, #291
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x3, x24, #4095, lsl #12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x8, sp, #1074
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add sp, x29, #3816
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w0, wsp, #4077
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w4, w20, #546, lsl #12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub sp, sp, #288
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub wsp, w19, #16
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w13, w23, #291, lsl #12
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w2, #4095
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w20, wsp, #0
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x3, #1, lsl #12
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp wsp, #2342
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp sp, #20, lsl #12
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x30, #4095
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x4, sp, #3822
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w3, #291, lsl #12
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn wsp, #1365
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn sp, #1092, lsl #12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x10, #-63432
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add wsp, wsp, w10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x25, x9, w25, uxtb
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w3, w5, w7
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add wzr, w3, w5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w20, wzr, w4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w4, w6, wzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w11, w13, w15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w9, w3, wzr, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w17, w29, w20, lsl #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w21, w22, w23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w24, w25, w26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w27, w28, w29, lsr #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add w2, w3, w4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w5, w6, w7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add w8, w9, w10, asr #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x3, x5, x7
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add xzr, x3, x5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x20, xzr, x4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x4, x6, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x11, x13, x15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x9, x3, xzr, lsl #10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x17, x29, x20, lsl #3
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x21, x22, x23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x24, x25, x26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x27, x28, x29, lsr #63
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - add x2, x3, x4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x5, x6, x7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - add x8, x9, x10, asr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w3, w5, w7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w17, wsp, w25
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x13, x23, w8, uxtb
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w3, w5
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w20, wzr, w4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w4, w6, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w11, w13, w15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w9, w3, wzr, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w17, w29, w20, lsl #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w21, w22, w23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w24, w25, w26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w27, w28, w29, lsr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds w2, w3, w4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w5, w6, w7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds w8, w9, w10, asr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x3, x5, x7
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x3, x5
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x20, xzr, x4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x4, x6, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x11, x13, x15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x9, x3, xzr, lsl #10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x17, x29, x20, lsl #3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x21, x22, x23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x24, x25, x26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x27, x28, x29, lsr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adds x2, x3, x4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x5, x6, x7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - adds x8, x9, x10, asr #63
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w3, w5, w7
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub wzr, w3, w5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w4, w6, wzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w11, w13, w15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w9, w3, wzr, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w17, w29, w20, lsl #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w21, w22, w23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w24, w25, w26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w27, w28, w29, lsr #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub w2, w3, w4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w5, w6, w7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w8, w9, w10, asr #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub x3, x5, x7
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub xzr, x3, x5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub x4, x6, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub x11, x13, x15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x9, x3, xzr, lsl #10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x17, x29, x20, lsl #3
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub x21, x22, x23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x24, x25, x26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x27, x28, x29, lsr #63
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sub x2, x3, x4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x5, x6, x7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x8, x9, x10, asr #63
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub w13, wsp, w10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - sub x16, x2, w19, uxtb
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x13, x15, x14, sxtx #1
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs w3, w5, w7
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w3, w5
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs w4, w6, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs w11, w13, w15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w9, w3, wzr, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w17, w29, w20, lsl #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs w21, w22, w23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w24, w25, w26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w27, w28, w29, lsr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs w2, w3, w4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w5, w6, w7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs w8, w9, w10, asr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x3, x5, x7
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x3, x5
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x4, x6, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x11, x13, x15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x9, x3, xzr, lsl #10
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x17, x29, x20, lsl #3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x21, x22, x23, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x24, x25, x26, lsr #18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x27, x28, x29, lsr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - subs x2, x3, x4, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x5, x6, x7, asr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - subs x8, x9, x10, asr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn wzr, w4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w5, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w6, w7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w8, w9, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w10, w11, lsl #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w12, w13, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w14, w15, lsr #21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w16, w17, lsr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn w18, w19, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w20, w21, asr #22
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn w22, w23, asr #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x0, x3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn xzr, x4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x5, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x6, x7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x8, x9, lsl #15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x10, x11, lsl #3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x12, x13, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x14, x15, lsr #41
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x16, x17, lsr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmn x18, x19, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x20, x21, asr #55
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmn x22, x23, asr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w0, w3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp wzr, w4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w5, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w6, w7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp w8, w9, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp w10, w11, lsl #31
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w12, w13, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp w14, w15, lsr #21
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp w18, w19, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp w20, w21, asr #22
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp w22, w23, asr #31
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp wsp, w26
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x16, w27, uxtb
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x0, x3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp xzr, x4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x5, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x6, x7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x8, x9, lsl #15
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x10, x11, lsl #3
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x12, x13, lsr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x14, x15, lsr #41
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x16, x17, lsr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp x18, x19, asr #0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x20, x21, asr #55
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - cmp x22, x23, asr #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp wzr, w0
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - cmp xzr, x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov sp, x30
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov wsp, w20
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x11, sp
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov w24, wsp
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc w29, w27, w25
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc wzr, w3, w4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc w9, wzr, w10
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc w20, w0, wzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc x29, x27, x25
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc xzr, x3, x4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc x9, xzr, x10
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - adc x20, x0, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs w29, w27, w25
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs wzr, w3, w4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs w9, wzr, w10
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs w20, w0, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs x29, x27, x25
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs xzr, x3, x4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs x9, xzr, x10
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - adcs x20, x0, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc w29, w27, w25
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc wzr, w3, w4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc w9, w10
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc w20, w0, wzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc x29, x27, x25
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc xzr, x3, x4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc x9, x10
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sbc x20, x0, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs w29, w27, w25
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs wzr, w3, w4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs w9, w10
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs w20, w0, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs x29, x27, x25
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs xzr, x3, x4
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs x9, x10
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - sbcs x20, x0, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc w3, w12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc wzr, w9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc w23, wzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc x29, x30
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc xzr, x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ngc x0, xzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs w3, w12
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs wzr, w9
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs w23, wzr
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs x29, x30
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs xzr, x0
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ngcs x0, xzr
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfx x1, x2, #3, #2
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr x3, x4, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr wzr, wzr, #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfx w12, w9, #0, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ubfiz x4, x5, #52, #11
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ubfx xzr, x4, #0, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ubfiz x4, xzr, #1, #6
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsr x5, x6, #12
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - bfi x4, x5, #52, #11
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - bfxil xzr, x4, #0, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - bfc x4, #1, #6
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - bfxil x5, x6, #12, #52
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sxtb w1, w2
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sxtb xzr, w3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sxth w9, w10
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sxth x0, w1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sxtw x3, w30
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - uxtb w1, w2
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - uxth w9, w10
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ubfx x3, x30, #0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr w3, w2, #0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr w9, w10, #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr x20, x21, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr w1, wzr, #3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsr w3, w2, #0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsr w9, w10, #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsr x20, x21, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsr wzr, wzr, #3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsl w9, w10, #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsl x20, x21, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - lsl w1, wzr, #3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfiz x2, x3, #63, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfiz x9, x10, #5, #59
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfiz w11, w12, #31, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfiz w13, w14, #29, #3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfiz xzr, xzr, #10, #11
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - sbfx w9, w10, #0, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - asr x2, x3, #63
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - madd x1, x3, x7, x4
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub w1, w3, w7, w4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub wzr, w0, w9, w11
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub w13, wzr, w4, w4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub w19, w30, wzr, w29
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - mneg w4, w5, w6
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub x1, x3, x7, x4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub xzr, x0, x9, x11
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub x13, xzr, x4, x4
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - msub x19, x30, xzr, x29
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - mneg x4, x5, x6
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smaddl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smaddl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smaddl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smaddl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - smull x19, w20, w21
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smsubl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smsubl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smsubl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - smsubl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - smnegl x19, w20, w21
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umaddl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umaddl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umaddl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umaddl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - umull x19, w20, w21
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umsubl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - umsubl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - umnegl x19, w20, w21
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - smulh x23, x22, xzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - umulh x23, x22, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - mul x19, x20, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.67 0.67 - - - - - - - - mneg w21, w22, w23
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - smull x11, w13, w17
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - umull x11, w13, w17
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - smnegl x11, w13, w17
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - umnegl x11, w13, w17
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - extr w3, w5, w7, #0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - extr w11, w13, w17, #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - extr x3, x5, x7, #15
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - extr x11, x13, x17, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ror x19, x23, #24
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ror x29, xzr, #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ror w9, w13, #31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp h5, h21
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp h5, #0.0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe h22, h21
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe h13, #0.0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp s3, s5
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp s31, #0.0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe s29, s30
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe s15, #0.0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp d4, d12
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmp d23, #0.0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe d26, d22
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 - 0.50 - fcmpe d29, #0.0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp s1, s31, #0, eq
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp s3, s0, #15, hs
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp s31, s15, #13, hs
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp d9, d31, #0, le
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp d3, d0, #15, gt
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp d31, d5, #7, ne
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmp h31, h3, #11, hs
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe h6, h1, #12, ne
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe s1, s31, #0, eq
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe s3, s0, #15, hs
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe s31, s15, #13, hs
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe d9, d31, #0, le
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe d3, d0, #15, gt
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fccmpe d31, d5, #7, ne
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fcsel s3, s20, s9, pl
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fcsel d9, d10, d11, mi
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fcsel h26, h2, h11, hs
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov h18, h28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov s0, s1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs s2, s3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg h2, h9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg s4, s5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsqrt s6, s7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt d8, s9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt h10, s11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintn h12, h3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintn s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintp h17, h31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintp s14, s15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintm h0, h21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintm s16, s17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintz h10, h29
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintz s18, s19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinta h22, h10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinta s20, s21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintx h4, h5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintx s22, s23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinti s24, s25
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinti h31, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov d0, d1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs d2, d3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg d4, d5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsqrt h13, h24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsqrt d6, d7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt s8, d9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt h10, d11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintn d12, d13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintp d14, d15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintm d16, d17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintz d18, d19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinta d20, d21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintx d22, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinti d24, d25
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt s26, h27
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvt d28, h29
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul s20, s19, s17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fdiv h1, h26, h23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fdiv s1, s2, s3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fadd h23, h27, h22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fadd s4, s5, s6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsub h20, h11, h18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsub s7, s8, s9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax h8, h7, h11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin s13, s14, s15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm h29, h13, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm s16, s17, s18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm s19, s20, s21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmul h3, h15, h7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmul s22, s23, s2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul d20, d19, d17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fdiv d1, d2, d3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fadd d4, d5, d6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsub d7, d8, d9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax d10, d11, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin d13, d14, d15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin h4, h13, h17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm d16, d17, d18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm d19, d20, d21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm h29, h23, h17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmul d22, d23, d24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmadd h27, h0, h6, h28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmadd s3, s5, s6, s31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmadd d3, d13, d0, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmsub h25, h28, h12, h24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmsub s3, s5, s6, s31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmsub d3, d13, d0, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmadd h3, h18, h31, h24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmadd s3, s5, s6, s31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmadd d3, d13, d0, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmsub s3, s5, s6, s31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmsub d3, d13, d0, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fnmsub h3, h29, h24, h17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w3, h5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs wzr, h20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w19, h0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x3, h5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, h30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x19, h0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w3, s5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs wzr, s20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w19, s0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x3, s5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, s30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x19, s0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w3, d5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs wzr, d20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w19, d0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x3, d5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, d30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x19, d0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w3, h5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu wzr, h20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w19, h0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x3, h5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x12, h30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x19, h0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w3, s5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu wzr, s20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w19, s0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x3, s5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x12, s30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x19, s0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w3, d5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu wzr, d20, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w19, d0, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x3, d5, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x12, d30, #45
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x19, d0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h14, x0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s14, x0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d14, x0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h14, x0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s14, x0, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d23, w19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d31, wzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d14, w0, #32
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d23, x19, #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d31, xzr, #20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d14, x0, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns w3, h31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns xzr, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu wzr, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu x0, h0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps wzr, h9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps x12, h20
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu w30, h23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu x29, h3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms w2, h3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms x4, h5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu w6, h7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu x8, h9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w10, h11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w14, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x15, h16
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h17, w18
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h19, x20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h21, w22
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf h23, x24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas w25, h26
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas x27, h28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau w29, h30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau xzr, h0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns w3, s31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns xzr, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu wzr, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu x0, s0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps wzr, s9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps x12, s20
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu w30, s23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu x29, s3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms w2, s3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms x4, s5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu w6, s7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu x8, s9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w10, s11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w14, s15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x15, s16
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s17, w18
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s19, x20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s21, w22
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf s23, x24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas w25, s26
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas x27, s28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau w29, s30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau xzr, s0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns w3, d31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns xzr, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu wzr, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu x0, d0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps wzr, d9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps x12, d20
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu w30, d23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu x29, d3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms w2, d3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms x4, d5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu w6, d7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu x8, d9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs w10, d11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs x12, d13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu w14, d15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu x15, d16
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d17, w18
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 scvtf d19, x20
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d21, w22
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf d23, x24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas w25, d26
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas x27, d28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau w29, d30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau xzr, d0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - fmov h6, w5
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - fmov h16, x27
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov w15, h31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov w3, s9
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - fmov s9, w3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov x21, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov x20, d31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - fmov d1, x15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov x3, v12.d[1]
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 fmov v1.d[1], x19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov h29, #0.50000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov s2, #0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov s3, #1.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov d30, #16.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov s4, #1.06250000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov d10, #1.93750000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov s12, #-1.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov d16, #8.50000000
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w3, #0
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x29, #4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw xzr, #-4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr s0, #8
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr d0, #1048572
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q0, #-1048576
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfm pldl1strm, #0
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfm #25, #0
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxrb w18, w8, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxrh w24, w15, [x16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxr w5, w6, [x17]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxr w1, x10, [x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxrb w30, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxrh w17, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxr w22, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxr x11, [x29]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxp w12, w11, w10, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stxp wzr, x27, x9, [x12]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxp w0, wzr, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldxp x17, x0, [x18]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxrb w12, w22, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxrh w10, w1, [x1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxr w9, w2, [x2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxr w9, x3, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxrb w8, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxrh w7, [x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxr w6, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxr x5, [x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxp w4, w5, w6, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - 0.50 0.50 0.50 0.50 - - - - stlxp wzr, x6, x7, [x1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxp w5, w18, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldaxp x6, x19, [x22]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlrb w24, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlrh w25, [x30]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlr w26, [x29]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlr x27, [x28]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldarb w16, [x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldarb w23, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldarh w22, [x30]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldar wzr, [x29]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldar x21, [x28]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sturb w9, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sturh wzr, [x12, #255]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur w16, [x0, #-256]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur x28, [x14, #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldurb w1, [x20, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldurh w20, [x1, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur w12, [sp, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur xzr, [x12, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldursb x9, [x7, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldursh x17, [x19, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldursw x20, [x15, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfum pldl2keep, [sp, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldursb w19, [x1, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldursh w15, [x21, #-256]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur b0, [sp, #1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur h12, [x12, #-1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur s15, [x0, #255]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur d31, [x5, #25]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stur q9, [x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur b3, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur h5, [x4, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur s7, [x12, #-1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur d11, [x19, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldur q13, [x1, #2]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w9, [x2], #255
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w10, [x3], #1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w10, [x3], #-256
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w9, [x2], #255
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w9, [x2], #1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w10, [x3], #-256
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w19, [sp], #255
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w20, [x30], #1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w21, [x12], #-256
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str xzr, [x9], #255
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str x2, [x3], #1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str x19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w9, [x2], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w10, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w10, [x3], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w9, [x2], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w9, [x2], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w10, [x3], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w19, [sp], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w20, [x30], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w21, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr xzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr x2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr x19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb xzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb x2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb x19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh xzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh x2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh x19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw xzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw x2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw x19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb wzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb w2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb w19, [x12], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh wzr, [x9], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh w2, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh w19, [x12], #-256
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b0, [x0], #255
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b3, [x3], #1
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b5, [sp], #-256
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h10, [x10], #255
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h13, [x23], #1
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h15, [sp], #-256
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s20, [x20], #255
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s23, [x23], #1
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s25, [x0], #-256
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d20, [x20], #255
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d23, [x23], #1
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d25, [x0], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b0, [x0], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b3, [x3], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b5, [sp], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h10, [x10], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h13, [x23], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h15, [sp], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s20, [x20], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s23, [x23], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s25, [x0], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d20, [x20], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d23, [x23], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d25, [x0], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q20, [x1], #255
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q23, [x9], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q25, [x20], #-256
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q10, [x1], #255
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q22, [sp], #1
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q21, [x20], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr x3, [x4, #0]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w9, [x2, #255]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w10, [x3, #1]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strb w10, [x3, #-256]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w9, [x2, #255]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w9, [x2, #1]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - strh w10, [x3, #-256]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w19, [sp, #255]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w20, [x30, #1]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str w21, [x12, #-256]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str xzr, [x9, #255]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str x2, [x3, #1]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - str x19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w9, [x2, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w10, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrb w10, [x3, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w9, [x2, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w9, [x2, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrh w10, [x3, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w19, [sp, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w20, [x30, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr w21, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr xzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr x2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldr x19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb xzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb x2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb x19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh xzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh x2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh x19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw xzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw x2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsw x19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb wzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb w2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsb w19, [x12, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh wzr, [x9, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh w2, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldrsh w19, [x12, #-256]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b0, [x0, #255]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b3, [x3, #1]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str b5, [sp, #-256]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h10, [x10, #255]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h13, [x23, #1]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str h15, [sp, #-256]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s20, [x20, #255]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s23, [x23, #1]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str s25, [x0, #-256]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d20, [x20, #255]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d23, [x23, #1]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str d25, [x0, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b0, [x0, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b3, [x3, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr b5, [sp, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h10, [x10, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h13, [x23, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr h15, [sp, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s20, [x20, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s23, [x23, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr s25, [x0, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d20, [x20, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d23, [x23, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr d25, [x0, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q20, [x1, #255]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q23, [x9, #1]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldr q25, [x20, #-256]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q10, [x1, #255]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q22, [sp, #1]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - str q21, [x20, #-256]!
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sttrb w9, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sttrh wzr, [x12, #255]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sttr w16, [x0, #-256]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - sttr x28, [x14, #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrb w1, [x20, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrh w20, [x1, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtr w12, [sp, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtr xzr, [x12, #255]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrsb x9, [x7, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrsh x17, [x19, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrsw x20, [x15, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrsb w19, [x1, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldtrsh w15, [x21, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x4, [x29]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x30, [x12, #32760]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x20, [sp, #8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr xzr, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w2, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w17, [sp, #16380]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w13, [x2, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw x2, [x5, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw x23, [sp, #16380]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw x21, [x25, x7]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w2, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh w23, [x6, #8190]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh wzr, [sp, #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh x29, [x2, #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh x25, [x8, w13, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w26, [x3, #121]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w12, [x2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb w27, [sp, #4095]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb xzr, [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb x12, [x28, x27]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str x30, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str w20, [x4, #16380]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str b5, [x11]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str h23, [x15]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str s25, [x19]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str d15, [x2]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strh w17, [sp, #8190]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strb w23, [x3, #4095]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strb wzr, [x2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr b31, [sp, #4095]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h20, [x2, #8190]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr s10, [x19, #16380]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr d3, [x10, #32760]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str q12, [sp, #65520]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q14, [x6, #4624]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w3, [sp, x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb w10, [x30, x7]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strb w12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strb w5, [x26, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w14, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb w15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrb w17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsb x18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh w3, [sp, x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh w9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w10, [x30, x7, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strh w11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh x13, [x27, x5, sxtx #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w14, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsh w16, [x24, w8, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrh w18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - strh w19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr b25, [x21, w8, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr b8, [x30, x10]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str b14, [x13, x25]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str b30, [x16, w26, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h3, [sp, x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h10, [x30, x7, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str h11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str h12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str h13, [x27, x5, sxtx #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h14, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h16, [x24, w8, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str h18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr h19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr s12, [x30, w5, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr d24, [x26, w7, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str s20, [x24, w10, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str d5, [x26, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w3, [sp, x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr s9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w10, [x30, x7, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str s12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str w13, [x27, x5, sxtx #2]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str w14, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w16, [x24, w8, uxtw #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw x17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr w18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldrsw x19, [x21, wzr, sxtw #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x3, [sp, x5]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str x9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr d10, [x30, x7, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str x11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x13, [x27, x5, sxtx #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfm pldl1keep, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str x27, [x26, w24, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x16, [x24, w8, uxtw #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr x18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str d19, [x21, wzr, sxtw #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q3, [sp, x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q9, [x27, x6]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q10, [x30, x7, lsl #4]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str q11, [x29, x3, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str q12, [x28, xzr, sxtx]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str q13, [x27, x5, sxtx #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q14, [x26, w6, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q15, [x25, w7, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q16, [x24, w8, uxtw #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q17, [x23, w9, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str q18, [x22, w10, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr q19, [x21, wzr, sxtw #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp w3, w5, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stp wzr, w9, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp w2, wzr, [sp, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp w9, w10, [sp, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldpsw x9, x10, [sp, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldpsw x9, x10, [x2, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldpsw x20, x30, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp x21, x29, [x2, #504]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp x22, x23, [x3, #-512]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp x24, x25, [x4, #8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp s29, s28, [sp, #252]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stp s27, s26, [sp, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp s1, s2, [x3, #44]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stp d3, d5, [x9, #504]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stp d7, d11, [x10, #-512]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnp x20, x16, [x8]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stp x3, x6, [x16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldp d2, d3, [x30, #-8]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - stp q3, q5, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - stp q17, q19, [sp, #1008]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ldp q23, q29, [x1, #-1024]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w3, w5, [sp], #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - stp wzr, w9, [sp], #252
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w2, wzr, [sp], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w9, w10, [sp], #4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x9, x10, [sp], #4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x9, x10, [x2], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x20, x30, [sp], #252
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x21, x29, [x2], #504
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x22, x23, [x3], #-512
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x24, x25, [x4], #8
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp s29, s28, [sp], #252
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp s27, s26, [sp], #-256
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp s1, s2, [x3], #44
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp d3, d5, [x9], #504
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp d7, d11, [x10], #-512
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp d2, d3, [x30], #-8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 1.00 1.00 1.00 1.00 - - - - stp q3, q5, [sp], #0
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 1.00 1.00 1.00 1.00 - - - - stp q17, q19, [sp], #1008
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.50 0.50 0.50 0.50 0.50 0.50 - - - - - - - - ldp q23, q29, [x1], #-1024
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w3, w5, [sp, #0]!
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - stp wzr, w9, [sp, #252]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w2, wzr, [sp, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp w9, w10, [sp, #4]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x9, x10, [sp, #4]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x9, x10, [x2, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldpsw x20, x30, [sp, #252]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x21, x29, [x2, #504]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x22, x23, [x3, #-512]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ldp x24, x25, [x4, #8]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp s29, s28, [sp, #252]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp s27, s26, [sp, #-256]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp s1, s2, [x3, #44]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp d3, d5, [x9, #504]!
+# CHECK-NEXT: - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - stp d7, d11, [x10, #-512]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 0.33 - - - - - - - - ldp d2, d3, [x30, #-8]!
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 1.00 1.00 1.00 1.00 - - - - stp q3, q5, [sp, #0]!
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 1.00 1.00 1.00 1.00 - - - - stp q17, q19, [sp, #1008]!
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.50 0.50 0.50 0.50 0.50 0.50 - - - - - - - - ldp q23, q29, [x1, #-1024]!
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp w3, w5, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnp wzr, w9, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp w2, wzr, [sp, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp w9, w10, [sp, #4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp x21, x29, [x2, #504]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp x22, x23, [x3, #-512]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp x24, x25, [x4, #8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp s29, s28, [sp, #252]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnp s27, s26, [sp, #-256]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp s1, s2, [x3, #44]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnp d3, d5, [x9, #504]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnp d7, d11, [x10, #-512]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnp d2, d3, [x30, #-8]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - stnp q3, q5, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - stnp q17, q19, [sp, #1008]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ldnp q23, q29, [x1, #-1024]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - and wsp, w16, #0xe00
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - and x2, x22, #0x1e00
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ands w14, w8, #0x70
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - ands x4, x10, #0x60
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eor wsp, w4, #0xe00
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eor x27, x25, #0x1e00
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov w3, #983055
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x10, #-6148914691236517206
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - and w12, w23, w21
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w16, w15, w1, lsl #1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w9, w4, w10, lsl #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - and w3, w30, w11
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and x3, x5, x7, lsl #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and x5, x14, x19, asr #4
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w3, w17, w19, ror #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w0, w2, wzr, lsr #17
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w3, w30, w11, asr #2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - and xzr, x4, x26
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and w3, wzr, w20, ror #2
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - and x7, x20, xzr, asr #63
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - bic x13, x20, x14, lsl #47
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - bic w2, w7, w9
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eon w29, w4, w19
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eon x19, x12, x2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eor w8, w27, w2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - eor x22, x16, x6
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - orr w2, w7, w0, asr #31
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - orr x8, x9, x10, lsl #12
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - orn x3, x5, x7, asr #2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - orn w2, w5, w29
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - ands w7, wzr, w9, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - ands x3, x5, x20, ror #63
+# CHECK-NEXT: - - - - - - - 0.25 - 0.25 0.25 0.25 - - - - - - - - bics w3, w5, w7
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - bics x3, xzr, x3, lsl #1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - tst w3, w7, lsl #31
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - tst x2, x20, asr #2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x3, x6
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x3, xzr
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov wzr, w2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov w3, w5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movz w2, #0, lsl #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov w2, #-1235
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x2, #5299989643264
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - mov x2, #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movk w3, #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movz x4, #0, lsl #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movk w5, #0, lsl #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movz x6, #0, lsl #32
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movk x7, #0, lsl #32
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movz x8, #0, lsl #48
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - movk x9, #0, lsl #48
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - msr DAIFSet, #0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - adr x2, #1600
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - adrp x21, #6553600
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - adr x0, #262144
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbz x12, #62, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbz x12, #62, #4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbz x12, #62, #-32768
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbz w17, #16, test
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbnz x12, #60, #32764
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - tbnz w3, #28, test
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - b #4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - b #-4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - b #134217724
+# CHECK-NEXT: 0.50 0.50 - - - - - 0.50 - 0.50 - - - - - - - - - - bl test
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - br x20
+# CHECK-NEXT: 0.50 0.50 - - - - - 0.50 - 0.50 - - - - - - - - - - blr xzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - ret x10
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - ret
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - eret
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - drps
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-bf16-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-bf16-instructions.s
new file mode 100644
index 0000000000000..94d4f9b60cf64
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-bf16-instructions.s
@@ -0,0 +1,63 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/bf16-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 3 0.25 bfcvt h0, s0
+# CHECK-NEXT: 2 4 0.50 bfcvtn v0.4h, v0.4s
+# CHECK-NEXT: 2 4 0.50 bfcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 2 0.25 bfdot v0.2s, v24.4h, v14.2h[2]
+# CHECK-NEXT: 2 6 0.50 bfdot v0.2s, v0.4h, v0.4h
+# CHECK-NEXT: 2 6 0.50 bfdot v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.25 bfmlalb v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.25 bfmlalb v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: 1 4 0.25 bfmlalt v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.25 bfmlalt v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: 4 8 1.00 bfmmla v0.4s, v0.8h, v0.8h
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.50 4.50 4.50 4.50
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfcvt h0, s0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfcvtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfdot v0.2s, v24.4h, v14.2h[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfdot v0.2s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfdot v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfmlalb v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfmlalb v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfmlalt v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bfmlalt v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfmmla v0.4s, v0.8h, v0.8h
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-complxnum-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-complxnum-instructions.s
new file mode 100644
index 0000000000000..991ab60bba02a
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-complxnum-instructions.s
@@ -0,0 +1,49 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/complxnum-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 3 0.25 fcadd v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: 1 3 0.25 fcadd v0.4s, v0.4s, v0.4s, #270
+# CHECK-NEXT: 1 4 0.25 fcmla v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: 1 4 0.25 fcmla v0.4s, v0.4s, v0.s[1], #0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcadd v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcadd v0.4s, v0.4s, v0.4s, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmla v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmla v0.4s, v0.4s, v0.s[1], #0
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-crypto-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-crypto-instructions.s
new file mode 100644
index 0000000000000..98f0f5fdb562c
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-crypto-instructions.s
@@ -0,0 +1,103 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/crypto-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 2 0.50 aesd z0.b, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 aese z0.b, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 aesimc z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 aesmc z0.b, z0.b
+# CHECK-NEXT: 1 2 0.25 sha1h s0, s1
+# CHECK-NEXT: 1 2 0.50 sha1su1 v0.4s, v1.4s
+# CHECK-NEXT: 1 2 0.50 sha256su0 v0.4s, v1.4s
+# CHECK-NEXT: 1 4 0.50 sha1c q0, s1, v2.4s
+# CHECK-NEXT: 1 4 0.50 sha1p q0, s1, v2.4s
+# CHECK-NEXT: 1 4 0.50 sha1m q0, s1, v2.4s
+# CHECK-NEXT: 1 2 0.50 sha1su0 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 1 4 0.50 sha256h q0, q1, v2.4s
+# CHECK-NEXT: 1 4 0.50 sha256h2 q0, q1, v2.4s
+# CHECK-NEXT: 1 2 0.50 sha256su1 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 1 2 0.50 sha512h q0, q1, v2.2d
+# CHECK-NEXT: 1 2 0.50 sha512h2 q0, q1, v2.2d
+# CHECK-NEXT: 1 2 0.50 sha512su0 v11.2d, v12.2d
+# CHECK-NEXT: 1 2 0.50 sha512su1 v11.2d, v13.2d, v14.2d
+# CHECK-NEXT: 1 1 0.25 eor3 v25.16b, v12.16b, v7.16b, v2.16b
+# CHECK-NEXT: 1 1 0.25 rax1 v30.2d, v29.2d, v26.2d
+# CHECK-NEXT: 1 2 0.25 xar v26.2d, v21.2d, v27.2d, #63
+# CHECK-NEXT: 1 1 0.25 bcax v31.16b, v26.16b, v2.16b, v1.16b
+# CHECK-NEXT: 1 2 0.50 sm3ss1 v20.4s, v23.4s, v21.4s, v22.4s
+# CHECK-NEXT: 1 2 0.50 sm3tt1a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: 1 2 0.50 sm3tt1b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: 1 2 0.50 sm3tt2a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: 1 2 0.50 sm3tt2b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: 1 2 0.50 sm3partw1 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: 1 2 0.50 sm3partw2 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: 1 4 0.25 sm4ekey v11.4s, v11.4s, v19.4s
+# CHECK-NEXT: 1 4 0.25 sm4e v2.4s, v15.4s
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 13.75 3.75 13.75 3.75
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesd z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aese z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesimc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesmc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sha1h s0, s1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha1su1 v0.4s, v1.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha256su0 v0.4s, v1.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha1c q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha1p q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha1m q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha1su0 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha256h q0, q1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha256h2 q0, q1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha256su1 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha512h q0, q1, v2.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha512h2 q0, q1, v2.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha512su0 v11.2d, v12.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sha512su1 v11.2d, v13.2d, v14.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 eor3 v25.16b, v12.16b, v7.16b, v2.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rax1 v30.2d, v29.2d, v26.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xar v26.2d, v21.2d, v27.2d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bcax v31.16b, v26.16b, v2.16b, v1.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3ss1 v20.4s, v23.4s, v21.4s, v22.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3tt1a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3tt1b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3tt2a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3tt2b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3partw1 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - sm3partw2 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sm4ekey v11.4s, v11.4s, v19.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sm4e v2.4s, v15.4s
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-flag-manipulation-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-flag-manipulation-instructions.s
new file mode 100644
index 0000000000000..dada95684d18b
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-flag-manipulation-instructions.s
@@ -0,0 +1,53 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/flag-manipulation-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.50 U setf8 w1
+# CHECK-NEXT: 1 1 0.50 U setf16 w1
+# CHECK-NEXT: 1 1 0.50 U rmif x0, #0, #0
+# CHECK-NEXT: 1 1 0.50 U cfinv
+# CHECK-NEXT: 1 1 0.50 U axflag
+# CHECK-NEXT: 1 1 0.50 U xaflag
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - 3.00 - 3.00 - - - - - - - - - -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - setf8 w1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - setf16 w1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - rmif x0, #0, #0
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - cfinv
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - axflag
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - xaflag
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-forwarding.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-forwarding.s
new file mode 100644
index 0000000000000..1524ccf927fb5
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-forwarding.s
@@ -0,0 +1,1871 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=2 < %s | FileCheck %s
+
+# LLVM-MCA-BEGIN fmadd
+fadd d0, d0, d0
+fmadd d0, d1, d2, d0
+fmul d0, d0, d0
+fmadd d0, d1, d2, d0
+fmadd d0, d1, d2, d0
+fmadd d0, d0, d1, d2
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN saba
+mul v0.4s, v0.4s, v0.4s
+saba v0.4s, v1.4s, v2.4s
+saba v0.4s, v1.4s, v2.4s
+saba v0.4s, v0.4s, v1.4s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN sdot
+mul v0.4s, v0.4s, v0.4s
+sdot v0.4s, v1.16b, v2.16b
+sdot v0.4s, v1.16b, v2.16b
+sdot v0.4s, v0.16b, v1.16b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN smmla
+mul v0.4s, v0.4s, v0.4s
+smmla v0.4s, v1.16b, v2.16b
+smmla v0.4s, v1.16b, v2.16b
+smmla v0.4s, v0.16b, v1.16b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN mla
+mul v0.4s, v0.4s, v0.4s
+mla v0.4s, v1.4s, v2.4s
+mla v0.4s, v1.4s, v2.4s
+mla v0.4s, v0.4s, v1.4s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN sqrdmlah
+mul v0.4s, v0.4s, v0.4s
+sqrdmlah v0.4s, v1.4s, v2.4s
+sqrdmlah v0.4s, v1.4s, v2.4s
+sqrdmlah v0.4s, v0.4s, v1.4s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN smlal2
+mul v0.4s, v0.4s, v0.4s
+smlal2 v0.4s, v1.8h, v2.8h
+smlal2 v0.4s, v1.8h, v2.8h
+smlal2 v0.4s, v0.8h, v1.8h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN sqdmlal2
+mul v0.4s, v0.4s, v0.4s
+sqdmlal2 v0.4s, v1.8h, v2.8h
+sqdmlal2 v0.4s, v1.8h, v2.8h
+sqdmlal2 v0.4s, v0.8h, v1.8h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN sadalp
+mul v0.4s, v0.4s, v0.4s
+sadalp v0.2d, v1.4s
+sadalp v0.2d, v1.4s
+sadalp v0.2d, v0.4s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN ssra
+mul v0.4s, v0.4s, v0.4s
+ssra v0.2d, v1.2d, #1
+ssra v0.2d, v1.2d, #1
+ssra v0.2d, v0.2d, #1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN fcmla
+fmul v0.4s, v0.4s, v0.4s
+fcmla v0.2d, v1.2d, v2.2d, #90
+fcmla v0.2d, v1.2d, v2.2d, #90
+fcmla v0.2d, v0.2d, v1.2d, #90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN fmla
+fmul v0.2d, v0.2d, v0.2d
+fmla v0.2d, v1.2d, v2.2d
+fadd v0.2d, v0.2d, v0.2d
+fmla v0.2d, v1.2d, v2.2d
+fmla v0.2d, v1.2d, v2.2d
+fmla v0.2d, v0.2d, v1.2d
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN fmlal
+fmul v0.2d, v0.2d, v0.2d
+fmlal v0.4s, v1.4h, v2.4h
+fadd v0.2d, v0.2d, v0.2d
+fmlal v0.4s, v1.4h, v2.4h
+fmlal v0.4s, v1.4h, v2.4h
+fmlal v0.4s, v0.4h, v1.4h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN bfmlalb
+fmul v0.2d, v0.2d, v0.2d
+bfmlalb v0.4s, v1.8h, v2.8h
+bfmlalb v0.4s, v1.8h, v2.8h
+bfmlalb v0.4s, v0.8h, v1.8h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN frecps
+fmul v0.4s, v0.4s, v0.4s
+frecps v0.4s, v1.4s, v0.4s
+frecps v0.4s, v1.4s, v0.4s
+frecps v0.4s, v0.4s, v1.4s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z saba
+mul z0.d, z0.d, z0.d
+saba z0.d, z1.d, z2.d
+saba z0.d, z1.d, z2.d
+saba z0.d, z0.d, z1.d
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sabalb
+mul z0.d, z0.d, z0.d
+sabalb z0.d, z1.s, z2.s
+sabalb z0.d, z1.s, z2.s
+sabalb z0.d, z0.s, z1.s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sadalp
+mul z0.d, z0.d, z0.d
+sadalp z0.d, p0/m, z1.s
+sadalp z0.d, p0/m, z1.s
+sadalp z0.d, p0/m, z0.s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z ssra
+mul z0.d, z0.d, z0.d
+ssra z0.d, z1.d, #1
+ssra z0.d, z1.d, #1
+ssra z0.d, z0.d, #1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z cdot.s
+mul z0.d, z0.d, z0.d
+cdot z0.s, z1.b, z2.b, #90
+cdot z0.s, z1.b, z2.b, #90
+cdot z0.s, z0.b, z1.b, #90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z cdot.d
+mul z0.d, z0.d, z0.d
+cdot z0.d, z1.h, z2.h, #90
+cdot z0.d, z1.h, z2.h, #90
+cdot z0.d, z0.h, z1.h, #90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z cmla.b
+mul z0.d, z0.d, z0.d
+cmla z0.b, z1.b, z2.b, #90
+cmla z0.b, z1.b, z2.b, #90
+cmla z0.b, z0.b, z1.b, #90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z cmla.d
+mul z0.d, z0.d, z0.d
+cmla z0.d, z1.d, z2.d, #90
+cmla z0.d, z1.d, z2.d, #90
+cmla z0.d, z0.d, z1.d, #90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sdot.s
+mul z0.d, z0.d, z0.d
+sdot z0.s, z1.b, z2.b
+sdot z0.s, z1.b, z2.b
+sdot z0.s, z0.b, z1.b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sudot
+mul z0.d, z0.d, z0.d
+sdot z0.s, z1.b, z2.b[1]
+sdot z0.s, z1.b, z2.b[1]
+sdot z0.s, z0.b, z1.b[1]
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sdot.d
+mul z0.d, z0.d, z0.d
+sdot z0.d, z1.h, z2.h
+sdot z0.d, z1.h, z2.h
+sdot z0.d, z0.h, z1.h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z smmla
+mul z0.s, z0.s, z0.s
+smmla z0.s, z1.b, z2.b
+smmla z0.s, z1.b, z2.b
+smmla z0.s, z0.b, z1.b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z mla.b
+mul z0.d, z0.d, z0.d
+mla z0.b, p0/m, z1.b, z2.b
+mla z0.b, p0/m, z1.b, z2.b
+mla z0.b, p0/m, z0.b, z1.b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z mla.d
+mul z0.d, z0.d, z0.d
+mla z0.d, p0/m, z1.d, z2.d
+mla z0.d, p0/m, z1.d, z2.d
+mla z0.d, p0/m, z0.d, z1.d
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z smlalb.s
+mul z0.d, z0.d, z0.d
+smlalb z0.s, z1.h, z2.h
+smlalb z0.s, z1.h, z2.h
+smlalb z0.s, z0.h, z1.h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z smlalb.d
+mul z0.d, z0.d, z0.d
+smlalb z0.d, z1.s, z2.s
+smlalb z0.d, z1.s, z2.s
+smlalb z0.d, z0.s, z1.s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sqdmlalb.s
+mul z0.d, z0.d, z0.d
+sqdmlalb z0.s, z1.h, z2.h
+sqdmlalb z0.s, z1.h, z2.h
+sqdmlalb z0.s, z0.h, z1.h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sqdmlalb.d
+mul z0.d, z0.d, z0.d
+sqdmlalb z0.d, z1.s, z2.s
+sqdmlalb z0.d, z1.s, z2.s
+sqdmlalb z0.d, z0.s, z1.s
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sqrdmlah.b
+mul z0.d, z0.d, z0.d
+sqrdmlah z0.b, z1.b, z2.b
+sqrdmlah z0.b, z1.b, z2.b
+sqrdmlah z0.b, z0.b, z1.b
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z sqrdmlah.d
+mul z0.d, z0.d, z0.d
+sqrdmlah z0.d, z1.d, z2.d
+sqrdmlah z0.d, z1.d, z2.d
+sqrdmlah z0.d, z0.d, z1.d
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z fcmla ZPmZZ
+fmul z0.d, z0.d, z0.d
+fcmla z0.d, p0/m, z1.d, z2.d, 90
+fcmla z0.d, p0/m, z1.d, z2.d, 90
+fcmla z0.d, p0/m, z0.d, z1.d, 90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z fcmla ZZZI
+fmul z0.d, z0.d, z0.d
+fcmla z0.s, z1.s, z2.s[1], 90
+fcmla z0.s, z1.s, z2.s[1], 90
+fcmla z0.s, z0.s, z1.s[1], 90
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z fmla ZPmZZ
+fmul z0.d, z0.d, z0.d
+fmla z0.d, p0/m, z1.d, z2.d
+fmla z0.d, p0/m, z1.d, z2.d
+fmla z0.d, p0/m, z0.d, z1.d
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z fmla ZZZI
+fmul z0.d, z0.d, z0.d
+fmla z0.d, z1.d, z2.d[1]
+fmla z0.d, z1.d, z2.d[1]
+fmla z0.d, z0.d, z1.d[1]
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z fmlalb ZZZ
+fmul z0.d, z0.d, z0.d
+fmlalb z0.s, z1.h, z2.h
+fmlalb z0.s, z1.h, z2.h
+fmlalb z0.s, z0.h, z1.h
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN Z bfmlalb
+fmul z0.d, z0.d, z0.d
+bfmlalb z0.s, z1.h, z2.h
+bfmlalb z0.s, z1.h, z2.h
+bfmlalb z0.s, z0.h, z1.h
+# LLVM-MCA-END
+
+# CHECK: [0] Code Region - fmadd
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 600
+# CHECK-NEXT: Total Cycles: 1703
+# CHECK-NEXT: Total uOps: 600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.35
+# CHECK-NEXT: IPC: 0.35
+# CHECK-NEXT: Block RThroughput: 1.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeER. . . . . . .. fadd d0, d0, d0
+# CHECK-NEXT: [0,1] D==eeeeER . . . . . .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [0,2] D======eeeER . . . . .. fmul d0, d0, d0
+# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmadd d0, d0, d1, d2
+# CHECK-NEXT: [1,0] D=================eeER . . .. fadd d0, d0, d0
+# CHECK-NEXT: [1,1] D===================eeeeER . .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [1,2] .D======================eeeER . .. fmul d0, d0, d0
+# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmadd d0, d1, d2, d0
+# CHECK-NEXT: [1,5] .D=============================eeeeER fmadd d0, d0, d1, d2
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fadd d0, d0, d0
+# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fmadd d0, d1, d2, d0
+# CHECK-NEXT: 2. 2 15.0 0.0 0.0 fmul d0, d0, d0
+# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmadd d0, d1, d2, d0
+# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmadd d0, d1, d2, d0
+# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmadd d0, d0, d1, d2
+# CHECK-NEXT: 12 15.3 0.1 0.0 <total>
+
+# CHECK: [1] Code Region - saba
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 803
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.50
+# CHECK-NEXT: IPC: 0.50
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345678
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeER . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeER . . . saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,2] D====eeER . . . saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,3] D======eeER . . saba v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: [1,0] D========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D===========eeER . saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,2] D============eeER . saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,3] D==============eeER saba v0.4s, v0.4s, v1.4s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 5.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 8.0 0.0 0.0 saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 2. 2 9.0 0.0 0.0 saba v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 3. 2 11.0 0.0 0.0 saba v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: 8 8.3 0.1 0.0 <total>
+
+# CHECK: [2] Code Region - sdot
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [0,2] D====eeeER. . . . sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [0,3] D=======eeeER . . . sdot v0.4s, v0.16b, v1.16b
+# CHECK-NEXT: [1,0] D==========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D=============eeeER . . sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [1,2] D==============eeeER. . sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [1,3] D=================eeeER sdot v0.4s, v0.16b, v1.16b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 sdot v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 sdot v0.4s, v0.16b, v1.16b
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [3] Code Region - smmla
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [0,2] D====eeeER. . . . smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [0,3] D=======eeeER . . . smmla v0.4s, v0.16b, v1.16b
+# CHECK-NEXT: [1,0] D==========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D=============eeeER . . smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [1,2] D==============eeeER. . smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: [1,3] D=================eeeER smmla v0.4s, v0.16b, v1.16b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 smmla v0.4s, v1.16b, v2.16b
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 smmla v0.4s, v0.16b, v1.16b
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [4] Code Region - mla
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,2] D====eeeER. . . . mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,3] D=======eeeER . . . mla v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: [1,0] D==========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D=============eeeER . . mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,2] D==============eeeER. . mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,3] D=================eeeER mla v0.4s, v0.4s, v1.4s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 mla v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 mla v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [5] Code Region - sqrdmlah
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,2] D=====eeeER . . . sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [0,3] D========eeeER . . . sqrdmlah v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: [1,0] D===========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D==============eeeER. . sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,2] D================eeeER . sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: [1,3] D===================eeeER sqrdmlah v0.4s, v0.4s, v1.4s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.5 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 2. 2 11.5 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sqrdmlah v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [6] Code Region - smlal2
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,2] D====eeeER. . . . smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,3] D=======eeeER . . . smlal2 v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: [1,0] D==========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D=============eeeER . . smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,2] D==============eeeER. . smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,3] D=================eeeER smlal2 v0.4s, v0.8h, v1.8h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 smlal2 v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [7] Code Region - sqdmlal2
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,2] D=====eeeER . . . sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,3] D========eeeER . . . sqdmlal2 v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: [1,0] D===========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D==============eeeER. . sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,2] D================eeeER . sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,3] D===================eeeER sqdmlal2 v0.4s, v0.8h, v1.8h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.5 0.0 0.0 sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 2. 2 11.5 0.0 0.0 sqdmlal2 v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sqdmlal2 v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [8] Code Region - sadalp
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . sadalp v0.2d, v1.4s
+# CHECK-NEXT: [0,2] D====eeeER. . . . sadalp v0.2d, v1.4s
+# CHECK-NEXT: [0,3] D=======eeeER . . . sadalp v0.2d, v0.4s
+# CHECK-NEXT: [1,0] D==========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D=============eeeER . . sadalp v0.2d, v1.4s
+# CHECK-NEXT: [1,2] D==============eeeER. . sadalp v0.2d, v1.4s
+# CHECK-NEXT: [1,3] D=================eeeER sadalp v0.2d, v0.4s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 sadalp v0.2d, v1.4s
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 sadalp v0.2d, v1.4s
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 sadalp v0.2d, v0.4s
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [9] Code Region - ssra
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeER . . . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeER . . . . ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: [0,2] D=====eeeER . . . ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: [0,3] D========eeeER . . . ssra v0.2d, v0.2d, #1
+# CHECK-NEXT: [1,0] D===========eeeER . . mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D==============eeeER. . ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: [1,2] D================eeeER . ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: [1,3] D===================eeeER ssra v0.2d, v0.2d, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.5 0.0 0.0 ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: 2. 2 11.5 0.0 0.0 ssra v0.2d, v1.2d, #1
+# CHECK-NEXT: 3. 2 14.5 0.0 0.0 ssra v0.2d, v0.2d, #1
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [10] Code Region - fcmla
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla v0.2d, v0.2d, v1.2d, #90
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D================eeeeER . . fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: [1,2] D==================eeeeER. . fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: [1,3] D======================eeeeER fcmla v0.2d, v0.2d, v1.2d, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fcmla v0.2d, v0.2d, v1.2d, #90
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [11] Code Region - fmla
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 600
+# CHECK-NEXT: Total Cycles: 1703
+# CHECK-NEXT: Total uOps: 600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.35
+# CHECK-NEXT: IPC: 0.35
+# CHECK-NEXT: Block RThroughput: 1.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeER . . . . . .. fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [0,1] D=eeeeER . . . . . .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [0,2] D=====eeER. . . . . .. fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmla v0.2d, v0.2d, v1.2d
+# CHECK-NEXT: [1,0] D=================eeeER . . .. fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [1,1] D==================eeeeER. . .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [1,2] .D=====================eeER . .. fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: [1,5] .D=============================eeeeER fmla v0.2d, v0.2d, v1.2d
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: 2. 2 14.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d
+# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmla v0.2d, v0.2d, v1.2d
+# CHECK-NEXT: 12 15.0 0.1 0.0 <total>
+
+# CHECK: [12] Code Region - fmlal
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 600
+# CHECK-NEXT: Total Cycles: 1903
+# CHECK-NEXT: Total uOps: 600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.32
+# CHECK-NEXT: IPC: 0.32
+# CHECK-NEXT: Block RThroughput: 1.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 0
+
+# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . . . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [0,2] D=======eeER . . . . . . fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [0,3] D=========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [0,4] D===========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [0,5] D===============eeeeER . . . . fmlal v0.4s, v0.4h, v1.4h
+# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [1,1] D======================eeeeER . . . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [1,2] .D=========================eeER . . fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [1,3] .D===========================eeeeER. . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [1,4] .D=============================eeeeER . fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: [1,5] .D=================================eeeeER fmlal v0.4s, v0.4h, v1.4h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1. 2 13.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: 2. 2 17.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3. 2 19.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: 4. 2 21.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h
+# CHECK-NEXT: 5. 2 25.0 0.0 0.0 fmlal v0.4s, v0.4h, v1.4h
+# CHECK-NEXT: 12 17.7 0.1 0.0 <total>
+
+# CHECK: [13] Code Region - bfmlalb
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [0,3] D=========eeeeER . . . bfmlalb v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: [1,1] D================eeeeER . . bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,2] D==================eeeeER. . bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: [1,3] D======================eeeeER bfmlalb v0.4s, v0.8h, v1.8h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 bfmlalb v0.4s, v0.8h, v1.8h
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [14] Code Region - frecps
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 1.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeER . . . . fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [0,1] D===eeeeER. . . . frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: [0,2] D=====eeeeER . . . frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: [0,3] D=======eeeeER . . . frecps v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: [1,0] D===========eeeER . . fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: [1,1] D==============eeeeER . frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: [1,2] D================eeeeER . frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: [1,3] D==================eeeeER frecps v0.4s, v0.4s, v1.4s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1. 2 9.5 0.0 0.0 frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: 2. 2 11.5 0.0 0.0 frecps v0.4s, v1.4s, v0.4s
+# CHECK-NEXT: 3. 2 13.5 0.0 0.0 frecps v0.4s, v0.4s, v1.4s
+# CHECK-NEXT: 8 10.3 0.1 0.0 <total>
+
+# CHECK: [15] Code Region - Z saba
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 903
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.55
+# CHECK-NEXT: IPC: 0.44
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0
+
+# CHECK: [0,0] DeeeeER . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeER . . . saba z0.d, z1.d, z2.d
+# CHECK-NEXT: [0,2] D=====eeER. . . saba z0.d, z1.d, z2.d
+# CHECK-NEXT: [0,3] D=======eeER . . saba z0.d, z0.d, z1.d
+# CHECK-NEXT: [1,0] D=========eeeeER . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D=============eeER . saba z0.d, z1.d, z2.d
+# CHECK-NEXT: [1,2] .D=============eeER . saba z0.d, z1.d, z2.d
+# CHECK-NEXT: [1,3] .D===============eeER saba z0.d, z0.d, z1.d
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 5.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 9.5 0.0 0.0 saba z0.d, z1.d, z2.d
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 saba z0.d, z1.d, z2.d
+# CHECK-NEXT: 3. 2 12.0 0.0 0.0 saba z0.d, z0.d, z1.d
+# CHECK-NEXT: 8 9.3 0.1 0.0 <total>
+
+# CHECK: [16] Code Region - Z sabalb
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,2] D=====eeeER . . . sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,3] D========eeeER . . . sabalb z0.d, z0.s, z1.s
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,2] .D===============eeeER . sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,3] .D==================eeeER sabalb z0.d, z0.s, z1.s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sabalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sabalb z0.d, z0.s, z1.s
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [17] Code Region - Z sadalp
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: [0,2] D=====eeeER . . . sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: [0,3] D========eeeER . . . sadalp z0.d, p0/m, z0.s
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: [1,2] .D===============eeeER . sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: [1,3] .D==================eeeER sadalp z0.d, p0/m, z0.s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sadalp z0.d, p0/m, z1.s
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sadalp z0.d, p0/m, z0.s
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [18] Code Region - Z ssra
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1203
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.42
+# CHECK-NEXT: IPC: 0.33
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0123456
+
+# CHECK: [0,0] DeeeeER . . . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . .. ssra z0.d, z1.d, #1
+# CHECK-NEXT: [0,2] D======eeeER . . .. ssra z0.d, z1.d, #1
+# CHECK-NEXT: [0,3] D=========eeeER. . .. ssra z0.d, z0.d, #1
+# CHECK-NEXT: [1,0] D============eeeeER . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeER .. ssra z0.d, z1.d, #1
+# CHECK-NEXT: [1,2] .D=================eeeER .. ssra z0.d, z1.d, #1
+# CHECK-NEXT: [1,3] .D====================eeeER ssra z0.d, z0.d, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 11.0 0.0 0.0 ssra z0.d, z1.d, #1
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 ssra z0.d, z1.d, #1
+# CHECK-NEXT: 3. 2 15.5 0.0 0.0 ssra z0.d, z0.d, #1
+# CHECK-NEXT: 8 11.5 0.1 0.0 <total>
+
+# CHECK: [19] Code Region - Z cdot.s
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: [0,2] D=====eeeER . . . cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: [0,3] D========eeeER . . . cdot z0.s, z0.b, z1.b, #90
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: [1,2] .D===============eeeER . cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: [1,3] .D==================eeeER cdot z0.s, z0.b, z1.b, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 cdot z0.s, z1.b, z2.b, #90
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 cdot z0.s, z0.b, z1.b, #90
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [20] Code Region - Z cdot.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: [0,2] D=====eeeER . . . cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: [0,3] D========eeeER . . . cdot z0.d, z0.h, z1.h, #90
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: [1,2] .D===============eeeER . cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: [1,3] .D==================eeeER cdot z0.d, z0.h, z1.h, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 cdot z0.d, z1.h, z2.h, #90
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 cdot z0.d, z0.h, z1.h, #90
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [21] Code Region - Z cmla.b
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: [0,2] D=====eeeER . . . cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: [0,3] D========eeeER . . . cmla z0.b, z0.b, z1.b, #90
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: [1,2] .D===============eeeER . cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: [1,3] .D==================eeeER cmla z0.b, z0.b, z1.b, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 cmla z0.b, z1.b, z2.b, #90
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 cmla z0.b, z0.b, z1.b, #90
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [22] Code Region - Z cmla.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1403
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.29
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeER . . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeeER . . . . cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: [0,2] D======eeeeER . . . . cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: [0,3] D==========eeeeER . . . cmla z0.d, z0.d, z1.d, #90
+# CHECK-NEXT: [1,0] D==============eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D==================eeeeER. . cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: [1,2] .D===================eeeeER . cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: [1,3] .D=======================eeeeER cmla z0.d, z0.d, z1.d, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 12.0 0.0 0.0 cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: 2. 2 13.5 0.0 0.0 cmla z0.d, z1.d, z2.d, #90
+# CHECK-NEXT: 3. 2 17.5 0.0 0.0 cmla z0.d, z0.d, z1.d, #90
+# CHECK-NEXT: 8 12.8 0.1 0.0 <total>
+
+# CHECK: [23] Code Region - Z sdot.s
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: [0,2] D=====eeeER . . . sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: [0,3] D========eeeER . . . sdot z0.s, z0.b, z1.b
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: [1,2] .D===============eeeER . sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: [1,3] .D==================eeeER sdot z0.s, z0.b, z1.b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sdot z0.s, z1.b, z2.b
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sdot z0.s, z0.b, z1.b
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [24] Code Region - Z sudot
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: [0,2] D=====eeeER . . . sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: [0,3] D========eeeER . . . sdot z0.s, z0.b, z1.b[1]
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: [1,2] .D===============eeeER . sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: [1,3] .D==================eeeER sdot z0.s, z0.b, z1.b[1]
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sdot z0.s, z1.b, z2.b[1]
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sdot z0.s, z0.b, z1.b[1]
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [25] Code Region - Z sdot.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: [0,2] D=====eeeER . . . sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: [0,3] D========eeeER . . . sdot z0.d, z0.h, z1.h
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: [1,2] .D===============eeeER . sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: [1,3] .D==================eeeER sdot z0.d, z0.h, z1.h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sdot z0.d, z1.h, z2.h
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sdot z0.d, z0.h, z1.h
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [26] Code Region - Z smmla
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1003
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.40
+# CHECK-NEXT: IPC: 0.40
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012
+
+# CHECK: [0,0] DeeeER . . . . mul z0.s, z0.s, z0.s
+# CHECK-NEXT: [0,1] D===eeeER . . . . smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: [0,2] D====eeeER. . . . smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: [0,3] D=======eeeER . . . smmla z0.s, z0.b, z1.b
+# CHECK-NEXT: [1,0] D==========eeeER . . mul z0.s, z0.s, z0.s
+# CHECK-NEXT: [1,1] D=============eeeER . . smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: [1,2] D==============eeeER. . smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: [1,3] D=================eeeER smmla z0.s, z0.b, z1.b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.0 0.5 0.0 mul z0.s, z0.s, z0.s
+# CHECK-NEXT: 1. 2 9.0 0.0 0.0 smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: 2. 2 10.0 0.0 0.0 smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: 3. 2 13.0 0.0 0.0 smmla z0.s, z0.b, z1.b
+# CHECK-NEXT: 8 9.5 0.1 0.0 <total>
+
+# CHECK: [27] Code Region - Z mla.b
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: [0,2] D=====eeeER . . . mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: [0,3] D========eeeER . . . mla z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: [1,2] .D===============eeeER . mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: [1,3] .D==================eeeER mla z0.b, p0/m, z0.b, z1.b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 mla z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [28] Code Region - Z mla.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1403
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.29
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeER . . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeeER . . . . mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [0,2] D======eeeeER . . . . mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [0,3] D==========eeeeER . . . mla z0.d, p0/m, z0.d, z1.d
+# CHECK-NEXT: [1,0] D==============eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D==================eeeeER. . mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [1,2] .D===================eeeeER . mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [1,3] .D=======================eeeeER mla z0.d, p0/m, z0.d, z1.d
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 12.0 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: 2. 2 13.5 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: 3. 2 17.5 0.0 0.0 mla z0.d, p0/m, z0.d, z1.d
+# CHECK-NEXT: 8 12.8 0.1 0.0 <total>
+
+# CHECK: [29] Code Region - Z smlalb.s
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1103
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.45
+# CHECK-NEXT: IPC: 0.36
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01234
+
+# CHECK: [0,0] DeeeeER . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . . smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,2] D=====eeeER . . . smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,3] D========eeeER . . . smlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===============eeeER . smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,2] .D===============eeeER . smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,3] .D==================eeeER smlalb z0.s, z0.h, z1.h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 2. 2 11.0 0.0 0.0 smlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 3. 2 14.0 0.0 0.0 smlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: 8 10.5 0.1 0.0 <total>
+
+# CHECK: [30] Code Region - Z smlalb.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1403
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.36
+# CHECK-NEXT: IPC: 0.29
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeER . . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeeER . . . . smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,2] D======eeeeER . . . . smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,3] D==========eeeeER . . . smlalb z0.d, z0.s, z1.s
+# CHECK-NEXT: [1,0] D==============eeeeER . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D==================eeeeER. . smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,2] .D===================eeeeER . smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,3] .D=======================eeeeER smlalb z0.d, z0.s, z1.s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 12.0 0.0 0.0 smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 2. 2 13.5 0.0 0.0 smlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 3. 2 17.5 0.0 0.0 smlalb z0.d, z0.s, z1.s
+# CHECK-NEXT: 8 12.8 0.1 0.0 <total>
+
+# CHECK: [31] Code Region - Z sqdmlalb.s
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1203
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.42
+# CHECK-NEXT: IPC: 0.33
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0123456
+
+# CHECK: [0,0] DeeeeER . . . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . .. sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,2] D======eeeER . . .. sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,3] D=========eeeER. . .. sqdmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: [1,0] D============eeeeER . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeER .. sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,2] .D=================eeeER .. sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,3] .D====================eeeER sqdmlalb z0.s, z0.h, z1.h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 11.0 0.0 0.0 sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sqdmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sqdmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: 8 11.5 0.1 0.0 <total>
+
+# CHECK: [32] Code Region - Z sqdmlalb.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1503
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.33
+# CHECK-NEXT: IPC: 0.27
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 012
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeER . . . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqdmlalb z0.d, z0.s, z1.s
+# CHECK-NEXT: [1,0] D===============eeeeER . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===================eeeeER . . sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: [1,3] .D=========================eeeeER sqdmlalb z0.d, z0.s, z1.s
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 8.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s
+# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqdmlalb z0.d, z0.s, z1.s
+# CHECK-NEXT: 8 13.8 0.1 0.0 <total>
+
+# CHECK: [33] Code Region - Z sqrdmlah.b
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1203
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.42
+# CHECK-NEXT: IPC: 0.33
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0123456
+
+# CHECK: [0,0] DeeeeER . . . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeER. . . .. sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: [0,2] D======eeeER . . .. sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: [0,3] D=========eeeER. . .. sqrdmlah z0.b, z0.b, z1.b
+# CHECK-NEXT: [1,0] D============eeeeER . .. mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeER .. sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: [1,2] .D=================eeeER .. sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: [1,3] .D====================eeeER sqrdmlah z0.b, z0.b, z1.b
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 11.0 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b
+# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sqrdmlah z0.b, z0.b, z1.b
+# CHECK-NEXT: 8 11.5 0.1 0.0 <total>
+
+# CHECK: [34] Code Region - Z sqrdmlah.d
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1503
+# CHECK-NEXT: Total uOps: 500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.33
+# CHECK-NEXT: IPC: 0.27
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 012
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeER . . . . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D====eeeeER . . . . . sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqrdmlah z0.d, z0.d, z1.d
+# CHECK-NEXT: [1,0] D===============eeeeER . . . mul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D===================eeeeER . . sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: [1,3] .D=========================eeeeER sqrdmlah z0.d, z0.d, z1.d
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 8.5 0.5 0.0 mul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d
+# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqrdmlah z0.d, z0.d, z1.d
+# CHECK-NEXT: 8 13.8 0.1 0.0 <total>
+
+# CHECK: [35] Code Region - Z fcmla ZPmZZ
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla z0.d, p0/m, z0.d, z1.d, #90
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: [1,2] D==================eeeeER. . fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: [1,3] D======================eeeeER fcmla z0.d, p0/m, z0.d, z1.d, #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fcmla z0.d, p0/m, z0.d, z1.d, #90
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [36] Code Region - Z fcmla ZZZI
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla z0.s, z0.s, z1.s[1], #90
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: [1,2] D==================eeeeER. . fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: [1,3] D======================eeeeER fcmla z0.s, z0.s, z1.s[1], #90
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #90
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fcmla z0.s, z0.s, z1.s[1], #90
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [37] Code Region - Z fmla ZPmZZ
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, p0/m, z0.d, z1.d
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, p0/m, z0.d, z1.d
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, p0/m, z0.d, z1.d
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [38] Code Region - Z fmla ZZZI
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, z0.d, z1.d[1]
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, z0.d, z1.d[1]
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, z0.d, z1.d[1]
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [39] Code Region - Z fmlalb ZZZ
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,3] D=========eeeeER . . . fmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,2] D==================eeeeER. . fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,3] D======================eeeeER fmlalb z0.s, z0.h, z1.h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
+
+# CHECK: [40] Code Region - Z bfmlalb
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 1303
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.31
+# CHECK-NEXT: IPC: 0.31
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [0,3] D=========eeeeER . . . bfmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: [1,1] D================eeeeER . . bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,2] D==================eeeeER. . bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: [1,3] D======================eeeeER bfmlalb z0.s, z0.h, z1.h
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d
+# CHECK-NEXT: 1. 2 10.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 2. 2 12.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 3. 2 16.5 0.0 0.0 bfmlalb z0.s, z0.h, z1.h
+# CHECK-NEXT: 8 11.8 0.1 0.0 <total>
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fp16fml-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fp16fml-instructions.s
new file mode 100644
index 0000000000000..c9d2c0516cc65
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fp16fml-instructions.s
@@ -0,0 +1,73 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/fp16fml-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 4 0.25 fmlal v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: 1 4 0.25 fmlal v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: 1 4 0.25 fmlal v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: 1 4 0.25 fmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.25 fmlal2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: 1 4 0.25 fmlal2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: 1 4 0.25 fmlal2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: 1 4 0.25 fmlal2 v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.25 fmlsl v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: 1 4 0.25 fmlsl v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: 1 4 0.25 fmlsl v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: 1 4 0.25 fmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.25 fmlsl2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: 1 4 0.25 fmlsl2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: 1 4 0.25 fmlsl2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: 1 4 0.25 fmlsl2 v0.4s, v0.4h, v0.4h
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 4.00 4.00 4.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlal2 v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmlsl2 v0.4s, v0.4h, v0.4h
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fptoint-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fptoint-instructions.s
new file mode 100644
index 0000000000000..9cdbb49da72b9
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-fptoint-instructions.s
@@ -0,0 +1,65 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/fptoint-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 2 4 0.50 frint32x v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frint32x v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 frint32x v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frint32z v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frint32z v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 frint32z v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frint64x v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frint64x v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 frint64x v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frint64z v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frint64z v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 frint64z v0.4s, v0.4s
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 5.00 5.00 5.00 5.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint32x v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frint32x v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint32x v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint32z v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frint32z v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint32z v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint64x v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frint64x v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint64x v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint64z v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frint64z v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frint64z v0.4s, v0.4s
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-i8mm-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-i8mm-instructions.s
new file mode 100644
index 0000000000000..1fcf332f584be
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-i8mm-instructions.s
@@ -0,0 +1,59 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/i8mm-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 3 0.25 smmla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 sudot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 sudot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 ummla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 usdot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 usdot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 usdot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 usdot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 usmmla v0.4s, v0.16b, v0.16b
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.25 2.25 2.25 2.25
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smmla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sudot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sudot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ummla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usdot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usdot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usdot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usdot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usmmla v0.4s, v0.16b, v0.16b
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-js-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-js-instructions.s
new file mode 100644
index 0000000000000..13dbee5d90b8d
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-js-instructions.s
@@ -0,0 +1,43 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/js-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 5 0.50 fjcvtzs w25, d26
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - fjcvtzs w25, d26
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-neon-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-neon-instructions.s
new file mode 100644
index 0000000000000..e018c0160bcde
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-neon-instructions.s
@@ -0,0 +1,3159 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/neon-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.25 abs d29, d24
+# CHECK-NEXT: 1 1 0.25 abs v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 abs v0.2d, v0.2d
+# CHECK-NEXT: 1 1 0.25 abs v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 abs v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 abs v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 abs v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 abs v0.8h, v0.8h
+# CHECK-NEXT: 1 1 0.25 add d17, d31, d29
+# CHECK-NEXT: 1 1 0.25 add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 addp v7.2s, v1.2s, v2.2s
+# CHECK-NEXT: 1 2 0.25 addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 addp d1, v14.2d
+# CHECK-NEXT: 1 3 0.25 addv s0, v0.4s
+# CHECK-NEXT: 1 3 0.25 addv h0, v0.4h
+# CHECK-NEXT: 1 3 0.25 addv h0, v0.8h
+# CHECK-NEXT: 1 3 0.25 addv b0, v0.8b
+# CHECK-NEXT: 1 3 0.25 addv b0, v0.16b
+# CHECK-NEXT: 1 2 0.25 aesd v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 aese v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 aesimc v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 aesmc v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 bic v0.4h, #15, lsl #8
+# CHECK-NEXT: 1 1 0.25 bic v23.8h, #101
+# CHECK-NEXT: 1 1 0.25 bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 bic v25.16b, v10.16b, v9.16b
+# CHECK-NEXT: 1 1 0.25 bic v24.2s, #70
+# CHECK-NEXT: 1 1 0.25 bit v5.8b, v12.8b, v22.8b
+# CHECK-NEXT: 1 1 0.25 bif v0.8b, v25.8b, v4.8b
+# CHECK-NEXT: 1 1 0.25 bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 bsl v27.16b, v13.16b, v21.16b
+# CHECK-NEXT: 1 1 0.25 cls v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 cls v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 cls v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 cls v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 cls v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 cls v0.8h, v0.8h
+# CHECK-NEXT: 1 1 0.25 clz v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 clz v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 clz v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 clz v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 clz v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 clz v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 cmeq v9.8h, v16.8h, v24.8h
+# CHECK-NEXT: 1 2 0.25 cmeq v14.4h, v18.4h, #0
+# CHECK-NEXT: 1 2 0.25 cmeq d20, d21, #0
+# CHECK-NEXT: 1 2 0.25 cmeq d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmeq v0.16b, v0.16b, #0
+# CHECK-NEXT: 1 2 0.25 cmeq v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 cmge v22.8h, v16.8h, v3.8h
+# CHECK-NEXT: 1 2 0.25 cmge v22.16b, v30.16b, #0
+# CHECK-NEXT: 1 2 0.25 cmge d20, d21, #0
+# CHECK-NEXT: 1 2 0.25 cmge d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmge v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 cmge v0.8b, v0.8b, #0
+# CHECK-NEXT: 1 2 0.25 cmgt v3.2d, v29.2d, v11.2d
+# CHECK-NEXT: 1 2 0.25 cmgt d20, d21, #0
+# CHECK-NEXT: 1 2 0.25 cmgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmgt v0.2s, v0.2s, #0
+# CHECK-NEXT: 1 2 0.25 cmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 cmhi v28.4h, v25.4h, v21.4h
+# CHECK-NEXT: 1 2 0.25 cmhi d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmhi v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 cmhs d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmhs v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 cmle v21.2s, v19.2s, #0
+# CHECK-NEXT: 1 2 0.25 cmle d20, d21, #0
+# CHECK-NEXT: 1 2 0.25 cmle v0.2d, v0.2d, #0
+# CHECK-NEXT: 1 2 0.25 cmlt v26.4h, v12.4h, #0
+# CHECK-NEXT: 1 2 0.25 cmlt d20, d21, #0
+# CHECK-NEXT: 1 2 0.25 cmlt v0.8h, v0.8h, #0
+# CHECK-NEXT: 1 2 0.25 cmtst d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 cmtst v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 cmtst v13.2d, v13.2d, v13.2d
+# CHECK-NEXT: 1 2 0.25 cnt v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 cnt v0.8b, v0.8b
+# CHECK-NEXT: 4 6 0.50 dup v0.16b, w28
+# CHECK-NEXT: 4 6 0.50 dup v0.2d, x28
+# CHECK-NEXT: 4 6 0.50 dup v0.2s, w28
+# CHECK-NEXT: 4 6 0.50 dup v0.4h, w28
+# CHECK-NEXT: 4 6 0.50 dup v0.4s, w28
+# CHECK-NEXT: 4 6 0.50 dup v0.8b, w28
+# CHECK-NEXT: 4 6 0.50 dup v0.8h, w28
+# CHECK-NEXT: 1 2 0.25 mov b0, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 mov d0, v0.d[1]
+# CHECK-NEXT: 1 2 0.25 mov h0, v0.h[1]
+# CHECK-NEXT: 1 2 0.25 mov s0, v0.s[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.16b, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.2d, v0.d[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.2s, v0.s[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.4h, v0.h[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.4s, v0.s[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.8b, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 dup v0.8h, v0.h[1]
+# CHECK-NEXT: 1 1 0.25 eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 ext v0.8b, v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 fabd d29, d24, d20
+# CHECK-NEXT: 1 2 0.25 fabd s29, s24, s20
+# CHECK-NEXT: 1 2 0.25 fabd h27, h20, h17
+# CHECK-NEXT: 1 2 0.25 fabd v13.8h, v28.8h, v12.8h
+# CHECK-NEXT: 1 2 0.25 fabd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 fabs h25, h7
+# CHECK-NEXT: 1 1 0.25 fabs v0.2d, v0.2d
+# CHECK-NEXT: 1 1 0.25 fabs v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 fabs v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 fabs v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 fabs v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 facge d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 facge s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 facge h24, h26, h29
+# CHECK-NEXT: 1 2 0.25 facge v25.4h, v16.4h, v11.4h
+# CHECK-NEXT: 1 2 0.25 facge v19.2s, v24.2s, v5.2s
+# CHECK-NEXT: 1 2 0.25 facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 facgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 facgt s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 facgt h0, h4, h10
+# CHECK-NEXT: 1 2 0.25 facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 facgt v22.8h, v14.8h, v31.8h
+# CHECK-NEXT: 1 2 0.25 facgt v22.4s, v8.4s, v2.4s
+# CHECK-NEXT: 1 2 0.25 fadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 faddp h10, v19.2h
+# CHECK-NEXT: 1 3 0.25 faddp d11, v28.2d
+# CHECK-NEXT: 1 3 0.25 faddp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 faddp v16.2d, v11.2d, v5.2d
+# CHECK-NEXT: 1 2 0.25 fcmeq h30, h6, h1
+# CHECK-NEXT: 1 2 0.25 fcmeq h19, h23, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmeq d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmeq d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 fcmeq s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmeq s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 fcmeq v0.2s, v0.2s, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmeq v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 fcmeq v12.4s, v11.4s, v26.4s
+# CHECK-NEXT: 1 2 0.25 fcmeq v18.2d, v17.2d, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge h10, h23, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge h1, h16, h12
+# CHECK-NEXT: 1 2 0.25 fcmge d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 fcmge s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge v17.2d, v11.2d, v13.2d
+# CHECK-NEXT: 1 2 0.25 fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 fcmge v18.4h, v27.4h, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmge v20.8h, v19.8h, v22.8h
+# CHECK-NEXT: 1 2 0.25 fcmge v17.2s, v11.2s, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt h4, h5, h0
+# CHECK-NEXT: 1 2 0.25 fcmgt h0, h18, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.25 fcmgt s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt s10, s11, s12
+# CHECK-NEXT: 1 2 0.25 fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 fcmgt v24.8h, v24.8h, v28.8h
+# CHECK-NEXT: 1 2 0.25 fcmgt v0.8h, v11.8h, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmgt v19.2d, v31.2d, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle v16.8h, v11.8h, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle v22.4s, v30.4s, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmle h18, h28, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt h23, h7, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt v8.4h, v2.4h, #0.0
+# CHECK-NEXT: 1 2 0.25 fcmlt v7.2d, v16.2d, #0.0
+# CHECK-NEXT: 1 3 0.25 fcvtas d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtas s12, s13
+# CHECK-NEXT: 1 2 0.25 fcvtas h12, h13
+# CHECK-NEXT: 2 4 0.50 fcvtas v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtas v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtas v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtas v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtas v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtau d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtau s12, s13
+# CHECK-NEXT: 1 2 0.25 fcvtau h12, h13
+# CHECK-NEXT: 2 4 0.50 fcvtau v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtau v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtau v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtau v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtau v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 fcvtl v0.2d, v0.2s
+# CHECK-NEXT: 2 4 0.50 fcvtl v0.4s, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtl2 v0.2d, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtl2 v0.4s, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtms d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtms s22, s13
+# CHECK-NEXT: 1 2 0.25 fcvtms h22, h13
+# CHECK-NEXT: 2 4 0.50 fcvtms v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtms v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtms v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtms v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtms v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtmu d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtmu s12, s13
+# CHECK-NEXT: 1 2 0.25 fcvtmu h12, h13
+# CHECK-NEXT: 2 4 0.50 fcvtmu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtmu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtmu v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtmu v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtmu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtn v0.2s, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtn v0.4h, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtn2 v0.4s, v0.2d
+# CHECK-NEXT: 2 4 0.50 fcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 3 0.25 fcvtns d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtns s22, s13
+# CHECK-NEXT: 1 2 0.25 fcvtns h22, h13
+# CHECK-NEXT: 2 4 0.50 fcvtns v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtns v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtns v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtns v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtns v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtnu d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtnu s12, s13
+# CHECK-NEXT: 1 2 0.25 fcvtnu h12, h13
+# CHECK-NEXT: 2 4 0.50 fcvtnu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtnu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtnu v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtnu v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtnu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtps d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtps s22, s13
+# CHECK-NEXT: 1 2 0.25 fcvtps h22, h13
+# CHECK-NEXT: 2 4 0.50 fcvtps v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtps v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtps v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtps v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtps v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtpu d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtpu s12, s13
+# CHECK-NEXT: 1 2 0.25 fcvtpu h12, h13
+# CHECK-NEXT: 2 4 0.50 fcvtpu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtpu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtpu v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 fcvtpu v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtpu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 fcvtxn s22, d13
+# CHECK-NEXT: 2 4 0.50 fcvtxn v0.2s, v0.2d
+# CHECK-NEXT: 2 4 0.50 fcvtxn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 3 0.25 fcvtzs d21, d12, #1
+# CHECK-NEXT: 1 3 0.25 fcvtzs d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtzs s12, s13
+# CHECK-NEXT: 1 3 0.25 fcvtzs s21, s12, #1
+# CHECK-NEXT: 1 2 0.25 fcvtzs h21, h14
+# CHECK-NEXT: 1 3 0.25 fcvtzs h21, h12, #1
+# CHECK-NEXT: 2 4 0.50 fcvtzs v0.2d, v0.2d
+# CHECK-NEXT: 2 4 0.50 fcvtzs v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 fcvtzs v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtzs v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 fcvtzs v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 fcvtzs v20.4h, v24.4h, #11
+# CHECK-NEXT: 2 4 0.50 fcvtzs v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtzs v0.4s, v0.4s, #3
+# CHECK-NEXT: 2 4 0.50 fcvtzs v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 fcvtzs v18.8h, v10.8h, #7
+# CHECK-NEXT: 1 3 0.25 fcvtzu d21, d12, #1
+# CHECK-NEXT: 1 3 0.25 fcvtzu d21, d14
+# CHECK-NEXT: 1 3 0.25 fcvtzu s12, s13
+# CHECK-NEXT: 1 3 0.25 fcvtzu s21, s12, #1
+# CHECK-NEXT: 1 2 0.25 fcvtzu h12, h13
+# CHECK-NEXT: 1 3 0.25 fcvtzu h21, h12, #1
+# CHECK-NEXT: 2 4 0.50 fcvtzu v0.2d, v0.2d
+# CHECK-NEXT: 2 4 0.50 fcvtzu v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 fcvtzu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fcvtzu v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 fcvtzu v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 fcvtzu v19.4h, v26.4h, #9
+# CHECK-NEXT: 2 4 0.50 fcvtzu v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 fcvtzu v0.4s, v0.4s, #3
+# CHECK-NEXT: 2 4 0.50 fcvtzu v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 fcvtzu v27.8h, v6.8h, #11
+# CHECK-NEXT: 1 9 0.50 fdiv v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 0.25 fdiv v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.25 fdiv v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 7 0.50 fdiv v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 5 0.50 fdiv v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 fmax v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 fmax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 fmax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 fmaxnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 fmaxnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 fmaxnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fmaxnmp h25, v19.2h
+# CHECK-NEXT: 1 3 0.25 fmaxnmp d17, v29.2d
+# CHECK-NEXT: 1 3 0.25 fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fmaxnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fmaxnmv h0, v13.4h
+# CHECK-NEXT: 1 3 0.25 fmaxnmv h12, v11.8h
+# CHECK-NEXT: 1 3 0.25 fmaxnmv s28, v31.4s
+# CHECK-NEXT: 1 3 0.25 fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fmaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fmaxp h15, v25.2h
+# CHECK-NEXT: 1 3 0.25 fmaxp s6, v2.2s
+# CHECK-NEXT: 1 3 0.25 fmaxv h0, v0.4h
+# CHECK-NEXT: 1 3 0.25 fmaxv h0, v0.8h
+# CHECK-NEXT: 1 3 0.25 fmaxv s0, v0.4s
+# CHECK-NEXT: 1 2 0.25 fmin v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 fmin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 fmin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 fminnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 fminnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 fminnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fminnmp h20, v14.2h
+# CHECK-NEXT: 1 3 0.25 fminnmp d15, v8.2d
+# CHECK-NEXT: 1 3 0.25 fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fminnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fminnmv h19, v25.4h
+# CHECK-NEXT: 1 3 0.25 fminnmv h23, v17.8h
+# CHECK-NEXT: 1 3 0.25 fminnmv s29, v17.4s
+# CHECK-NEXT: 1 3 0.25 fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fminp h7, v10.2h
+# CHECK-NEXT: 1 3 0.25 fminp s17, v7.2s
+# CHECK-NEXT: 1 3 0.25 fminv h3, v30.4h
+# CHECK-NEXT: 1 3 0.25 fminv h29, v12.8h
+# CHECK-NEXT: 1 3 0.25 fminv s16, v19.4s
+# CHECK-NEXT: 1 4 0.25 fmla d0, d1, v0.d[1]
+# CHECK-NEXT: 1 4 0.25 fmla h23, h24, v15.h[4]
+# CHECK-NEXT: 1 4 0.25 fmla s0, s1, v0.s[3]
+# CHECK-NEXT: 1 4 0.25 fmla v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.25 fmla v29.8h, v15.8h, v10.h[4]
+# CHECK-NEXT: 1 4 0.25 fmla v2.2s, v16.2s, v28.s[0]
+# CHECK-NEXT: 1 4 0.25 fmla v14.4s, v14.4s, v5.s[3]
+# CHECK-NEXT: 1 4 0.25 fmla v1.4s, v24.4s, v12.4s
+# CHECK-NEXT: 1 4 0.25 fmla v10.2d, v14.2d, v21.d[1]
+# CHECK-NEXT: 1 4 0.25 fmls d0, d4, v0.d[1]
+# CHECK-NEXT: 1 4 0.25 fmls h8, h14, v7.h[4]
+# CHECK-NEXT: 1 4 0.25 fmls s3, s5, v0.s[3]
+# CHECK-NEXT: 1 4 0.25 fmls v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.25 fmls v30.8h, v18.8h, v4.h[6]
+# CHECK-NEXT: 1 4 0.25 fmls v10.2s, v27.2s, v0.s[0]
+# CHECK-NEXT: 1 4 0.25 fmls v27.4s, v7.4s, v24.s[0]
+# CHECK-NEXT: 1 4 0.25 fmls v10.2d, v22.2d, v29.d[0]
+# CHECK-NEXT: 1 4 0.25 fmls v6.8h, v15.8h, v23.8h
+# CHECK-NEXT: 1 2 0.25 fmov v0.2d, #-1.25000000
+# CHECK-NEXT: 1 2 0.25 fmov v0.2s, #13.00000000
+# CHECK-NEXT: 1 2 0.25 fmov v0.4s, #1.00000000
+# CHECK-NEXT: 1 3 0.25 fmul h18, h4, v7.h[3]
+# CHECK-NEXT: 1 3 0.25 fmul v10.4h, v2.4h, v7.h[5]
+# CHECK-NEXT: 1 3 0.25 fmul v5.2s, v12.2s, v9.s[0]
+# CHECK-NEXT: 1 3 0.25 fmul v15.4s, v30.4s, v2.s[3]
+# CHECK-NEXT: 1 3 0.25 fmul v11.2d, v31.2d, v24.d[1]
+# CHECK-NEXT: 1 3 0.25 fmul h28, h14, h3
+# CHECK-NEXT: 1 3 0.25 fmul d0, d1, v0.d[1]
+# CHECK-NEXT: 1 3 0.25 fmul s0, s1, v0.s[3]
+# CHECK-NEXT: 1 3 0.25 fmul v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fmulx d0, d4, v0.d[1]
+# CHECK-NEXT: 1 2 0.25 fmulx d23, d11, d1
+# CHECK-NEXT: 1 2 0.25 fmulx s20, s22, s15
+# CHECK-NEXT: 1 3 0.25 fmulx h18, h17, v7.h[1]
+# CHECK-NEXT: 1 2 0.25 fmulx h20, h25, h0
+# CHECK-NEXT: 1 3 0.25 fmulx s3, s5, v0.s[3]
+# CHECK-NEXT: 1 3 0.25 fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 fmulx v28.4h, v25.4h, v15.h[1]
+# CHECK-NEXT: 1 3 0.25 fmulx v3.2s, v22.2s, v23.s[3]
+# CHECK-NEXT: 1 3 0.25 fmulx v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 fmulx v5.4s, v28.4s, v15.s[3]
+# CHECK-NEXT: 1 3 0.25 fmulx v22.2d, v18.2d, v25.d[1]
+# CHECK-NEXT: 1 1 0.25 fneg v0.2d, v0.2d
+# CHECK-NEXT: 1 1 0.25 fneg v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 fneg v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 fneg v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 fneg v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 frecpe h20, h8
+# CHECK-NEXT: 1 2 0.25 frecpe d13, d13
+# CHECK-NEXT: 1 2 0.25 frecpe s19, s14
+# CHECK-NEXT: 2 4 0.50 frecpe v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frecpe v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frecpe v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frecpe v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frecpe v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 frecps h29, h19, h8
+# CHECK-NEXT: 1 3 0.25 frecpx h18, h11
+# CHECK-NEXT: 1 4 0.25 frecps v12.8h, v25.8h, v4.8h
+# CHECK-NEXT: 1 4 0.25 frecps v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.25 frecps d22, d30, d21
+# CHECK-NEXT: 1 4 0.25 frecps s21, s16, s13
+# CHECK-NEXT: 1 4 0.25 frecps v7.2d, v29.2d, v18.2d
+# CHECK-NEXT: 1 3 0.25 frecpx d16, d19
+# CHECK-NEXT: 1 3 0.25 frecpx s18, s10
+# CHECK-NEXT: 2 4 0.50 frinta v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frinta v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frinta v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frinta v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frinta v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frinti v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frinti v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frinti v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frinti v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frinti v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frintm v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frintm v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frintm v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frintm v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frintm v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frintn v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frintn v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frintn v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frintn v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frintn v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frintp v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frintp v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frintp v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frintp v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frintp v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frintx v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frintx v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frintx v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frintx v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frintx v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 frintz v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frintz v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frintz v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frintz v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 frintz v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 frsqrte h23, h26
+# CHECK-NEXT: 1 2 0.25 frsqrte d21, d12
+# CHECK-NEXT: 1 2 0.25 frsqrte s22, s13
+# CHECK-NEXT: 2 4 0.50 frsqrte v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 frsqrte v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 frsqrte v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 frsqrte v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.25 frsqrts v20.4s, v26.4s, v27.4s
+# CHECK-NEXT: 1 4 0.25 frsqrts v8.4h, v9.4h, v30.4h
+# CHECK-NEXT: 2 4 0.50 frsqrte v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 frsqrts h28, h26, h1
+# CHECK-NEXT: 1 4 0.25 frsqrts d8, d22, d18
+# CHECK-NEXT: 1 4 0.25 frsqrts s21, s5, s12
+# CHECK-NEXT: 1 4 0.25 frsqrts v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 fsqrt v0.2d, v0.2d
+# CHECK-NEXT: 1 6 0.25 fsqrt v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.25 fsqrt v0.4h, v0.4h
+# CHECK-NEXT: 1 7 0.50 fsqrt v0.4s, v0.4s
+# CHECK-NEXT: 1 5 0.50 fsqrt v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 fsub v13.8h, v15.8h, v17.8h
+# CHECK-NEXT: 1 2 0.25 fsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 0.33 * ld1 { v0.16b }, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v0.16b, v1.16b }, [x14]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v19.16b, v20.16b, v21.16b }, [x10]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v13.16b, v14.16b, v15.16b, v16.16b }, [x9]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v24.8h }, [x27]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v1.8h, v2.8h }, [x27]
+# CHECK-NEXT: 2 6 0.33 * ld1 { v0.8h, v1.8h }, [sp], #32
+# CHECK-NEXT: 2 7 0.67 * ld1 { v21.8h, v22.8h, v23.8h }, [x22]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v0.8h, v1.8h, v2.8h, v3.8h }, [x21]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v3.4s }, [x4]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v11.4s, v12.4s }, [x30]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v0.4s, v1.4s, v2.4s }, [x24]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v15.4s, v16.4s, v17.4s, v18.4s }, [x28]
+# CHECK-NEXT: 3 7 0.67 * ld1 { v0.4s, v1.4s, v2.4s }, [x0], #48
+# CHECK-NEXT: 1 6 0.33 * ld1 { v3.2d }, [x28]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v13.2d, v14.2d }, [x13]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v12.2d, v13.2d, v14.2d }, [x15]
+# CHECK-NEXT: 3 7 0.67 * ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: 2 7 0.67 * ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: 2 6 0.33 * ld1 { v0.1d }, [x15], x2
+# CHECK-NEXT: 1 6 0.33 * ld1 { v27.1d, v28.1d }, [x7]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v14.1d, v15.1d, v16.1d }, [x3]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v22.1d, v23.1d, v24.1d, v25.1d }, [x4]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v0.2s, v1.2s }, [x15]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v16.2s, v17.2s, v18.2s }, [x27]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v21.2s, v22.2s, v23.2s, v24.2s }, [x21]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v25.4h, v26.4h }, [x3]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v20.4h, v21.4h, v22.4h, v23.4h }, [x15]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v0.4h, v1.4h, v2.4h }, [sp]
+# CHECK-NEXT: 1 6 0.33 * ld1 { v24.8b, v25.8b }, [x6]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v7.8b, v8.8b, v9.8b }, [x12]
+# CHECK-NEXT: 2 7 0.67 * ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x13]
+# CHECK-NEXT: 2 6 0.33 * ld1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: 2 7 0.67 * ld1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: 3 7 0.67 * ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: 2 8 0.33 * ld1 { v0.b }[7], [x0]
+# CHECK-NEXT: 3 8 0.33 * ld1 { v0.h }[3], [x0], #2
+# CHECK-NEXT: 2 8 0.33 * ld1 { v18.h }[3], [x1]
+# CHECK-NEXT: 2 8 0.33 * ld1 { v0.s }[1], [x15]
+# CHECK-NEXT: 3 8 0.33 * ld1 { v0.d }[0], [x15], #8
+# CHECK-NEXT: 2 8 0.33 * ld1 { v11.d }[0], [x13]
+# CHECK-NEXT: 2 6 0.33 * ld1 { v0.8h }, [x15], x2
+# CHECK-NEXT: 1 6 0.33 * ld1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: 2 8 0.33 * ld1 { v0.b }[9], [x0]
+# CHECK-NEXT: 3 8 0.33 * ld1 { v0.b }[9], [x0], #1
+# CHECK-NEXT: 2 8 0.33 * ld1r { v0.16b }, [x0]
+# CHECK-NEXT: 3 8 0.33 * ld1r { v0.8h }, [x0], #2
+# CHECK-NEXT: 2 8 0.33 * ld1r { v0.4s }, [x15]
+# CHECK-NEXT: 2 8 0.33 * ld1r { v3.1d }, [x15]
+# CHECK-NEXT: 3 8 0.33 * ld1r { v0.2d }, [x15], x16
+# CHECK-NEXT: 2 8 0.33 * ld1r { v18.2d }, [x0]
+# CHECK-NEXT: 2 8 0.33 * ld1r { v8.8b }, [x23]
+# CHECK-NEXT: 2 8 0.33 * ld1r { v28.4h }, [x9]
+# CHECK-NEXT: 2 8 0.33 * ld1r { v3.8h }, [x16]
+# CHECK-NEXT: 2 8 0.33 * ld1r { v10.2s }, [x20]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v0.4h, v1.4h }, [x21]
+# CHECK-NEXT: 4 8 0.67 * ld2 { v8.8h, v9.8h }, [x28]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v2.2s, v3.2s }, [x16]
+# CHECK-NEXT: 4 8 0.67 * ld2 { v22.4s, v23.4s }, [x4]
+# CHECK-NEXT: 4 8 0.67 * ld2 { v22.2d, v23.2d }, [x17]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v29.b, v30.b }[3], [x1]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v26.s, v27.s }[1], [x17]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v1.d, v2.d }[0], [x10]
+# CHECK-NEXT: 4 8 0.67 * ld2 { v0.16b, v1.16b }, [x0]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v13.8b, v14.8b }, [x4]
+# CHECK-NEXT: 4 8 0.50 * ld2 { v0.8b, v1.8b }, [x0], #16
+# CHECK-NEXT: 3 8 0.33 * ld1r { v0.16b }, [x0], #1
+# CHECK-NEXT: 2 8 0.33 * ld1r { v0.8h }, [x15]
+# CHECK-NEXT: 3 8 0.33 * ld1r { v0.8h }, [x15], #2
+# CHECK-NEXT: 5 8 0.67 * ld2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: 3 8 0.50 * ld2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: 3 8 0.50 * ld2 { v0.h, v1.h }[7], [x15]
+# CHECK-NEXT: 4 8 0.50 * ld2 { v0.h, v1.h }[7], [x15], x8
+# CHECK-NEXT: 4 8 0.50 * ld2 { v0.h, v1.h }[7], [x15], #4
+# CHECK-NEXT: 3 8 0.50 * ld2r { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v10.16b, v11.16b }, [x23]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.4h, v1.4h }, [x0], #4
+# CHECK-NEXT: 3 8 0.50 * ld2r { v25.4h, v26.4h }, [x11]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v23.8h, v24.8h }, [x10]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v0.2s, v1.2s }, [sp]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v8.4s, v9.4s }, [x17]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.1d, v1.1d }, [sp], x8
+# CHECK-NEXT: 3 8 0.50 * ld2r { v9.1d, v10.1d }, [x25]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v26.2d, v27.2d }, [x8]
+# CHECK-NEXT: 5 8 0.75 * ld3 { v8.8b, v9.8b, v10.8b }, [x0]
+# CHECK-NEXT: 9 10 1.50 * ld3 { v15.16b, v16.16b, v17.16b }, [x5]
+# CHECK-NEXT: 3 8 0.50 * ld2r { v0.2d, v1.2d }, [x0]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.2d, v1.2d }, [x0], #16
+# CHECK-NEXT: 3 8 0.50 * ld2r { v0.4s, v1.4s }, [sp]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.4s, v1.4s }, [sp], #8
+# CHECK-NEXT: 5 8 0.75 * ld3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 10 10 1.50 * ld3 { v0.8h, v1.8h, v2.8h }, [x15], #48
+# CHECK-NEXT: 9 10 1.50 * ld3 { v7.8h, v8.8h, v9.8h }, [x21]
+# CHECK-NEXT: 5 8 0.75 * ld3 { v16.2s, v17.2s, v18.2s }, [x0]
+# CHECK-NEXT: 9 10 1.50 * ld3 { v12.4s, v13.4s, v14.4s }, [x25]
+# CHECK-NEXT: 5 8 0.75 * ld3 { v17.b, v18.b, v19.b }[2], [x27]
+# CHECK-NEXT: 5 8 0.75 * ld3 { v18.h, v19.h, v20.h }[5], [x16]
+# CHECK-NEXT: 6 8 1.00 * ld3 { v10.2d, v11.2d, v12.2d }, [x18]
+# CHECK-NEXT: 10 10 1.50 * ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: 5 8 0.75 * ld3 { v0.s, v1.s, v2.s }[3], [sp]
+# CHECK-NEXT: 6 8 0.75 * ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
+# CHECK-NEXT: 5 8 0.75 * ld3 { v5.d, v6.d, v7.d }[1], [x14]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v0.8b, v1.8b, v2.8b }, [x15]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v17.16b, v18.16b, v19.16b }, [x3]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 6 8 0.75 * ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
+# CHECK-NEXT: 5 8 0.75 * ld3r { v3.4h, v4.4h, v5.4h }, [x1]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v6.8h, v7.8h, v8.8h }, [x28]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v0.2s, v1.2s, v2.2s }, [x0]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v28.4s, v29.4s, v30.4s }, [x2]
+# CHECK-NEXT: 6 8 0.75 * ld3r { v0.1d, v1.1d, v2.1d }, [x0], x0
+# CHECK-NEXT: 5 8 0.75 * ld3r { v1.1d, v2.1d, v3.1d }, [x28]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v8.2d, v9.2d, v10.2d }, [x3]
+# CHECK-NEXT: 7 8 1.00 * ld4 { v6.8b, v7.8b, v8.8b, v9.8b }, [x27]
+# CHECK-NEXT: 12 11 2.00 * ld4 { v11.16b, v12.16b, v13.16b, v14.16b }, [x5]
+# CHECK-NEXT: 7 8 1.00 * ld4 { v21.4h, v22.4h, v23.4h, v24.4h }, [x14]
+# CHECK-NEXT: 12 11 2.00 * ld4 { v9.8h, v10.8h, v11.8h, v12.8h }, [x1]
+# CHECK-NEXT: 12 11 2.00 * ld4 { v17.4s, v18.4s, v19.4s, v20.4s }, [x4]
+# CHECK-NEXT: 5 8 0.75 * ld3r { v0.8b, v1.8b, v2.8b }, [x0]
+# CHECK-NEXT: 6 8 0.75 * ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
+# CHECK-NEXT: 7 8 1.00 * ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 13 11 2.00 * ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: 7 8 1.00 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
+# CHECK-NEXT: 8 9 1.33 * ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x24]
+# CHECK-NEXT: 7 8 1.00 * ld4 { v4.b, v5.b, v6.b, v7.b }[12], [x27]
+# CHECK-NEXT: 7 8 1.00 * ld4 { v5.h, v6.h, v7.h, v8.h }[0], [x4]
+# CHECK-NEXT: 8 8 1.00 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
+# CHECK-NEXT: 8 8 1.00 * ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
+# CHECK-NEXT: 7 8 1.00 * ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x26]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v20.8b, v21.8b, v22.8b, v23.8b }, [x23]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x25]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v16.4h, v17.4h, v18.4h, v19.4h }, [x6]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v0.2d, v1.2d, v2.2d, v3.2d }, [sp]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v4.8h, v5.8h, v6.8h, v7.8h }, [x23]
+# CHECK-NEXT: 7 8 1.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [x30]
+# CHECK-NEXT: 8 8 1.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], #16
+# CHECK-NEXT: 7 8 1.00 * ld4r { v7.4s, v8.4s, v9.4s, v10.4s }, [x23]
+# CHECK-NEXT: 8 8 1.00 * ld4r { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], x8
+# CHECK-NEXT: 8 8 1.00 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
+# CHECK-NEXT: 7 8 1.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 8 8 1.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
+# CHECK-NEXT: 1 3 0.25 mla v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 mla v15.8h, v22.8h, v4.h[3]
+# CHECK-NEXT: 1 3 0.25 mla v28.2s, v10.2s, v2.s[0]
+# CHECK-NEXT: 1 3 0.25 mls v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 mls v25.8h, v29.8h, v0.h[4]
+# CHECK-NEXT: 1 3 0.25 mls v22.2s, v29.2s, v0.s[3]
+# CHECK-NEXT: 1 3 0.25 mls v26.4s, v5.4s, v28.4s
+# CHECK-NEXT: 1 2 0.25 mov b0, v0.b[15]
+# CHECK-NEXT: 1 2 0.25 mov d6, v0.d[1]
+# CHECK-NEXT: 1 2 0.25 mov h2, v0.h[5]
+# CHECK-NEXT: 1 2 0.25 mov s17, v0.s[2]
+# CHECK-NEXT: 1 2 0.25 mov w8, v8.s[0]
+# CHECK-NEXT: 1 2 0.25 mov x30, v18.d[0]
+# CHECK-NEXT: 1 2 0.25 mov v2.b[0], v0.b[0]
+# CHECK-NEXT: 1 2 0.25 mov v2.h[1], v0.h[1]
+# CHECK-NEXT: 1 2 0.25 mov v2.s[2], v0.s[2]
+# CHECK-NEXT: 1 2 0.25 mov v2.d[1], v0.d[1]
+# CHECK-NEXT: 4 6 0.50 mov v0.b[0], w8
+# CHECK-NEXT: 4 6 0.50 mov v0.h[1], w8
+# CHECK-NEXT: 4 6 0.50 mov v0.s[2], w8
+# CHECK-NEXT: 4 6 0.50 mov v0.d[1], x8
+# CHECK-NEXT: 1 1 0.25 mov v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 mov v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 movi d15, #0xff00ff00ff00ff
+# CHECK-NEXT: 1 2 0.25 movi v0.16b, #31
+# CHECK-NEXT: 1 2 0.25 movi v14.8h, #174
+# CHECK-NEXT: 1 2 0.25 movi v13.4h, #74, lsl #8
+# CHECK-NEXT: 1 2 0.25 movi v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT: 1 2 0.25 movi v0.2s, #8, msl #8
+# CHECK-NEXT: 1 2 0.25 movi v19.2s, #226
+# CHECK-NEXT: 1 2 0.25 movi v1.4s, #122, msl #8
+# CHECK-NEXT: 1 2 0.25 movi v0.4s, #255, lsl #24
+# CHECK-NEXT: 1 2 0.25 movi v0.8b, #255
+# CHECK-NEXT: 1 3 0.25 mul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 mul v26.4h, v20.4h, v14.h[5]
+# CHECK-NEXT: 1 3 0.25 mul v5.8h, v21.8h, v3.h[7]
+# CHECK-NEXT: 1 3 0.25 mul v29.2s, v10.2s, v3.s[1]
+# CHECK-NEXT: 1 3 0.25 mul v30.4s, v11.4s, v4.s[0]
+# CHECK-NEXT: 1 3 0.25 mul v30.4s, v11.4s, v4.4s
+# CHECK-NEXT: 1 3 0.25 mul v3.8h, v9.8h, v8.8h
+# CHECK-NEXT: 1 1 0.25 mvni v9.4h, #237
+# CHECK-NEXT: 1 1 0.25 mvni v8.8h, #171, lsl #8
+# CHECK-NEXT: 1 1 0.25 mvni v22.4s, #15, lsl #8
+# CHECK-NEXT: 1 1 0.25 mvni v0.2s, #0
+# CHECK-NEXT: 1 1 0.25 mvni v0.4s, #16, msl #16
+# CHECK-NEXT: 1 1 0.25 neg d29, d24
+# CHECK-NEXT: 1 1 0.25 neg v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 neg v0.2d, v0.2d
+# CHECK-NEXT: 1 1 0.25 neg v0.2s, v0.2s
+# CHECK-NEXT: 1 1 0.25 neg v0.4h, v0.4h
+# CHECK-NEXT: 1 1 0.25 neg v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 neg v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 neg v0.8h, v0.8h
+# CHECK-NEXT: 1 1 0.25 mvn v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 mvn v0.8b, v0.8b
+# CHECK-NEXT: 1 1 0.25 orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 orn v29.8b, v19.8b, v16.8b
+# CHECK-NEXT: 1 1 0.25 mov v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 orr v9.4h, #18
+# CHECK-NEXT: 1 1 0.25 orr v0.8h, #31
+# CHECK-NEXT: 1 1 0.25 orr v4.4s, #0
+# CHECK-NEXT: 1 2 0.25 pmul v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 pmul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 pmull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 raddhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 raddhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 raddhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 rbit v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 rbit v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 rev16 v21.8b, v1.8b
+# CHECK-NEXT: 1 2 0.25 rev16 v30.16b, v31.16b
+# CHECK-NEXT: 1 2 0.25 rev32 v0.4h, v9.4h
+# CHECK-NEXT: 1 2 0.25 rev32 v21.8b, v1.8b
+# CHECK-NEXT: 1 2 0.25 rev32 v30.16b, v31.16b
+# CHECK-NEXT: 1 2 0.25 rev32 v4.8h, v7.8h
+# CHECK-NEXT: 1 2 0.25 rev64 v0.16b, v31.16b
+# CHECK-NEXT: 1 2 0.25 rev64 v1.8b, v9.8b
+# CHECK-NEXT: 1 2 0.25 rev64 v13.4h, v21.4h
+# CHECK-NEXT: 1 2 0.25 rev64 v2.8h, v4.8h
+# CHECK-NEXT: 1 2 0.25 rev64 v4.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 rev64 v6.4s, v8.4s
+# CHECK-NEXT: 1 3 0.25 rshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 rshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 rshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 rshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 rshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 rshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 rsubhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 rsubhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 rsubhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 saba v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 sabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 sabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sabd v12.2s, v11.2s, v27.2s
+# CHECK-NEXT: 1 2 0.25 sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 sabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 sabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 sadalp v0.1d, v0.2s
+# CHECK-NEXT: 1 3 0.25 sadalp v0.2d, v0.4s
+# CHECK-NEXT: 1 3 0.25 sadalp v0.2s, v0.4h
+# CHECK-NEXT: 1 3 0.25 sadalp v0.4h, v0.8b
+# CHECK-NEXT: 1 3 0.25 sadalp v0.4s, v0.8h
+# CHECK-NEXT: 1 3 0.25 sadalp v0.8h, v0.16b
+# CHECK-NEXT: 1 2 0.25 saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 saddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 saddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 saddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 saddlp v0.1d, v0.2s
+# CHECK-NEXT: 1 3 0.25 saddlp v0.2d, v0.4s
+# CHECK-NEXT: 1 3 0.25 saddlp v0.2s, v0.4h
+# CHECK-NEXT: 1 3 0.25 saddlp v0.4h, v0.8b
+# CHECK-NEXT: 1 3 0.25 saddlp v0.4s, v0.8h
+# CHECK-NEXT: 1 3 0.25 saddlp v0.8h, v0.16b
+# CHECK-NEXT: 2 5 0.50 saddlv d0, v0.4s
+# CHECK-NEXT: 3 7 0.75 saddlv s0, v0.4h
+# CHECK-NEXT: 3 7 0.75 saddlv s0, v0.8h
+# CHECK-NEXT: 4 9 1.00 saddlv h0, v0.8b
+# CHECK-NEXT: 4 9 1.00 saddlv h0, v0.16b
+# CHECK-NEXT: 1 1 0.25 saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 1 0.25 saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 1 0.25 saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 1 0.25 saddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 1 0.25 saddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 1 0.25 saddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 3 0.25 scvtf h4, h8, #9
+# CHECK-NEXT: 1 3 0.25 scvtf h5, h14
+# CHECK-NEXT: 1 3 0.25 scvtf d21, d12
+# CHECK-NEXT: 1 3 0.25 scvtf d21, d12, #64
+# CHECK-NEXT: 1 3 0.25 scvtf s22, s13
+# CHECK-NEXT: 1 3 0.25 scvtf s22, s13, #32
+# CHECK-NEXT: 2 4 0.50 scvtf v0.2d, v0.2d
+# CHECK-NEXT: 2 4 0.50 scvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 scvtf v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 scvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 scvtf v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 scvtf v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 scvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 scvtf v25.4h, v13.4h, #8
+# CHECK-NEXT: 2 4 0.50 scvtf v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 scvtf v4.8h, v8.8h, #10
+# CHECK-NEXT: 1 3 0.25 sdot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 sdot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 sdot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 sdot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: 1 2 0.25 shadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 shadd v25.16b, v1.16b, v10.16b
+# CHECK-NEXT: 1 2 0.25 shl d7, d10, #12
+# CHECK-NEXT: 1 2 0.25 shl v23.8b, v18.8b, #6
+# CHECK-NEXT: 1 2 0.25 shl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 shl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 shl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 shl v0.8h, v23.8h, #10
+# CHECK-NEXT: 1 2 0.25 shl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 shll v0.4s, v0.4h, #16
+# CHECK-NEXT: 1 2 0.25 shll v0.8h, v0.8b, #8
+# CHECK-NEXT: 1 2 0.25 shll v0.2d, v0.2s, #32
+# CHECK-NEXT: 1 2 0.25 shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: 1 2 0.25 shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: 1 2 0.25 shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: 1 2 0.25 shrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 shrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 shrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 shsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 shsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 shsub v15.8h, v5.8h, v27.8h
+# CHECK-NEXT: 1 2 0.25 sli d10, d14, #12
+# CHECK-NEXT: 1 2 0.25 sli v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 sli v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 smax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 smax v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 smax v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 smax v30.16b, v3.16b, v30.16b
+# CHECK-NEXT: 1 3 0.25 smaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 smaxp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 smaxp v21.8h, v16.8h, v7.8h
+# CHECK-NEXT: 1 3 0.25 smaxp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 4 12 1.00 smaxv b0, v0.8b
+# CHECK-NEXT: 4 12 1.00 smaxv b0, v0.16b
+# CHECK-NEXT: 3 9 0.75 smaxv h0, v0.4h
+# CHECK-NEXT: 3 9 0.75 smaxv h0, v0.8h
+# CHECK-NEXT: 2 6 0.50 smaxv s0, v0.4s
+# CHECK-NEXT: 1 2 0.25 smin v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 smin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 smin v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 4 12 1.00 sminv b0, v0.8b
+# CHECK-NEXT: 4 12 1.00 sminv b0, v0.16b
+# CHECK-NEXT: 3 9 0.75 sminv h0, v0.4h
+# CHECK-NEXT: 3 9 0.75 sminv h0, v0.8h
+# CHECK-NEXT: 2 6 0.50 sminv s0, v0.4s
+# CHECK-NEXT: 1 3 0.25 smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 smlal v0.2d, v25.2s, v1.s[1]
+# CHECK-NEXT: 1 3 0.25 smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 smlal v16.4s, v9.4h, v11.h[4]
+# CHECK-NEXT: 1 3 0.25 smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 smlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 smlal2 v30.2d, v22.4s, v7.s[2]
+# CHECK-NEXT: 1 3 0.25 smlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 smlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 smlsl v25.2d, v27.2s, v1.s[1]
+# CHECK-NEXT: 1 3 0.25 smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 smlsl v14.4s, v23.4h, v12.h[7]
+# CHECK-NEXT: 1 3 0.25 smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 smlal2 v1.4s, v9.8h, v0.h[6]
+# CHECK-NEXT: 1 3 0.25 smlsl2 v12.4s, v11.8h, v12.h[0]
+# CHECK-NEXT: 1 3 0.25 smlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 smlsl2 v11.2d, v28.4s, v7.s[2]
+# CHECK-NEXT: 1 3 0.25 smlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 smlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 smull v31.2d, v23.2s, v6.s[2]
+# CHECK-NEXT: 1 3 0.25 smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 smull v3.4s, v26.4h, v1.h[5]
+# CHECK-NEXT: 1 3 0.25 smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 smull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 smull2 v11.2d, v1.4s, v7.s[0]
+# CHECK-NEXT: 1 3 0.25 smull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 smull2 v13.4s, v18.8h, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 smull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sqabs b19, b14
+# CHECK-NEXT: 1 2 0.25 sqabs d18, d12
+# CHECK-NEXT: 1 2 0.25 sqabs h21, h15
+# CHECK-NEXT: 1 2 0.25 sqabs s20, s12
+# CHECK-NEXT: 1 2 0.25 sqabs v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sqabs v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqabs v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sqabs v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sqabs v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqabs v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sqabs v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqadd b20, b11, b15
+# CHECK-NEXT: 1 2 0.25 sqadd h12, h18, h10
+# CHECK-NEXT: 1 2 0.25 sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sqadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqdmlal d19, s24, s12
+# CHECK-NEXT: 1 3 0.25 sqdmlal d8, s9, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 sqdmlal s0, h0, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 sqdmlal s17, h27, h12
+# CHECK-NEXT: 1 3 0.25 sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqdmlal v11.2d, v24.2s, v0.s[3]
+# CHECK-NEXT: 1 3 0.25 sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 sqdmlal v20.4s, v30.4h, v12.h[3]
+# CHECK-NEXT: 1 3 0.25 sqdmlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 sqdmlal2 v23.2d, v30.4s, v6.s[0]
+# CHECK-NEXT: 1 3 0.25 sqdmlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 sqdmlal2 v2.4s, v17.8h, v5.h[6]
+# CHECK-NEXT: 1 3 0.25 sqdmulh v8.4h, v16.4h, v5.h[4]
+# CHECK-NEXT: 1 3 0.25 sqdmulh v16.2s, v24.2s, v7.s[2]
+# CHECK-NEXT: 1 3 0.25 sqdmull v8.4s, v19.4h, v1.h[2]
+# CHECK-NEXT: 1 3 0.25 sqdmull v20.2d, v10.2s, v6.s[2]
+# CHECK-NEXT: 1 3 0.25 sqdmull2 v10.4s, v25.8h, v0.h[7]
+# CHECK-NEXT: 1 3 0.25 sqdmull2 v4.2d, v29.4s, v2.s[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmulh v0.8h, v15.8h, v0.h[5]
+# CHECK-NEXT: 1 3 0.25 sqrdmulh v6.2s, v29.2s, v4.s[2]
+# CHECK-NEXT: 1 3 0.25 sqrdmulh v31.2s, v17.2s, v4.2s
+# CHECK-NEXT: 1 3 0.25 sqdmlsl d12, s23, s13
+# CHECK-NEXT: 1 3 0.25 sqdmlsl d8, s9, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 sqdmlsl s0, h0, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 sqdmlsl s14, h12, h25
+# CHECK-NEXT: 1 3 0.25 sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqdmlsl v26.2d, v7.2s, v3.s[0]
+# CHECK-NEXT: 1 3 0.25 sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 sqdmlsl v4.4s, v22.4h, v13.h[2]
+# CHECK-NEXT: 1 3 0.25 sqdmlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 sqdmlsl2 v4.2d, v3.4s, v3.s[2]
+# CHECK-NEXT: 1 3 0.25 sqdmlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 sqdmlsl2 v2.4s, v28.8h, v4.h[6]
+# CHECK-NEXT: 1 3 0.25 sqdmulh h10, h11, h12
+# CHECK-NEXT: 1 3 0.25 sqdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 sqdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 sqdmulh s20, s21, s2
+# CHECK-NEXT: 1 3 0.25 sqdmulh v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 sqdmull d1, s1, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 sqdmull d15, s22, s12
+# CHECK-NEXT: 1 3 0.25 sqdmull s1, h1, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 sqdmull s12, h22, h12
+# CHECK-NEXT: 1 3 0.25 sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 sqdmull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 sqdmull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqneg b19, b14
+# CHECK-NEXT: 1 2 0.25 sqneg d18, d12
+# CHECK-NEXT: 1 2 0.25 sqneg h21, h15
+# CHECK-NEXT: 1 2 0.25 sqneg s20, s12
+# CHECK-NEXT: 1 2 0.25 sqneg v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 sqneg v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqneg v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sqneg v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sqneg v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqneg v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sqneg v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 sqrdmlah h0, h1, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.4h, v1.4h, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.8h, v1.8h, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah s0, s1, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.2s, v1.2s, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.4s, v1.4s, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlah h0, h1, h2
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.4h, v1.4h, v2.4h
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.8h, v1.8h, v2.8h
+# CHECK-NEXT: 1 3 0.25 sqrdmlah s0, s1, s2
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.2s, v1.2s, v2.2s
+# CHECK-NEXT: 1 3 0.25 sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh h0, h1, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.4h, v1.4h, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.8h, v1.8h, v2.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh s0, s1, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.2s, v1.2s, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.4s, v1.4s, v2.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh h0, h1, h2
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.4h, v1.4h, v2.4h
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.8h, v1.8h, v2.8h
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh s0, s1, s2
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.2s, v1.2s, v2.2s
+# CHECK-NEXT: 1 3 0.25 sqrdmlsh v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: 1 3 0.25 sqrdmulh h10, h11, h12
+# CHECK-NEXT: 1 3 0.25 sqrdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: 1 3 0.25 sqrdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 sqrdmulh s20, s21, s2
+# CHECK-NEXT: 1 3 0.25 sqrdmulh v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 sqrdmulh v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 sqrshl d31, d31, d31
+# CHECK-NEXT: 1 3 0.25 sqrshl h3, h4, h15
+# CHECK-NEXT: 1 3 0.25 sqrshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 sqrshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 sqrshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sqshl s17, s4, s23
+# CHECK-NEXT: 1 2 0.25 sqsub b3, b13, b12
+# CHECK-NEXT: 1 2 0.25 sqsub v20.8h, v18.8h, v12.8h
+# CHECK-NEXT: 1 3 0.25 sqrshrn b10, h13, #2
+# CHECK-NEXT: 1 3 0.25 sqrshrn h15, s10, #6
+# CHECK-NEXT: 1 3 0.25 sqrshrn s15, d12, #9
+# CHECK-NEXT: 1 3 0.25 sqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun b17, h10, #6
+# CHECK-NEXT: 1 3 0.25 sqrshrun h10, s13, #15
+# CHECK-NEXT: 1 3 0.25 sqrshrun s22, d16, #31
+# CHECK-NEXT: 1 3 0.25 sqrshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshl b11, b19, #7
+# CHECK-NEXT: 1 2 0.25 sqshl d15, d16, #51
+# CHECK-NEXT: 1 2 0.25 sqshl d31, d31, d31
+# CHECK-NEXT: 1 2 0.25 sqshl h13, h18, #11
+# CHECK-NEXT: 1 2 0.25 sqshl h3, h4, h15
+# CHECK-NEXT: 1 2 0.25 sqshl s14, s17, #22
+# CHECK-NEXT: 1 2 0.25 sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v23.16b, v23.16b, v23.16b
+# CHECK-NEXT: 1 2 0.25 sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 sqshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu b15, b18, #6
+# CHECK-NEXT: 1 2 0.25 sqshlu d11, d13, #32
+# CHECK-NEXT: 1 2 0.25 sqshlu h19, h17, #6
+# CHECK-NEXT: 1 2 0.25 sqshlu s16, s14, #25
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 sqshlu v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn b10, h15, #5
+# CHECK-NEXT: 1 2 0.25 sqshrn h17, s10, #4
+# CHECK-NEXT: 1 2 0.25 sqshrn s18, d10, #31
+# CHECK-NEXT: 1 2 0.25 sqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun b15, h10, #7
+# CHECK-NEXT: 1 2 0.25 sqshrun h20, s14, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun s10, d15, #15
+# CHECK-NEXT: 1 2 0.25 sqshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sqshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sqsub s20, s10, s7
+# CHECK-NEXT: 1 2 0.25 sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqsub v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sqxtn b18, h18
+# CHECK-NEXT: 1 2 0.25 sqxtn h20, s17
+# CHECK-NEXT: 1 2 0.25 sqxtn s19, d14
+# CHECK-NEXT: 1 2 0.25 sqxtn v0.2s, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqxtn v0.4h, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqxtn v0.8b, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqxtun b19, h14
+# CHECK-NEXT: 1 2 0.25 sqxtun h21, s15
+# CHECK-NEXT: 1 2 0.25 sqxtun s20, d12
+# CHECK-NEXT: 1 2 0.25 sqxtun v0.2s, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqxtun v0.4h, v0.4s
+# CHECK-NEXT: 1 2 0.25 sqxtun v0.8b, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT: 1 2 0.25 sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT: 1 2 0.25 sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT: 1 2 0.25 srhadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 srhadd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 srhadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sri d10, d12, #14
+# CHECK-NEXT: 1 2 0.25 sri v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 sri v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 srshl d16, d16, d16
+# CHECK-NEXT: 1 3 0.25 srshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 srshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 srshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 srshr d19, d18, #7
+# CHECK-NEXT: 1 3 0.25 srshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 srshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 srsra d15, d11, #19
+# CHECK-NEXT: 1 3 0.25 srsra v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 srsra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sshl d31, d31, d31
+# CHECK-NEXT: 1 2 0.25 sshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 sshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 sshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 sshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 sshll v9.8h, v2.8b, #0
+# CHECK-NEXT: 1 2 0.25 sshll v12.4s, v3.4h, #4
+# CHECK-NEXT: 1 2 0.25 sshll v0.2d, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sshll2 v28.8h, v12.16b, #7
+# CHECK-NEXT: 1 2 0.25 sshll2 v0.4s, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 sshll2 v17.2d, v13.4s, #22
+# CHECK-NEXT: 1 2 0.25 sshr d15, d16, #12
+# CHECK-NEXT: 1 2 0.25 sshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 sshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 ssra d18, d12, #21
+# CHECK-NEXT: 1 3 0.25 ssra v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 ssra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 ssubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 ssubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 ssubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 1 0.25 ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 1 0.25 ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 1 0.25 ssubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 1 0.25 ssubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 1 0.25 ssubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 3 1 0.50 * st1 { v18.8b }, [x15]
+# CHECK-NEXT: 3 1 0.50 * st1 { v8.8b, v9.8b }, [x18]
+# CHECK-NEXT: 6 1 1.00 * st1 { v15.8b, v16.8b, v17.8b }, [x0]
+# CHECK-NEXT: 6 4 1.00 * st1 { v21.8b, v22.8b, v23.8b, v24.8b }, [x14]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.16b }, [x0]
+# CHECK-NEXT: 4 1 1.00 * st1 { v1.16b, v2.16b }, [x4]
+# CHECK-NEXT: 6 2 1.50 * st1 { v27.16b, v28.16b, v29.16b }, [x18]
+# CHECK-NEXT: 8 2 2.00 * st1 { v18.16b, v19.16b, v20.16b, v21.16b }, [x29]
+# CHECK-NEXT: 3 1 0.50 * st1 { v19.4h }, [x7]
+# CHECK-NEXT: 3 1 0.50 * st1 { v22.4h, v23.4h }, [x22]
+# CHECK-NEXT: 6 1 1.00 * st1 { v13.4h, v14.4h, v15.4h }, [x7]
+# CHECK-NEXT: 6 4 1.00 * st1 { v23.4h, v24.4h, v25.4h, v26.4h }, [x24]
+# CHECK-NEXT: 2 1 0.50 * st1 { v27.8h }, [x17]
+# CHECK-NEXT: 6 2 1.50 * st1 { v8.8h, v9.8h, v10.8h }, [x16]
+# CHECK-NEXT: 8 2 2.00 * st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x19]
+# CHECK-NEXT: 3 1 0.50 * st1 { v25.2s }, [x6]
+# CHECK-NEXT: 3 1 0.50 * st1 { v13.2s, v14.2s }, [x9]
+# CHECK-NEXT: 6 1 1.00 * st1 { v12.2s, v13.2s, v14.2s }, [x3]
+# CHECK-NEXT: 6 4 1.00 * st1 { v6.2s, v7.2s, v8.2s, v9.2s }, [x13]
+# CHECK-NEXT: 5 1 1.00 * st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: 2 1 0.50 * st1 { v22.4s }, [x19]
+# CHECK-NEXT: 4 1 1.00 * st1 { v15.4s, v16.4s }, [x12]
+# CHECK-NEXT: 8 2 2.00 * st1 { v26.4s, v27.4s, v28.4s, v29.4s }, [x12]
+# CHECK-NEXT: 3 1 0.50 * st1 { v20.1d }, [x10]
+# CHECK-NEXT: 3 1 0.50 * st1 { v21.1d, v22.1d }, [x29]
+# CHECK-NEXT: 6 1 1.00 * st1 { v5.1d, v6.1d, v7.1d }, [x3]
+# CHECK-NEXT: 6 4 1.00 * st1 { v0.1d, v1.1d, v2.1d, v3.1d }, [x10]
+# CHECK-NEXT: 4 1 1.00 * st1 { v26.2d, v27.2d }, [x28]
+# CHECK-NEXT: 7 2 1.50 * st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: 6 2 1.50 * st1 { v13.2d, v14.2d, v15.2d }, [x27]
+# CHECK-NEXT: 8 2 2.00 * st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1 { v8.2d }, [x15]
+# CHECK-NEXT: 3 1 0.50 * st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: 4 1 1.00 * st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: 5 1 1.00 * st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: 6 2 1.50 * st1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: 7 4 1.00 * st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: 2 1 0.50 * st1 { v1.b }[5], [x1]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.h }[2], [x1]
+# CHECK-NEXT: 2 1 0.50 * st1 { v31.s }[1], [x16]
+# CHECK-NEXT: 3 1 0.50 * st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: 4 1 1.00 * st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.d }[1], [x0]
+# CHECK-NEXT: 3 1 0.50 * st1 { v0.d }[1], [x0], #8
+# CHECK-NEXT: 5 1 1.00 * st2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: 2 1 0.50 * st2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: 4 1 1.00 * st2 { v6.16b, v7.16b }, [x23]
+# CHECK-NEXT: 2 1 0.50 * st2 { v10.4h, v11.4h }, [x18]
+# CHECK-NEXT: 4 1 1.00 * st2 { v10.8h, v11.8h }, [x18]
+# CHECK-NEXT: 2 1 0.50 * st2 { v25.2s, v26.2s }, [x29]
+# CHECK-NEXT: 4 1 1.00 * st2 { v26.4s, v27.4s }, [x14]
+# CHECK-NEXT: 4 1 1.00 * st2 { v10.2d, v11.2d }, [x1]
+# CHECK-NEXT: 2 1 0.50 * st2 { v21.b, v22.b }[15], [x15]
+# CHECK-NEXT: 2 1 0.50 * st2 { v28.h, v29.h }[2], [x6]
+# CHECK-NEXT: 2 1 0.50 * st2 { v0.s, v1.s }[3], [sp]
+# CHECK-NEXT: 3 1 0.50 * st2 { v0.s, v1.s }[3], [sp], #8
+# CHECK-NEXT: 2 1 0.50 * st2 { v17.d, v18.d }[1], [x1]
+# CHECK-NEXT: 8 4 1.00 * st3 { v10.8b, v11.8b, v12.8b }, [x18]
+# CHECK-NEXT: 12 5 1.50 * st3 { v26.16b, v27.16b, v28.16b }, [x4]
+# CHECK-NEXT: 8 4 1.00 * st3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 13 5 1.50 * st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: 12 5 1.50 * st3 { v0.8h, v1.8h, v2.8h }, [x0]
+# CHECK-NEXT: 8 4 1.00 * st3 { v19.2s, v20.2s, v21.2s }, [x30]
+# CHECK-NEXT: 12 5 1.50 * st3 { v24.4s, v25.4s, v26.4s }, [x8]
+# CHECK-NEXT: 12 5 1.50 * st3 { v24.2d, v25.2d, v26.2d }, [x25]
+# CHECK-NEXT: 8 4 1.00 * st3 { v8.b, v9.b, v10.b }[4], [x18]
+# CHECK-NEXT: 8 4 1.00 * st3 { v0.h, v1.h, v2.h }[7], [x15]
+# CHECK-NEXT: 9 4 1.00 * st3 { v0.h, v1.h, v2.h }[7], [x15], #6
+# CHECK-NEXT: 8 4 1.00 * st3 { v9.s, v10.s, v11.s }[2], [x20]
+# CHECK-NEXT: 8 4 1.00 * st3 { v16.d, v17.d, v18.d }[0], [x13]
+# CHECK-NEXT: 8 4 1.00 * st4 { v17.8b, v18.8b, v19.8b, v20.8b }, [x8]
+# CHECK-NEXT: 16 5 2.00 * st4 { v7.16b, v8.16b, v9.16b, v10.16b }, [x15]
+# CHECK-NEXT: 8 4 1.00 * st4 { v5.4h, v6.4h, v7.4h, v8.4h }, [x13]
+# CHECK-NEXT: 16 5 2.00 * st4 { v11.8h, v12.8h, v13.8h, v14.8h }, [x1]
+# CHECK-NEXT: 8 4 1.00 * st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 17 5 2.00 * st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: 16 5 2.00 * st4 { v21.4s, v22.4s, v23.4s, v24.4s }, [x6]
+# CHECK-NEXT: 16 5 2.00 * st4 { v25.2d, v26.2d, v27.2d, v28.2d }, [x16]
+# CHECK-NEXT: 4 4 0.50 * st4 { v0.b, v1.b, v2.b, v3.b }[15], [x0]
+# CHECK-NEXT: 4 4 0.50 * st4 { v5.h, v6.h, v7.h, v8.h }[4], [x13]
+# CHECK-NEXT: 4 4 0.50 * st4 { v22.s, v23.s, v24.s, v25.s }[0], [x7]
+# CHECK-NEXT: 8 4 1.00 * st4 { v23.d, v24.d, v25.d, v26.d }[1], [x5]
+# CHECK-NEXT: 4 4 0.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
+# CHECK-NEXT: 5 4 0.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
+# CHECK-NEXT: 9 4 1.00 * st4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], x5
+# CHECK-NEXT: 1 1 0.25 sub d15, d5, d16
+# CHECK-NEXT: 1 1 0.25 sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 1 0.25 sub v15.2s, v14.2s, v11.2s
+# CHECK-NEXT: 1 2 0.25 subhn v7.4h, v10.4s, v13.4s
+# CHECK-NEXT: 1 2 0.25 subhn2 v24.4s, v24.2d, v8.2d
+# CHECK-NEXT: 1 2 0.25 suqadd b19, b14
+# CHECK-NEXT: 1 2 0.25 suqadd d18, d22
+# CHECK-NEXT: 1 2 0.25 suqadd h20, h15
+# CHECK-NEXT: 1 2 0.25 suqadd s21, s12
+# CHECK-NEXT: 1 2 0.25 suqadd v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 suqadd v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 suqadd v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 suqadd v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 suqadd v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 suqadd v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 suqadd v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: 1 2 0.25 tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: 2 4 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: 3 4 0.75 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: 1 2 0.25 tbl v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: 1 2 0.25 tbl v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: 2 4 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: 3 4 0.75 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: 1 2 0.25 tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: 2 4 0.50 tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: 3 6 0.75 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: 4 6 1.00 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: 1 2 0.25 tbx v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: 2 4 0.50 tbx v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: 3 6 0.75 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: 4 6 1.00 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: 1 2 0.25 trn1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 trn1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 trn1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 trn1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 trn1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 trn1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 trn1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 trn2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 trn2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 trn2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 trn2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 trn2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 trn2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 trn2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uaba v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uaba v13.16b, v14.16b, v19.16b
+# CHECK-NEXT: 1 2 0.25 uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uabd v23.4s, v4.4s, v30.4s
+# CHECK-NEXT: 1 2 0.25 uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 uadalp v0.1d, v0.2s
+# CHECK-NEXT: 1 3 0.25 uadalp v0.2d, v0.4s
+# CHECK-NEXT: 1 3 0.25 uadalp v0.2s, v0.4h
+# CHECK-NEXT: 1 3 0.25 uadalp v0.4h, v0.8b
+# CHECK-NEXT: 1 3 0.25 uadalp v0.4s, v0.8h
+# CHECK-NEXT: 1 3 0.25 uadalp v0.8h, v0.16b
+# CHECK-NEXT: 1 2 0.25 uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uaddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uaddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uaddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.1d, v0.2s
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.2d, v0.4s
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.2s, v0.4h
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.4h, v0.8b
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.4s, v0.8h
+# CHECK-NEXT: 1 3 0.25 uaddlp v0.8h, v0.16b
+# CHECK-NEXT: 2 5 0.50 uaddlv d0, v0.4s
+# CHECK-NEXT: 3 7 0.75 uaddlv s0, v0.4h
+# CHECK-NEXT: 3 7 0.75 uaddlv s0, v0.8h
+# CHECK-NEXT: 4 9 1.00 uaddlv h0, v0.8b
+# CHECK-NEXT: 4 9 1.00 uaddlv h0, v0.16b
+# CHECK-NEXT: 1 1 0.25 uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 1 0.25 uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 1 0.25 uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 1 0.25 uaddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 1 0.25 uaddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 1 0.25 uaddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 2 7 0.50 ucvtf h17, x12
+# CHECK-NEXT: 1 3 0.25 ucvtf h22, h16, #11
+# CHECK-NEXT: 1 3 0.25 ucvtf h7, h21
+# CHECK-NEXT: 1 3 0.25 ucvtf d21, d14
+# CHECK-NEXT: 1 3 0.25 ucvtf d21, d14, #64
+# CHECK-NEXT: 2 7 0.50 ucvtf s8, x0
+# CHECK-NEXT: 1 3 0.25 ucvtf s22, s13
+# CHECK-NEXT: 1 3 0.25 ucvtf s22, s13, #32
+# CHECK-NEXT: 2 4 0.50 ucvtf v0.2d, v0.2d
+# CHECK-NEXT: 2 4 0.50 ucvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 ucvtf v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 ucvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 ucvtf v0.4h, v0.4h
+# CHECK-NEXT: 2 4 0.50 ucvtf v0.4s, v0.4s
+# CHECK-NEXT: 2 4 0.50 ucvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 ucvtf v18.4h, v11.4h, #7
+# CHECK-NEXT: 2 4 0.50 ucvtf v0.8h, v0.8h
+# CHECK-NEXT: 2 4 0.50 ucvtf v22.8h, v20.8h, #10
+# CHECK-NEXT: 1 3 0.25 udot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: 1 3 0.25 udot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 udot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 udot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: 1 2 0.25 uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uhsub v12.4h, v16.4h, v28.4h
+# CHECK-NEXT: 1 2 0.25 uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 umax v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 umax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 umax v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 4 12 1.00 umaxv b0, v0.8b
+# CHECK-NEXT: 4 12 1.00 umaxv b0, v0.16b
+# CHECK-NEXT: 3 9 0.75 umaxv h0, v0.4h
+# CHECK-NEXT: 3 9 0.75 umaxv h0, v0.8h
+# CHECK-NEXT: 2 6 0.50 umaxv s0, v0.4s
+# CHECK-NEXT: 1 2 0.25 umin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 umin v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 umin v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 umin v0.16b, v26.16b, v2.16b
+# CHECK-NEXT: 1 3 0.25 uminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 uminp v28.4s, v16.4s, v15.4s
+# CHECK-NEXT: 1 3 0.25 uminp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 uminp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 4 12 1.00 uminv b0, v0.8b
+# CHECK-NEXT: 4 12 1.00 uminv b0, v0.16b
+# CHECK-NEXT: 3 9 0.75 uminv h0, v0.4h
+# CHECK-NEXT: 3 9 0.75 uminv h0, v0.8h
+# CHECK-NEXT: 2 6 0.50 uminv s0, v0.4s
+# CHECK-NEXT: 1 3 0.25 umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 umlal v28.2d, v31.2s, v0.s[1]
+# CHECK-NEXT: 1 3 0.25 umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 umlal v22.4s, v14.4h, v0.h[6]
+# CHECK-NEXT: 1 3 0.25 umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 umlal2 v10.2d, v4.4s, v3.s[2]
+# CHECK-NEXT: 1 3 0.25 umlal2 v31.4s, v7.8h, v15.h[5]
+# CHECK-NEXT: 1 3 0.25 umlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 umlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 umlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 umlsl v20.2d, v20.2s, v2.s[0]
+# CHECK-NEXT: 1 3 0.25 umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 umlsl v21.4s, v12.4h, v7.h[5]
+# CHECK-NEXT: 1 3 0.25 umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 umlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 umlsl2 v30.2d, v23.4s, v1.s[2]
+# CHECK-NEXT: 1 3 0.25 umlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 umlsl2 v27.4s, v28.8h, v6.h[4]
+# CHECK-NEXT: 1 3 0.25 umlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 umov w6, v22.b[0]
+# CHECK-NEXT: 1 2 0.25 umov w0, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 umov w10, v25.h[0]
+# CHECK-NEXT: 1 2 0.25 umov w0, v0.h[1]
+# CHECK-NEXT: 1 2 0.25 mov w0, v0.s[1]
+# CHECK-NEXT: 1 2 0.25 mov x0, v0.d[1]
+# CHECK-NEXT: 1 3 0.25 umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 3 0.25 umull v22.2d, v28.2s, v6.s[1]
+# CHECK-NEXT: 1 3 0.25 umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 3 0.25 umull v27.4s, v1.4h, v8.h[6]
+# CHECK-NEXT: 1 3 0.25 umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 3 0.25 umull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 umull2 v28.2d, v21.4s, v1.s[0]
+# CHECK-NEXT: 1 3 0.25 umull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 umull2 v18.4s, v26.8h, v10.h[1]
+# CHECK-NEXT: 1 3 0.25 umull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uqadd h0, h1, h5
+# CHECK-NEXT: 1 2 0.25 uqadd s0, s24, s30
+# CHECK-NEXT: 1 2 0.25 uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uqadd v14.2d, v22.2d, v20.2d
+# CHECK-NEXT: 1 3 0.25 uqrshl b11, b20, b30
+# CHECK-NEXT: 1 3 0.25 uqrshl s23, s20, s16
+# CHECK-NEXT: 1 3 0.25 uqrshl v25.8b, v13.8b, v23.8b
+# CHECK-NEXT: 1 3 0.25 uqrshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 uqrshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 uqrshrn b10, h12, #5
+# CHECK-NEXT: 1 3 0.25 uqrshrn h12, s10, #14
+# CHECK-NEXT: 1 3 0.25 uqrshrn s10, d10, #25
+# CHECK-NEXT: 1 3 0.25 uqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 uqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 uqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 uqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 uqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 uqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 uqshl b11, b20, b30
+# CHECK-NEXT: 1 2 0.25 uqshl b18, b15, #6
+# CHECK-NEXT: 1 2 0.25 uqshl d15, d12, #19
+# CHECK-NEXT: 1 2 0.25 uqshl h11, h18, #7
+# CHECK-NEXT: 1 2 0.25 uqshl s14, s19, #18
+# CHECK-NEXT: 1 2 0.25 uqshl s23, s20, s16
+# CHECK-NEXT: 1 2 0.25 uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 uqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v8.4h, v17.4h, v13.4h
+# CHECK-NEXT: 1 2 0.25 uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uqshrn b12, h10, #7
+# CHECK-NEXT: 1 2 0.25 uqshrn h10, s14, #5
+# CHECK-NEXT: 1 2 0.25 uqshrn s10, d12, #13
+# CHECK-NEXT: 1 2 0.25 uqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 uqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 uqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 uqsub s16, s21, s6
+# CHECK-NEXT: 1 2 0.25 uqsub d16, d16, d16
+# CHECK-NEXT: 1 2 0.25 uqsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uqsub v19.4s, v0.4s, v5.4s
+# CHECK-NEXT: 1 2 0.25 uqxtn b18, h18
+# CHECK-NEXT: 1 2 0.25 uqxtn h20, s17
+# CHECK-NEXT: 1 2 0.25 uqxtn s19, d14
+# CHECK-NEXT: 1 2 0.25 uqxtn v0.2s, v0.2d
+# CHECK-NEXT: 1 2 0.25 uqxtn v0.4h, v0.4s
+# CHECK-NEXT: 1 2 0.25 uqxtn v0.8b, v0.8h
+# CHECK-NEXT: 1 2 0.25 uqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 2 0.25 uqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 2 0.25 uqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 3 0.25 urecpe v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 urecpe v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 urhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 urhadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 urhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 urhadd v16.2s, v19.2s, v2.2s
+# CHECK-NEXT: 1 3 0.25 urshl d8, d7, d4
+# CHECK-NEXT: 1 3 0.25 urshl v31.8b, v5.8b, v3.8b
+# CHECK-NEXT: 1 3 0.25 urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 3 0.25 urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 3 0.25 urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 urshr d20, d23, #31
+# CHECK-NEXT: 1 3 0.25 urshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 urshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 3 0.25 ursqrte v0.2s, v0.2s
+# CHECK-NEXT: 2 4 0.50 ursqrte v0.4s, v0.4s
+# CHECK-NEXT: 1 3 0.25 ursra d18, d10, #13
+# CHECK-NEXT: 1 3 0.25 ursra v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 ursra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 ushl d0, d0, d0
+# CHECK-NEXT: 1 2 0.25 ushl v6.8b, v26.8b, v6.8b
+# CHECK-NEXT: 1 2 0.25 ushl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 ushl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 ushl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 ushll v0.4s, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 ushll v18.8h, v24.8b, #4
+# CHECK-NEXT: 1 2 0.25 ushll v16.2d, v16.2s, #31
+# CHECK-NEXT: 1 2 0.25 ushll2 v31.2d, v12.4s, #11
+# CHECK-NEXT: 1 2 0.25 ushll2 v18.4s, v22.8h, #13
+# CHECK-NEXT: 1 2 0.25 ushll2 v0.8h, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 ushr d10, d17, #18
+# CHECK-NEXT: 1 2 0.25 ushr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.25 ushr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 U smov w15, v22.b[0]
+# CHECK-NEXT: 1 2 0.25 U smov w26, v27.h[0]
+# CHECK-NEXT: 1 2 0.25 U smov x21, v0.b[0]
+# CHECK-NEXT: 1 2 0.25 U smov x9, v27.h[0]
+# CHECK-NEXT: 1 2 0.25 U smov x15, v3.s[0]
+# CHECK-NEXT: 1 2 0.25 smov w0, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 smov w0, v0.h[1]
+# CHECK-NEXT: 1 2 0.25 smov x0, v0.b[1]
+# CHECK-NEXT: 1 2 0.25 smov x0, v0.h[1]
+# CHECK-NEXT: 1 2 0.25 smov x0, v0.s[1]
+# CHECK-NEXT: 1 2 0.25 usqadd b19, b14
+# CHECK-NEXT: 1 2 0.25 usqadd d18, d22
+# CHECK-NEXT: 1 2 0.25 usqadd h20, h15
+# CHECK-NEXT: 1 2 0.25 usqadd s21, s12
+# CHECK-NEXT: 1 2 0.25 usqadd v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 usqadd v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 usqadd v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 usqadd v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 usqadd v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 usqadd v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 usqadd v0.8h, v0.8h
+# CHECK-NEXT: 1 3 0.25 usra d20, d13, #61
+# CHECK-NEXT: 1 3 0.25 usra v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 3 0.25 usra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 2 0.25 usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 usubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 usubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 usubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 1 0.25 usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 1 0.25 usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 1 0.25 usubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 1 0.25 usubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 1 0.25 usubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uzp1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 uzp2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 xtn v0.2s, v0.2d
+# CHECK-NEXT: 1 2 0.25 xtn v0.4h, v0.4s
+# CHECK-NEXT: 1 2 0.25 xtn v0.8b, v0.8h
+# CHECK-NEXT: 1 2 0.25 xtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 2 0.25 xtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 2 0.25 xtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 2 0.25 zip1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 zip1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 zip1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 zip1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 zip1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 zip1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 zip1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.25 zip2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.25 zip2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.25 zip2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.25 zip2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.25 zip2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.25 zip2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.25 zip2 v0.8h, v0.8h, v0.8h
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - 86.33 86.33 86.33 13.67 14.67 13.67 14.67 8.17 8.17 83.00 83.00 83.00 83.00 494.25 494.25 494.25 494.25
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs d29, d24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 abs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 add d17, d31, d29
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addp v7.2s, v1.2s, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addp d1, v14.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 aesd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 aese v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 aesimc v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 aesmc v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bic v0.4h, #15, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bic v23.8h, #101
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bic v25.16b, v10.16b, v9.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bic v24.2s, #70
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bit v5.8b, v12.8b, v22.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bif v0.8b, v25.8b, v4.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 bsl v27.16b, v13.16b, v21.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cls v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 clz v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq v9.8h, v16.8h, v24.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq v14.4h, v18.4h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq d20, d21, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq v0.16b, v0.16b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmeq v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge v22.8h, v16.8h, v3.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge v22.16b, v30.16b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge d20, d21, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmge v0.8b, v0.8b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmgt v3.2d, v29.2d, v11.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmgt d20, d21, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmgt d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmgt v0.2s, v0.2s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmhi v28.4h, v25.4h, v21.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmhi d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmhi v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmhs d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmhs v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmle v21.2s, v19.2s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmle d20, d21, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmle v0.2d, v0.2d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmlt v26.4h, v12.4h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmlt d20, d21, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmlt v0.8h, v0.8h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmtst d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmtst v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cmtst v13.2d, v13.2d, v13.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cnt v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 cnt v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.16b, w28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.2d, x28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.2s, w28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.4h, w28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.4s, w28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.8b, w28
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 dup v0.8h, w28
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov b0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov d0, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov h0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov s0, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.16b, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.2d, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.2s, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.4h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.4s, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.8b, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 dup v0.8h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ext v0.8b, v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabd d29, d24, d20
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabd s29, s24, s20
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabd h27, h20, h17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabd v13.8h, v28.8h, v12.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs h25, h7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fabs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge h24, h26, h29
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge v25.4h, v16.4h, v11.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge v19.2s, v24.2s, v5.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt h0, h4, h10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt v22.8h, v14.8h, v31.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 facgt v22.4s, v8.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 faddp h10, v19.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 faddp d11, v28.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 faddp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 faddp v16.2d, v11.2d, v5.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq h30, h6, h1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq h19, h23, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq d20, d21, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq s10, s11, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq v0.2s, v0.2s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq v12.4s, v11.4s, v26.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmeq v18.2d, v17.2d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge h10, h23, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge h1, h16, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge d20, d21, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge s10, s11, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v17.2d, v11.2d, v13.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v18.4h, v27.4h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v20.8h, v19.8h, v22.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmge v17.2s, v11.2s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt h4, h5, h0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt h0, h18, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt d20, d21, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt d20, d21, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt s10, s11, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt s10, s11, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt v24.8h, v24.8h, v28.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt v0.8h, v11.8h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmgt v19.2d, v31.2d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle v16.8h, v11.8h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle v22.4s, v30.4s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle d20, d21, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle s10, s11, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmle h18, h28, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt h23, h7, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt d20, d21, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt s10, s11, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt v8.4h, v2.4h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcmlt v7.2d, v16.2d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtas v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtas v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtas v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtas v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtau v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtau v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtau v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtau v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtl v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtl v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtl2 v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtl2 v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms h22, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtms v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtms v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtms v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtms v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtmu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtmu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtmu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtmu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns h22, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtns v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtns v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtns v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtns v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtnu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtnu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtnu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtnu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps h22, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtps v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtps v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtps v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtps v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtpu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtpu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtpu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtpu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtxn s22, d13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtxn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtxn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs d21, d12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs s21, s12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs h21, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs h21, h12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzs v20.4h, v24.4h, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzs v18.8h, v10.8h, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu d21, d12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu s12, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu s21, s12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu h12, h13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu h21, h12, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fcvtzu v19.4h, v26.4h, #9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcvtzu v27.8h, v6.8h, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fdiv v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fdiv v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fdiv v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fdiv v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fdiv v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmp h25, v19.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmp d17, v29.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmv h0, v13.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmv h12, v11.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxnmv s28, v31.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxp h15, v25.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxp s6, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmaxv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmp h20, v14.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmp d15, v8.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmv h19, v25.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmv h23, v17.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminnmv s29, v17.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminp h7, v10.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminp s17, v7.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminv h3, v30.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminv h29, v12.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fminv s16, v19.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla d0, d1, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla h23, h24, v15.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla s0, s1, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v29.8h, v15.8h, v10.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v2.2s, v16.2s, v28.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v14.4s, v14.4s, v5.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v1.4s, v24.4s, v12.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmla v10.2d, v14.2d, v21.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls d0, d4, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls h8, h14, v7.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls s3, s5, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v30.8h, v18.8h, v4.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v10.2s, v27.2s, v0.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v27.4s, v7.4s, v24.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v10.2d, v22.2d, v29.d[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmls v6.8h, v15.8h, v23.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov v0.2d, #-1.25000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov v0.2s, #13.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmov v0.4s, #1.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul h18, h4, v7.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul v10.4h, v2.4h, v7.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul v5.2s, v12.2s, v9.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul v15.4s, v30.4s, v2.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul v11.2d, v31.2d, v24.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul h28, h14, h3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul d0, d1, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul s0, s1, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmul v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx d0, d4, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx d23, d11, d1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx s20, s22, s15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx h18, h17, v7.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx h20, h25, h0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx s3, s5, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v28.4h, v25.4h, v15.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v3.2s, v22.2s, v23.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v5.4s, v28.4s, v15.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fmulx v22.2d, v18.2d, v25.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fneg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpe h20, h8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpe d13, d13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpe s19, s14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecpe v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpe v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpe v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecpe v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecpe v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps h29, h19, h8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpx h18, h11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps v12.8h, v25.8h, v4.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps d22, d30, d21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps s21, s16, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecps v7.2d, v29.2d, v18.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpx d16, d19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frecpx s18, s10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinta v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinta v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinta v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinta v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinta v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinti v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinti v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frinti v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinti v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frinti v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintm v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintm v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintm v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintm v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintm v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintn v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintn v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintn v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintn v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintn v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintp v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintp v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintp v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintp v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintp v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintx v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintx v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintx v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintx v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintx v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintz v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintz v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frintz v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintz v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frintz v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrte h23, h26
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrte d21, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrte s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrte v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrte v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrte v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrte v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts v20.4s, v26.4s, v27.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts v8.4h, v9.4h, v30.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrte v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts h28, h26, h1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts d8, d22, d18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts s21, s5, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 frsqrts v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsqrt v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsqrt v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsqrt v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsqrt v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsqrt v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsub v13.8h, v15.8h, v17.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 fsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v0.16b }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v0.16b, v1.16b }, [x14]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v19.16b, v20.16b, v21.16b }, [x10]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v13.16b, v14.16b, v15.16b, v16.16b }, [x9]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v24.8h }, [x27]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v1.8h, v2.8h }, [x27]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.8h, v1.8h }, [sp], #32
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v21.8h, v22.8h, v23.8h }, [x22]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v0.8h, v1.8h, v2.8h, v3.8h }, [x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v3.4s }, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v11.4s, v12.4s }, [x30]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [x24]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v15.4s, v16.4s, v17.4s, v18.4s }, [x28]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [x0], #48
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v3.2d }, [x28]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v13.2d, v14.2d }, [x13]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v12.2d, v13.2d, v14.2d }, [x15]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.1d }, [x15], x2
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v27.1d, v28.1d }, [x7]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v14.1d, v15.1d, v16.1d }, [x3]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v22.1d, v23.1d, v24.1d, v25.1d }, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v0.2s, v1.2s }, [x15]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v16.2s, v17.2s, v18.2s }, [x27]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v21.2s, v22.2s, v23.2s, v24.2s }, [x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v25.4h, v26.4h }, [x3]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v20.4h, v21.4h, v22.4h, v23.4h }, [x15]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v0.4h, v1.4h, v2.4h }, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v24.8b, v25.8b }, [x6]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v7.8b, v8.8b, v9.8b }, [x12]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x13]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1 { v0.b }[7], [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1 { v0.h }[3], [x0], #2
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1 { v18.h }[3], [x1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1 { v0.s }[1], [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1 { v0.d }[0], [x15], #8
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1 { v11.d }[0], [x13]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - ld1 { v0.8h }, [x15], x2
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1 { v0.b }[9], [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1 { v0.b }[9], [x0], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v0.16b }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1r { v0.8h }, [x0], #2
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v0.4s }, [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v3.1d }, [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1r { v0.2d }, [x15], x16
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v18.2d }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v8.8b }, [x23]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v28.4h }, [x9]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v3.8h }, [x16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v10.2s }, [x20]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v0.4h, v1.4h }, [x21]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v8.8h, v9.8h }, [x28]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v2.2s, v3.2s }, [x16]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v22.4s, v23.4s }, [x4]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v22.2d, v23.2d }, [x17]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v29.b, v30.b }[3], [x1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v26.s, v27.s }[1], [x17]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v1.d, v2.d }[0], [x10]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v0.16b, v1.16b }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v13.8b, v14.8b }, [x4]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2 { v0.8b, v1.8b }, [x0], #16
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1r { v0.16b }, [x0], #1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.25 0.25 0.25 0.25 ld1r { v0.8h }, [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.25 0.25 0.25 0.25 ld1r { v0.8h }, [x15], #2
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2 { v0.h, v1.h }[7], [x15]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2 { v0.h, v1.h }[7], [x15], x8
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2 { v0.h, v1.h }[7], [x15], #4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v10.16b, v11.16b }, [x23]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2r { v0.4h, v1.4h }, [x0], #4
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v25.4h, v26.4h }, [x11]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v23.8h, v24.8h }, [x10]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v0.2s, v1.2s }, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v8.4s, v9.4s }, [x17]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2r { v0.1d, v1.1d }, [sp], x8
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v9.1d, v10.1d }, [x25]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v26.2d, v27.2d }, [x8]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v8.8b, v9.8b, v10.8b }, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3 { v15.16b, v16.16b, v17.16b }, [x5]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v0.2d, v1.2d }, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2r { v0.2d, v1.2d }, [x0], #16
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld2r { v0.4s, v1.4s }, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 0.50 0.50 0.50 ld2r { v0.4s, v1.4s }, [sp], #8
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.50 1.50 1.50 1.50 ld3 { v0.8h, v1.8h, v2.8h }, [x15], #48
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3 { v7.8h, v8.8h, v9.8h }, [x21]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v16.2s, v17.2s, v18.2s }, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3 { v12.4s, v13.4s, v14.4s }, [x25]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v17.b, v18.b, v19.b }[2], [x27]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v18.h, v19.h, v20.h }[5], [x16]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v10.2d, v11.2d, v12.2d }, [x18]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.50 1.50 1.50 1.50 ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v0.s, v1.s, v2.s }[3], [sp]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.75 0.75 0.75 0.75 ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3 { v5.d, v6.d, v7.d }[1], [x14]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v0.8b, v1.8b, v2.8b }, [x15]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v17.16b, v18.16b, v19.16b }, [x3]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.75 0.75 0.75 0.75 ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v3.4h, v4.4h, v5.4h }, [x1]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v6.8h, v7.8h, v8.8h }, [x28]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v0.2s, v1.2s, v2.2s }, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v28.4s, v29.4s, v30.4s }, [x2]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.75 0.75 0.75 0.75 ld3r { v0.1d, v1.1d, v2.1d }, [x0], x0
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v1.1d, v2.1d, v3.1d }, [x28]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v8.2d, v9.2d, v10.2d }, [x3]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v6.8b, v7.8b, v8.8b, v9.8b }, [x27]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4 { v11.16b, v12.16b, v13.16b, v14.16b }, [x5]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v21.4h, v22.4h, v23.4h, v24.4h }, [x14]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4 { v9.8h, v10.8h, v11.8h, v12.8h }, [x1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4 { v17.4s, v18.4s, v19.4s, v20.4s }, [x4]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 0.75 0.75 0.75 0.75 ld3r { v0.8b, v1.8b, v2.8b }, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.75 0.75 0.75 0.75 ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 2.00 2.00 2.00 2.00 ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x24]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v4.b, v5.b, v6.b, v7.b }[12], [x27]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v5.h, v6.h, v7.h, v8.h }[0], [x4]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x26]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v20.8b, v21.8b, v22.8b, v23.8b }, [x23]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x25]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v16.4h, v17.4h, v18.4h, v19.4h }, [x6]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v0.2d, v1.2d, v2.2d, v3.2d }, [sp]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v4.8h, v5.8h, v6.8h, v7.8h }, [x23]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [x30]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], #16
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v7.4s, v8.4s, v9.4s, v10.4s }, [x23]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4r { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], x8
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 1.00 1.00 1.00 1.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mla v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mla v15.8h, v22.8h, v4.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mla v28.2s, v10.2s, v2.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mls v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mls v25.8h, v29.8h, v0.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mls v22.2s, v29.2s, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mls v26.4s, v5.4s, v28.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov b0, v0.b[15]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov d6, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov h2, v0.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov s17, v0.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov w8, v8.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov x30, v18.d[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v2.b[0], v0.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v2.h[1], v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v2.s[2], v0.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v2.d[1], v0.d[1]
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 mov v0.b[0], w8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 mov v0.h[1], w8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 mov v0.s[2], w8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 0.50 0.50 0.50 0.50 mov v0.d[1], x8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi d15, #0xff00ff00ff00ff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v0.16b, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v14.8h, #174
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v13.4h, #74, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v0.2s, #8, msl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v19.2s, #226
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v1.4s, #122, msl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v0.4s, #255, lsl #24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 movi v0.8b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v26.4h, v20.4h, v14.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v5.8h, v21.8h, v3.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v29.2s, v10.2s, v3.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v30.4s, v11.4s, v4.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v30.4s, v11.4s, v4.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mul v3.8h, v9.8h, v8.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvni v9.4h, #237
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvni v8.8h, #171, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvni v22.4s, #15, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvni v0.2s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvni v0.4s, #16, msl #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg d29, d24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 neg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvn v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mvn v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 orn v29.8b, v19.8b, v16.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 orr v9.4h, #18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 orr v0.8h, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 orr v4.4s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 pmul v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 pmul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 pmull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rbit v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rbit v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev16 v21.8b, v1.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev16 v30.16b, v31.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev32 v0.4h, v9.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev32 v21.8b, v1.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev32 v30.16b, v31.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev32 v4.8h, v7.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v0.16b, v31.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v1.8b, v9.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v13.4h, v21.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v2.8h, v4.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v4.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rev64 v6.4s, v8.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saba v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabd v12.2s, v11.2s, v27.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sadalp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddlp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlv d0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 saddlv s0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 saddlv s0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 saddlv h0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 saddlv h0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 saddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf h4, h8, #9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf h5, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf d21, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf d21, d12, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf s22, s13, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 scvtf v25.4h, v13.4h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 scvtf v4.8h, v8.8h, #10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sdot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sdot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sdot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sdot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shadd v25.16b, v1.16b, v10.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl d7, d10, #12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v23.8b, v18.8b, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v0.8h, v23.8h, #10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll v0.4s, v0.4h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll v0.8h, v0.8b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll v0.2d, v0.2s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 shsub v15.8h, v5.8h, v27.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli d10, d14, #12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sli v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smax v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smax v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smax v30.16b, v3.16b, v30.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smaxp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smaxp v21.8h, v16.8h, v7.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smaxp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smaxv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smaxv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 smaxv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 smaxv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smaxv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smin v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smin v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sminv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sminv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 sminv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 sminv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sminv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal v0.2d, v25.2s, v1.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal v16.4s, v9.4h, v11.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal2 v30.2d, v22.4s, v7.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl v25.2d, v27.2s, v1.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl v14.4s, v23.4h, v12.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlal2 v1.4s, v9.8h, v0.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl2 v12.4s, v11.8h, v12.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl2 v11.2d, v28.4s, v7.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull v31.2d, v23.2s, v6.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull v3.4s, v26.4h, v1.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull2 v11.2d, v1.4s, v7.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull2 v13.4s, v18.8h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs b19, b14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs d18, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs h21, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs s20, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqabs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqadd b20, b11, b15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqadd h12, h18, h10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal d19, s24, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal d8, s9, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal s0, h0, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal s17, h27, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal v11.2d, v24.2s, v0.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal v20.4s, v30.4h, v12.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal2 v23.2d, v30.4s, v6.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlal2 v2.4s, v17.8h, v5.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh v8.4h, v16.4h, v5.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh v16.2s, v24.2s, v7.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull v8.4s, v19.4h, v1.h[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull v20.2d, v10.2s, v6.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull2 v10.4s, v25.8h, v0.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull2 v4.2d, v29.4s, v2.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh v0.8h, v15.8h, v0.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh v6.2s, v29.2s, v4.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh v31.2s, v17.2s, v4.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl d12, s23, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl d8, s9, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl s0, h0, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl s14, h12, h25
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl v26.2d, v7.2s, v3.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl v4.4s, v22.4h, v13.h[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl2 v4.2d, v3.4s, v3.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmlsl2 v2.4s, v28.8h, v4.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh h10, h11, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh s20, s21, s2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull d1, s1, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull d15, s22, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull s1, h1, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull s12, h22, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqdmull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg b19, b14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg d18, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg h21, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg s20, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqneg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah h0, h1, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.4h, v1.4h, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.8h, v1.8h, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah s0, s1, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.2s, v1.2s, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.4s, v1.4s, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah h0, h1, h2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.4h, v1.4h, v2.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.8h, v1.8h, v2.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah s0, s1, s2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.2s, v1.2s, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlah v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh h0, h1, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.4h, v1.4h, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.8h, v1.8h, v2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh s0, s1, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.2s, v1.2s, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.4s, v1.4s, v2.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh h0, h1, h2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.4h, v1.4h, v2.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.8h, v1.8h, v2.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh s0, s1, s2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.2s, v1.2s, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmlsh v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh h10, h11, h12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh s20, s21, s2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrdmulh v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshl d31, d31, d31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshl h3, h4, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl s17, s4, s23
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub b3, b13, b12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub v20.8h, v18.8h, v12.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn b10, h13, #2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn h15, s10, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn s15, d12, #9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun b17, h10, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun h10, s13, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun s22, d16, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl b11, b19, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl d15, d16, #51
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl d31, d31, d31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl h13, h18, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl h3, h4, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl s14, s17, #22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v23.16b, v23.16b, v23.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu b15, b18, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu d11, d13, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu h19, h17, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu s16, s14, #25
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshlu v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn b10, h15, #5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn h17, s10, #4
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn s18, d10, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun b15, h10, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun h20, s14, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun s10, d15, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub s20, s10, s7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqsub v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn b18, h18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn h20, s17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn s19, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun b19, h14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun h21, s15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun s20, d12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srhadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srhadd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srhadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri d10, d12, #14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sri v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshl d16, d16, d16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr d19, d18, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra d15, d11, #19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 srsra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshl d31, d31, d31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll v9.8h, v2.8b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll v12.4s, v3.4h, #4
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll v0.2d, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll2 v28.8h, v12.16b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll2 v0.4s, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshll2 v17.2d, v13.4s, #22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr d15, d16, #12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra d18, d12, #21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ssubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v18.8b }, [x15]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v8.8b, v9.8b }, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v15.8b, v16.8b, v17.8b }, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v21.8b, v22.8b, v23.8b, v24.8b }, [x14]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v0.16b }, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st1 { v1.16b, v2.16b }, [x4]
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 - - - - st1 { v27.16b, v28.16b, v29.16b }, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1 { v18.16b, v19.16b, v20.16b, v21.16b }, [x29]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v19.4h }, [x7]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v22.4h, v23.4h }, [x22]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v13.4h, v14.4h, v15.4h }, [x7]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v23.4h, v24.4h, v25.4h, v26.4h }, [x24]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v27.8h }, [x17]
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 - - - - st1 { v8.8h, v9.8h, v10.8h }, [x16]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x19]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v25.2s }, [x6]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v13.2s, v14.2s }, [x9]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v12.2s, v13.2s, v14.2s }, [x3]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v6.2s, v7.2s, v8.2s, v9.2s }, [x13]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 - - - - st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v22.4s }, [x19]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st1 { v15.4s, v16.4s }, [x12]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1 { v26.4s, v27.4s, v28.4s, v29.4s }, [x12]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v20.1d }, [x10]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.25 0.25 0.25 0.25 st1 { v21.1d, v22.1d }, [x29]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v5.1d, v6.1d, v7.1d }, [x3]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v0.1d, v1.1d, v2.1d, v3.1d }, [x10]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st1 { v26.2d, v27.2d }, [x28]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.50 1.50 1.50 1.50 - - - - st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 - - - - st1 { v13.2d, v14.2d, v15.2d }, [x27]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v8.2d }, [x15]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 - - - - st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 - - - - st1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 0.50 0.50 0.50 0.50 st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v1.b }[5], [x1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v0.h }[2], [x1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v31.s }[1], [x16]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1 { v0.d }[1], [x0]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - st1 { v0.d }[1], [x0], #8
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 - - - - st2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st2 { v6.16b, v7.16b }, [x23]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v10.4h, v11.4h }, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st2 { v10.8h, v11.8h }, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v25.2s, v26.2s }, [x29]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st2 { v26.4s, v27.4s }, [x14]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - - - - st2 { v10.2d, v11.2d }, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v21.b, v22.b }[15], [x15]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v28.h, v29.h }[2], [x6]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v0.s, v1.s }[3], [sp]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 - - - - st2 { v0.s, v1.s }[3], [sp], #8
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st2 { v17.d, v18.d }[1], [x1]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v10.8b, v11.8b, v12.8b }, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 1.50 1.50 1.50 1.50 st3 { v26.16b, v27.16b, v28.16b }, [x4]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.50 1.50 1.50 1.50 1.50 1.50 1.50 1.50 st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 1.50 1.50 1.50 1.50 st3 { v0.8h, v1.8h, v2.8h }, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v19.2s, v20.2s, v21.2s }, [x30]
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 1.50 1.50 1.50 1.50 st3 { v24.4s, v25.4s, v26.4s }, [x8]
+# CHECK-NEXT: - - - - - - - - - - - - 1.50 1.50 1.50 1.50 1.50 1.50 1.50 1.50 st3 { v24.2d, v25.2d, v26.2d }, [x25]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v8.b, v9.b, v10.b }[4], [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v0.h, v1.h, v2.h }[7], [x15]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v0.h, v1.h, v2.h }[7], [x15], #6
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v9.s, v10.s, v11.s }[2], [x20]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st3 { v16.d, v17.d, v18.d }[0], [x13]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st4 { v17.8b, v18.8b, v19.8b, v20.8b }, [x8]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 2.00 2.00 2.00 2.00 st4 { v7.16b, v8.16b, v9.16b, v10.16b }, [x15]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st4 { v5.4h, v6.4h, v7.4h, v8.4h }, [x13]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 2.00 2.00 2.00 2.00 st4 { v11.8h, v12.8h, v13.8h, v14.8h }, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 2.00 2.00 2.00 2.00 2.00 2.00 2.00 2.00 st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 2.00 2.00 2.00 2.00 st4 { v21.4s, v22.4s, v23.4s, v24.4s }, [x6]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 2.00 2.00 2.00 2.00 st4 { v25.2d, v26.2d, v27.2d, v28.2d }, [x16]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 st4 { v0.b, v1.b, v2.b, v3.b }[15], [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 st4 { v5.h, v6.h, v7.h, v8.h }[4], [x13]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 st4 { v22.s, v23.s, v24.s, v25.s }[0], [x7]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st4 { v23.d, v24.d, v25.d, v26.d }[1], [x5]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], x5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sub d15, d5, d16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 sub v15.2s, v14.2s, v11.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 subhn v7.4h, v10.4s, v13.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 subhn2 v24.4s, v24.2d, v8.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd b19, b14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd d18, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd h20, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd s21, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 suqadd v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbl v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbl v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 tbx v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 trn2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaba v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaba v13.16b, v14.16b, v19.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabd v23.4s, v4.4s, v30.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uadalp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddlp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlv d0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 uaddlv s0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 uaddlv s0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 uaddlv h0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 uaddlv h0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uaddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf h17, x12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf h22, h16, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf h7, h21
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf d21, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf d21, d14, #64
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - 0.25 0.25 0.25 0.25 ucvtf s8, x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf s22, s13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf s22, s13, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ucvtf v18.4h, v11.4h, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ucvtf v22.8h, v20.8h, #10
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 udot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 udot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 udot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 udot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uhsub v12.4h, v16.4h, v28.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umax v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umax v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 umaxv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 umaxv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 umaxv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 umaxv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umaxv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umin v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umin v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umin v0.16b, v26.16b, v2.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uminp v28.4s, v16.4s, v15.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uminp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uminp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 uminv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 uminv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 uminv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.75 0.75 0.75 0.75 uminv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uminv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal v28.2d, v31.2s, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal v22.4s, v14.4h, v0.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal2 v10.2d, v4.4s, v3.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal2 v31.4s, v7.8h, v15.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl v20.2d, v20.2s, v2.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl v21.4s, v12.4h, v7.h[5]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl2 v30.2d, v23.4s, v1.s[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl2 v27.4s, v28.8h, v6.h[4]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umov w6, v22.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umov w0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umov w10, v25.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umov w0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov w0, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 mov x0, v0.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull v22.2d, v28.2s, v6.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull v27.4s, v1.4h, v8.h[6]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull2 v28.2d, v21.4s, v1.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull2 v18.4s, v26.8h, v10.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 umull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqadd h0, h1, h5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqadd s0, s24, s30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqadd v14.2d, v22.2d, v20.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl b11, b20, b30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl s23, s20, s16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl v25.8b, v13.8b, v23.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn b10, h12, #5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn h12, s10, #14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn s10, d10, #25
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl b11, b20, b30
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl b18, b15, #6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl d15, d12, #19
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl h11, h18, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl s14, s19, #18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl s23, s20, s16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v8.4h, v17.4h, v13.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn b12, h10, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn h10, s14, #5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn s10, d12, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqsub s16, s21, s6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqsub d16, d16, d16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqsub v19.4s, v0.4s, v5.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn b18, h18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn h20, s17
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn s19, d14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urecpe v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 urecpe v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urhadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urhadd v16.2s, v19.2s, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl d8, d7, d4
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl v31.8b, v5.8b, v3.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr d20, d23, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 urshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursqrte v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ursqrte v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra d18, d10, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ursra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushl d0, d0, d0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushl v6.8b, v26.8b, v6.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll v0.4s, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll v18.8h, v24.8b, #4
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll v16.2d, v16.2s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll2 v31.2d, v12.4s, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll2 v18.4s, v22.8h, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushll2 v0.8h, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr d10, d17, #18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 ushr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov w15, v22.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov w26, v27.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x21, v0.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x9, v27.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x15, v3.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov w0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov w0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 smov x0, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd b19, b14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd d18, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd h20, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd s21, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usqadd v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra d20, d13, #61
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 usubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 uzp2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 xtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 zip2 v0.8h, v0.8h, v0.8h
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-ptraut-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-ptraut-instructions.s
new file mode 100644
index 0000000000000..1d9f3982684ba
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-ptraut-instructions.s
@@ -0,0 +1,153 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/ptraut-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 4 1.00 U pacia1716
+# CHECK-NEXT: 1 4 1.00 U pacib1716
+# CHECK-NEXT: 1 4 1.00 U autia1716
+# CHECK-NEXT: 1 4 1.00 U autib1716
+# CHECK-NEXT: 1 4 1.00 U paciaz
+# CHECK-NEXT: 1 4 1.00 U paciasp
+# CHECK-NEXT: 1 4 1.00 U pacibz
+# CHECK-NEXT: 1 4 1.00 U pacibsp
+# CHECK-NEXT: 1 4 1.00 U autiaz
+# CHECK-NEXT: 1 4 1.00 U autiasp
+# CHECK-NEXT: 1 4 1.00 U autibz
+# CHECK-NEXT: 1 4 1.00 U autibsp
+# CHECK-NEXT: 1 4 1.00 U pacia x0, x1
+# CHECK-NEXT: 1 4 1.00 U autia x0, x1
+# CHECK-NEXT: 1 4 1.00 U pacda x0, x1
+# CHECK-NEXT: 1 4 1.00 U autda x0, x1
+# CHECK-NEXT: 1 4 1.00 U pacib x0, x1
+# CHECK-NEXT: 1 4 1.00 U autib x0, x1
+# CHECK-NEXT: 1 4 1.00 U pacdb x0, x1
+# CHECK-NEXT: 1 4 1.00 U autdb x0, x1
+# CHECK-NEXT: 1 4 1.00 pacga x0, x1, x2
+# CHECK-NEXT: 1 4 1.00 U paciza x0
+# CHECK-NEXT: 1 4 1.00 U autiza x0
+# CHECK-NEXT: 1 4 1.00 U pacdza x0
+# CHECK-NEXT: 1 4 1.00 U autdza x0
+# CHECK-NEXT: 1 4 1.00 U pacizb x0
+# CHECK-NEXT: 1 4 1.00 U autizb x0
+# CHECK-NEXT: 1 4 1.00 U pacdzb x0
+# CHECK-NEXT: 1 4 1.00 U autdzb x0
+# CHECK-NEXT: 1 2 1.00 xpaci x0
+# CHECK-NEXT: 1 2 1.00 xpacd x0
+# CHECK-NEXT: 1 2 1.00 U xpaclri
+# CHECK-NEXT: 2 5 1.00 U braa x0, x1
+# CHECK-NEXT: 2 5 1.00 U brab x0, x1
+# CHECK-NEXT: 2 5 1.00 U blraa x0, x1
+# CHECK-NEXT: 2 5 1.00 U blrab x0, x1
+# CHECK-NEXT: 2 5 1.00 U braaz x0
+# CHECK-NEXT: 2 5 1.00 U brabz x0
+# CHECK-NEXT: 2 5 1.00 U blraaz x0
+# CHECK-NEXT: 2 5 1.00 U blrabz x0
+# CHECK-NEXT: 2 5 1.00 U retaa
+# CHECK-NEXT: 2 5 1.00 U retab
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1, #4088]
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1, #-4096]
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1, #4088]
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1, #-4096]
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1, #4088]!
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1, #-4096]!
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1, #4088]!
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1, #-4096]!
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1]
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1]
+# CHECK-NEXT: 2 8 1.00 * U ldraa x0, [x1, #0]!
+# CHECK-NEXT: 2 8 1.00 * U ldrab x0, [x1, #0]!
+# CHECK-NEXT: 2 8 1.00 * U ldraa xzr, [sp, #-4096]!
+# CHECK-NEXT: 2 8 1.00 * U ldrab xzr, [sp, #-4096]!
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: 5.00 5.00 56.00 4.67 4.67 4.67 - - - - 28.00 28.00 - - - - - - - -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacia1716
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacib1716
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autia1716
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autib1716
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - paciaz
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - paciasp
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacibz
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacibsp
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autiaz
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autiasp
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autibz
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autibsp
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacia x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autia x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacda x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autda x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacib x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autib x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacdb x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autdb x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacga x0, x1, x2
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - paciza x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autiza x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacdza x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autdza x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacizb x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autizb x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - pacdzb x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - autdzb x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - xpaci x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - xpacd x0
+# CHECK-NEXT: - - 1.00 - - - - - - - 0.50 0.50 - - - - - - - - xpaclri
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - braa x0, x1
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - brab x0, x1
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - blraa x0, x1
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - blrab x0, x1
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - braaz x0
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - brabz x0
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - blraaz x0
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - blrabz x0
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - retaa
+# CHECK-NEXT: 0.50 0.50 1.00 - - - - - - - 0.50 0.50 - - - - - - - - retab
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1, #4088]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1, #-4096]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1, #4088]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1, #-4096]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1, #4088]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1, #-4096]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1, #4088]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1, #-4096]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1]
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa x0, [x1, #0]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab x0, [x1, #0]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldraa xzr, [sp, #-4096]!
+# CHECK-NEXT: - - 1.00 0.33 0.33 0.33 - - - - 0.50 0.50 - - - - - - - - ldrab xzr, [sp, #-4096]!
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-rcpc-immo-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-rcpc-immo-instructions.s
new file mode 100644
index 0000000000000..3347b3fe09c8f
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-rcpc-immo-instructions.s
@@ -0,0 +1,67 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/rcpc-immo-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 6 0.33 * ldapur w7, [x24]
+# CHECK-NEXT: 1 6 0.33 * ldapur x20, [x13]
+# CHECK-NEXT: 1 6 0.33 * ldapurb w13, [x17]
+# CHECK-NEXT: 1 6 0.33 * ldapurh w3, [x22]
+# CHECK-NEXT: 1 6 0.33 * U ldapursb w7, [x8]
+# CHECK-NEXT: 1 6 0.33 * U ldapursb x29, [x7]
+# CHECK-NEXT: 1 6 0.33 * U ldapursh w17, [x19]
+# CHECK-NEXT: 1 6 0.33 * U ldapursh x3, [x3]
+# CHECK-NEXT: 1 6 0.33 * U ldapursw x3, [x18]
+# CHECK-NEXT: 2 1 0.50 * stlur w3, [x27]
+# CHECK-NEXT: 2 1 0.50 * stlur x23, [x25]
+# CHECK-NEXT: 2 1 0.50 * stlurb w30, [x17]
+# CHECK-NEXT: 2 1 0.50 * stlurh w9, [x29]
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - 3.00 3.00 3.00 - - - - - - 2.00 2.00 2.00 2.00 - - - -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapur w7, [x24]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapur x20, [x13]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapurb w13, [x17]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapurh w3, [x22]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapursb w7, [x8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapursb x29, [x7]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapursh w17, [x19]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapursh x3, [x3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldapursw x3, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlur w3, [x27]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlur x23, [x25]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlurb w30, [x17]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stlurh w9, [x29]
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s
new file mode 100644
index 0000000000000..709dda826bd56
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s
@@ -0,0 +1,6869 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/sve-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.50 abs z0.b, p0/m, z0.b
+# CHECK-NEXT: 1 1 0.50 abs z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 abs z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 1 0.50 abs z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 abs z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 abs z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 abs z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 abs z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 adclb z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 adclb z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 adclt z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 adclt z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 add z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 1 0.50 add z0.b, z0.b, #0
+# CHECK-NEXT: 1 1 0.50 add z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 1 0.50 add z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 add z0.d, z0.d, #0
+# CHECK-NEXT: 1 1 0.50 add z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 add z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 add z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 1 0.50 add z0.h, z0.h, #0
+# CHECK-NEXT: 1 1 0.50 add z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 add z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 1 0.50 add z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 add z0.s, z0.s, #0
+# CHECK-NEXT: 1 1 0.50 add z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 add z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 add z0.s, z1.s, z2.s
+# CHECK-NEXT: 1 1 0.50 add z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: 1 1 0.50 add z21.b, z10.b, z21.b
+# CHECK-NEXT: 1 1 0.50 add z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: 1 1 0.50 add z21.d, z10.d, z21.d
+# CHECK-NEXT: 1 1 0.50 add z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: 1 1 0.50 add z21.h, z10.h, z21.h
+# CHECK-NEXT: 1 1 0.50 add z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: 1 1 0.50 add z21.s, z10.s, z21.s
+# CHECK-NEXT: 1 1 0.50 add z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: 1 1 0.50 add z23.b, z13.b, z8.b
+# CHECK-NEXT: 1 1 0.50 add z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: 1 1 0.50 add z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 add z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: 1 1 0.50 add z23.h, z13.h, z8.h
+# CHECK-NEXT: 1 1 0.50 add z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: 1 1 0.50 add z23.s, z13.s, z8.s
+# CHECK-NEXT: 1 1 0.50 add z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 add z31.b, z31.b, #255
+# CHECK-NEXT: 1 1 0.50 add z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 add z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 add z31.d, z31.d, #65280
+# CHECK-NEXT: 1 1 0.50 add z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 add z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 add z31.h, z31.h, #65280
+# CHECK-NEXT: 1 1 0.50 add z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 add z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 add z31.s, z31.s, #65280
+# CHECK-NEXT: 1 1 0.50 add z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 addhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 addhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 addhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 addhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 addhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 addhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 addp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 addp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 addp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 addp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 1 0.17 addpl sp, sp, #31
+# CHECK-NEXT: 1 1 0.17 addpl x0, x0, #-32
+# CHECK-NEXT: 1 1 0.17 addpl x21, x21, #0
+# CHECK-NEXT: 1 1 0.17 addpl x23, x8, #-1
+# CHECK-NEXT: 1 1 0.17 addvl sp, sp, #31
+# CHECK-NEXT: 1 1 0.17 addvl x0, x0, #-32
+# CHECK-NEXT: 1 1 0.17 addvl x21, x21, #0
+# CHECK-NEXT: 1 1 0.17 addvl x23, x8, #-1
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, lsl #1]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, lsl #2]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, lsl #3]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, sxtw #1]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, sxtw #2]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, sxtw #3]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, sxtw]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, uxtw #1]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, uxtw #2]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, uxtw #3]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d, uxtw]
+# CHECK-NEXT: 1 1 0.50 adr z0.d, [z0.d, z0.d]
+# CHECK-NEXT: 1 1 0.50 adr z0.s, [z0.s, z0.s, lsl #1]
+# CHECK-NEXT: 1 1 0.50 adr z0.s, [z0.s, z0.s, lsl #2]
+# CHECK-NEXT: 1 1 0.50 adr z0.s, [z0.s, z0.s, lsl #3]
+# CHECK-NEXT: 1 1 0.50 adr z0.s, [z0.s, z0.s]
+# CHECK-NEXT: 1 2 0.50 aesd z0.b, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 aese z0.b, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 aesimc z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 aesimc z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 aesmc z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 aesmc z31.b, z31.b
+# CHECK-NEXT: 2 2 0.50 and p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 1 0.50 and z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 1 0.50 and z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 1 0.50 and z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 and z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 1 0.50 and z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 1 0.50 and z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 and z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 1 0.50 and z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 1 0.50 and z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 and z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 and z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 and z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 and z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 1 0.50 and z5.b, z5.b, #0xf9
+# CHECK-NEXT: 2 2 0.50 ands p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 2 4 1.00 andv b0, p7, z31.b
+# CHECK-NEXT: 2 4 1.00 andv d0, p7, z31.d
+# CHECK-NEXT: 2 4 1.00 andv h0, p7, z31.h
+# CHECK-NEXT: 2 4 1.00 andv s0, p7, z31.s
+# CHECK-NEXT: 1 2 0.50 asr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 asr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 2 0.50 asr z0.b, z0.b, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 2 0.50 asr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 asr z0.d, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 asr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 2 0.50 asr z0.h, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 2 0.50 asr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 asr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 2 0.50 asr z0.s, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 asr z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 2 0.50 asr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 2 0.50 asr z31.b, z31.b, #8
+# CHECK-NEXT: 1 2 0.50 asr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 2 0.50 asr z31.d, z31.d, #64
+# CHECK-NEXT: 1 2 0.50 asr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 2 0.50 asr z31.h, z31.h, #16
+# CHECK-NEXT: 1 2 0.50 asr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 asr z31.s, z31.s, #32
+# CHECK-NEXT: 1 3 0.50 asrd z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 asrd z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 asrd z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 asrd z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 asrd z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 asrd z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 asrd z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 asrd z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 asrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 asrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 asrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 asrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 bcax z29.d, z29.d, z30.d, z31.d
+# CHECK-NEXT: 1 3 0.50 bdep z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 bdep z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 bdep z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 bdep z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 bext z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 bext z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 bext z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 bext z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 4 1.00 bfcvt z0.h, p0/m, z1.s
+# CHECK-NEXT: 2 4 1.00 bfcvtnt z0.h, p0/m, z1.s
+# CHECK-NEXT: 2 6 1.00 bfdot z0.s, z1.h, z2.h
+# CHECK-NEXT: 2 6 1.00 bfdot z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: 2 6 1.00 bfdot z0.s, z1.h, z2.h[3]
+# CHECK-NEXT: 1 4 0.50 bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: 1 4 0.50 bfmlalb z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: 1 4 0.50 bfmlalb z0.s, z1.h, z2.h[7]
+# CHECK-NEXT: 1 4 0.50 bfmlalb z10.s, z21.h, z14.h
+# CHECK-NEXT: 1 4 0.50 bfmlalb z21.s, z14.h, z3.h[2]
+# CHECK-NEXT: 1 4 0.50 bfmlalt z0.s, z1.h, z2.h
+# CHECK-NEXT: 1 4 0.50 bfmlalt z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: 1 4 0.50 bfmlalt z0.s, z1.h, z2.h[7]
+# CHECK-NEXT: 1 4 0.50 bfmlalt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 bfmlalt z14.s, z10.h, z21.h
+# CHECK-NEXT: 4 8 2.00 bfmmla z0.s, z1.h, z2.h
+# CHECK-NEXT: 2 6 1.00 bgrp z0.b, z1.b, z31.b
+# CHECK-NEXT: 2 6 1.00 bgrp z0.d, z1.d, z31.d
+# CHECK-NEXT: 2 6 1.00 bgrp z0.h, z1.h, z31.h
+# CHECK-NEXT: 2 6 1.00 bgrp z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 2 0.50 bic p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 bic p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 1 0.50 bic z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 bic z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 bic z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 bic z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 bic z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 bic z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 bics p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 bics p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 2 0.50 brka p0.b, p15/m, p15.b
+# CHECK-NEXT: 1 2 0.50 brka p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 2 0.50 brkas p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 2 0.50 brkb p0.b, p15/m, p15.b
+# CHECK-NEXT: 1 2 0.50 brkb p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 2 0.50 brkbs p0.b, p15/z, p15.b
+# CHECK-NEXT: 2 2 0.50 brkn p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: 2 2 0.50 brkn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 brkns p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: 2 2 0.50 brkns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 brkpa p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 2 2 0.50 brkpa p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 brkpas p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 2 2 0.50 brkpas p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 brkpb p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 2 2 0.50 brkpb p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 brkpbs p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 2 2 0.50 brkpbs p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 1 0.50 bsl z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: 1 1 0.50 bsl1n z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: 1 1 0.50 bsl2n z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: 1 1 0.50 cadd z0.b, z0.b, z0.b, #90
+# CHECK-NEXT: 1 1 0.50 cadd z0.d, z0.d, z0.d, #90
+# CHECK-NEXT: 1 1 0.50 cadd z0.h, z0.h, z0.h, #90
+# CHECK-NEXT: 1 1 0.50 cadd z0.s, z0.s, z0.s, #90
+# CHECK-NEXT: 1 1 0.50 cadd z31.b, z31.b, z31.b, #270
+# CHECK-NEXT: 1 1 0.50 cadd z31.d, z31.d, z31.d, #270
+# CHECK-NEXT: 1 1 0.50 cadd z31.h, z31.h, z31.h, #270
+# CHECK-NEXT: 1 1 0.50 cadd z31.s, z31.s, z31.s, #270
+# CHECK-NEXT: 1 3 0.50 cdot z0.d, z1.h, z15.h[1], #0
+# CHECK-NEXT: 1 3 0.50 cdot z0.d, z1.h, z31.h, #0
+# CHECK-NEXT: 1 3 0.50 cdot z0.d, z1.h, z31.h, #180
+# CHECK-NEXT: 1 3 0.50 cdot z0.d, z1.h, z31.h, #270
+# CHECK-NEXT: 1 3 0.50 cdot z0.d, z1.h, z31.h, #90
+# CHECK-NEXT: 1 3 0.50 cdot z0.s, z1.b, z31.b, #0
+# CHECK-NEXT: 1 3 0.50 cdot z0.s, z1.b, z7.b[3], #0
+# CHECK-NEXT: 1 3 0.50 cdot z29.d, z30.h, z0.h[0], #180
+# CHECK-NEXT: 1 3 0.50 cdot z31.d, z30.h, z7.h[1], #270
+# CHECK-NEXT: 1 3 0.50 cdot z5.d, z6.h, z3.h[0], #90
+# CHECK-NEXT: 1 2 0.50 clasta b0, p7, b0, z31.b
+# CHECK-NEXT: 1 2 0.50 clasta d0, p7, d0, z31.d
+# CHECK-NEXT: 1 2 0.50 clasta h0, p7, h0, z31.h
+# CHECK-NEXT: 1 2 0.50 clasta s0, p7, s0, z31.s
+# CHECK-NEXT: 2 9 0.50 clasta w0, p7, w0, z31.b
+# CHECK-NEXT: 2 9 0.50 clasta w0, p7, w0, z31.h
+# CHECK-NEXT: 2 9 0.50 clasta w0, p7, w0, z31.s
+# CHECK-NEXT: 2 9 0.50 clasta x0, p7, x0, z31.d
+# CHECK-NEXT: 1 2 0.50 clasta z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 clasta z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 clasta z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 clasta z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 clastb b0, p7, b0, z31.b
+# CHECK-NEXT: 1 2 0.50 clastb d0, p7, d0, z31.d
+# CHECK-NEXT: 1 2 0.50 clastb h0, p7, h0, z31.h
+# CHECK-NEXT: 1 2 0.50 clastb s0, p7, s0, z31.s
+# CHECK-NEXT: 2 9 0.50 clastb w0, p7, w0, z31.b
+# CHECK-NEXT: 2 9 0.50 clastb w0, p7, w0, z31.h
+# CHECK-NEXT: 2 9 0.50 clastb w0, p7, w0, z31.s
+# CHECK-NEXT: 2 9 0.50 clastb x0, p7, x0, z31.d
+# CHECK-NEXT: 1 2 0.50 clastb z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 clastb z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 clastb z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 clastb z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: 1 1 0.50 cls z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 cls z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 cls z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 cls z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 clz z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 clz z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 clz z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 clz z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 cmla z0.b, z1.b, z2.b, #0
+# CHECK-NEXT: 1 4 1.00 cmla z0.d, z1.d, z2.d, #0
+# CHECK-NEXT: 1 3 0.50 cmla z0.h, z1.h, z2.h, #0
+# CHECK-NEXT: 1 3 0.50 cmla z0.h, z1.h, z2.h[0], #0
+# CHECK-NEXT: 1 3 0.50 cmla z0.s, z1.s, z2.s, #0
+# CHECK-NEXT: 1 3 0.50 cmla z0.s, z1.s, z2.s[0], #0
+# CHECK-NEXT: 1 3 0.50 cmla z15.b, z16.b, z17.b, #270
+# CHECK-NEXT: 1 4 1.00 cmla z15.d, z16.d, z17.d, #270
+# CHECK-NEXT: 1 3 0.50 cmla z15.h, z16.h, z17.h, #270
+# CHECK-NEXT: 1 3 0.50 cmla z15.s, z16.s, z17.s, #270
+# CHECK-NEXT: 1 3 0.50 cmla z29.b, z30.b, z31.b, #90
+# CHECK-NEXT: 1 4 1.00 cmla z29.d, z30.d, z31.d, #90
+# CHECK-NEXT: 1 3 0.50 cmla z29.h, z30.h, z31.h, #90
+# CHECK-NEXT: 1 3 0.50 cmla z29.s, z30.s, z31.s, #90
+# CHECK-NEXT: 1 3 0.50 cmla z31.b, z31.b, z31.b, #180
+# CHECK-NEXT: 1 4 1.00 cmla z31.d, z31.d, z31.d, #180
+# CHECK-NEXT: 1 3 0.50 cmla z31.h, z30.h, z7.h[0], #180
+# CHECK-NEXT: 1 3 0.50 cmla z31.h, z31.h, z31.h, #180
+# CHECK-NEXT: 1 3 0.50 cmla z31.s, z30.s, z7.s[0], #180
+# CHECK-NEXT: 1 3 0.50 cmla z31.s, z31.s, z31.s, #180
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpeq p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmpge p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmpge p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmpge p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpge p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpge p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpge p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmpge p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmpge p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpge p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmpge p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmpge p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpge p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpge p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmpge p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmpge p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpge p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmpge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmpgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmphi p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 cmphi p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 2 0.50 cmphi p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmphi p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphi p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmphi p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 cmphi p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 2 0.50 cmphi p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphi p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphi p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 cmphi p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 2 0.50 cmphi p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphi p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmphi p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmphi p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 cmphi p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 2 0.50 cmphi p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphi p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmphi p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmphs p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 cmphs p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 2 0.50 cmphs p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmphs p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphs p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmphs p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 cmphs p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 2 0.50 cmphs p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphs p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphs p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 cmphs p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 2 0.50 cmphs p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphs p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmphs p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmphs p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 cmphs p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 2 0.50 cmphs p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmphs p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmphs p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 cmple p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmple p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmple p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmple p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmple p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmple p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmple p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmple p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmple p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmple p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmple p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplo p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 cmplo p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 2 0.50 cmplo p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplo p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 cmplo p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 2 0.50 cmplo p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 cmplo p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 2 0.50 cmplo p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplo p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 cmplo p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 2 0.50 cmplo p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpls p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 cmpls p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 2 0.50 cmpls p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpls p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 cmpls p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 2 0.50 cmpls p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 cmpls p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 2 0.50 cmpls p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpls p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 cmpls p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 2 0.50 cmpls p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmplt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmplt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmplt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmplt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmplt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmplt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmplt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmplt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmplt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpne p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 2 0.50 cmpne p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 2 0.50 cmpne p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 cmpne p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpne p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 2 0.50 cmpne p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 2 0.50 cmpne p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpne p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 2 0.50 cmpne p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 2 0.50 cmpne p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpne p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 cmpne p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 2 0.50 cmpne p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 2 0.50 cmpne p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 2 0.50 cmpne p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 cnot z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 cnot z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 cnot z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 cnot z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 cnt z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 2 0.50 cnt z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 cnt z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 2 0.50 cnt z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.17 cntb x0
+# CHECK-NEXT: 1 1 0.17 cntb x0, #28
+# CHECK-NEXT: 1 1 0.17 cntb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 cntb x0, pow2
+# CHECK-NEXT: 1 1 0.17 cntd x0
+# CHECK-NEXT: 1 1 0.17 cntd x0, #28
+# CHECK-NEXT: 1 1 0.17 cntd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 cntd x0, pow2
+# CHECK-NEXT: 1 1 0.17 cnth x0
+# CHECK-NEXT: 1 1 0.17 cnth x0, #28
+# CHECK-NEXT: 1 1 0.17 cnth x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 cnth x0, pow2
+# CHECK-NEXT: 2 5 0.50 cntp x0, p15, p0.b
+# CHECK-NEXT: 2 5 0.50 cntp x0, p15, p0.d
+# CHECK-NEXT: 2 5 0.50 cntp x0, p15, p0.h
+# CHECK-NEXT: 2 5 0.50 cntp x0, p15, p0.s
+# CHECK-NEXT: 1 1 0.17 cntw x0
+# CHECK-NEXT: 1 1 0.17 cntw x0, #28
+# CHECK-NEXT: 1 1 0.17 cntw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 cntw x0, pow2
+# CHECK-NEXT: 1 2 0.50 compact z31.d, p7, z31.d
+# CHECK-NEXT: 1 2 0.50 compact z31.s, p7, z31.s
+# CHECK-NEXT: 1 1 0.50 ctermeq w30, wzr
+# CHECK-NEXT: 1 1 0.50 ctermeq wzr, w30
+# CHECK-NEXT: 1 1 0.50 ctermeq x30, xzr
+# CHECK-NEXT: 1 1 0.50 ctermeq xzr, x30
+# CHECK-NEXT: 1 1 0.50 ctermne w30, wzr
+# CHECK-NEXT: 1 1 0.50 ctermne wzr, w30
+# CHECK-NEXT: 1 1 0.50 ctermne x30, xzr
+# CHECK-NEXT: 1 1 0.50 ctermne xzr, x30
+# CHECK-NEXT: 1 2 0.50 decb x0
+# CHECK-NEXT: 1 2 0.50 decb x0, #14
+# CHECK-NEXT: 1 2 0.50 decb x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 decb x0, pow2
+# CHECK-NEXT: 1 2 0.50 decb x0, vl1
+# CHECK-NEXT: 1 2 0.50 decd x0
+# CHECK-NEXT: 1 2 0.50 decd x0, #14
+# CHECK-NEXT: 1 2 0.50 decd x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 decd x0, pow2
+# CHECK-NEXT: 1 2 0.50 decd x0, vl1
+# CHECK-NEXT: 1 2 0.50 dech x0
+# CHECK-NEXT: 1 2 0.50 dech x0, #14
+# CHECK-NEXT: 1 2 0.50 dech x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 dech x0, pow2
+# CHECK-NEXT: 1 2 0.50 dech x0, vl1
+# CHECK-NEXT: 2 6 0.50 decp x0, p0.b
+# CHECK-NEXT: 2 6 0.50 decp x0, p0.d
+# CHECK-NEXT: 2 6 0.50 decp x0, p0.h
+# CHECK-NEXT: 2 6 0.50 decp x0, p0.s
+# CHECK-NEXT: 2 6 0.50 decp xzr, p15.b
+# CHECK-NEXT: 2 6 0.50 decp xzr, p15.d
+# CHECK-NEXT: 2 6 0.50 decp xzr, p15.h
+# CHECK-NEXT: 2 6 0.50 decp xzr, p15.s
+# CHECK-NEXT: 2 3 0.50 decp z31.d, p15.d
+# CHECK-NEXT: 2 3 0.50 decp z31.h, p15.h
+# CHECK-NEXT: 2 3 0.50 decp z31.s, p15.s
+# CHECK-NEXT: 1 2 0.50 decw x0
+# CHECK-NEXT: 1 2 0.50 decw x0, #14
+# CHECK-NEXT: 1 2 0.50 decw x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 decw x0, pow2
+# CHECK-NEXT: 1 2 0.50 decw x0, vl1
+# CHECK-NEXT: 1 1 0.50 dupm z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 1 0.50 dupm z0.s, #0xfffffff9
+# CHECK-NEXT: 1 1 0.50 dupm z23.h, #0xfff9
+# CHECK-NEXT: 1 1 0.50 dupm z5.b, #0xf9
+# CHECK-NEXT: 2 2 0.50 eor p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 1 0.50 eor z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 1 0.50 eor z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 1 0.50 eor z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 eor z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 1 0.50 eor z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 1 0.50 eor z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 eor z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 1 0.50 eor z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 1 0.50 eor z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 eor z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 eor z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 eor z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 eor z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 1 0.50 eor z5.b, z5.b, #0xf9
+# CHECK-NEXT: 1 1 0.50 eor3 z29.d, z29.d, z30.d, z31.d
+# CHECK-NEXT: 1 1 0.50 eorbt z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 1 0.50 eorbt z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 eorbt z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 1 0.50 eorbt z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 2 0.50 eors p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 1 0.50 eortb z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 1 0.50 eortb z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 eortb z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 1 0.50 eortb z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 4 1.00 eorv b0, p7, z31.b
+# CHECK-NEXT: 2 4 1.00 eorv d0, p7, z31.d
+# CHECK-NEXT: 2 4 1.00 eorv h0, p7, z31.h
+# CHECK-NEXT: 2 4 1.00 eorv s0, p7, z31.s
+# CHECK-NEXT: 1 2 0.50 ext z0.b, { z1.b, z2.b }, #0
+# CHECK-NEXT: 1 2 0.50 ext z31.b, z31.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 ext z31.b, z31.b, z0.b, #255
+# CHECK-NEXT: 1 2 0.50 ext z31.b, { z30.b, z31.b }, #255
+# CHECK-NEXT: 1 2 0.50 fabd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fabd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fabd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 1 0.50 fabs z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 fabs z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 fabs z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 facge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 facge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 facge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 facge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 facge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 facge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 facgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 facgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 facgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 facgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 facgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 facgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 fadd z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 2 0.50 fadd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fadd z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fadd z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 2 0.50 fadd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fadd z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fadd z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 2 0.50 fadd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fadd z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fadd z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fadd z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fadd z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 20 6.00 fadda d0, p7, d0, z31.d
+# CHECK-NEXT: 1 42 9.00 fadda h0, p7, h0, z31.h
+# CHECK-NEXT: 1 26 5.00 fadda s0, p7, s0, z31.s
+# CHECK-NEXT: 1 3 0.50 faddp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 faddp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 faddp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 3 9 1.50 faddv d0, p7, z31.d
+# CHECK-NEXT: 5 15 2.50 faddv h0, p7, z31.h
+# CHECK-NEXT: 4 12 2.00 faddv s0, p7, z31.s
+# CHECK-NEXT: 1 3 0.50 fcadd z0.d, p0/m, z0.d, z0.d, #90
+# CHECK-NEXT: 1 3 0.50 fcadd z0.h, p0/m, z0.h, z0.h, #90
+# CHECK-NEXT: 1 3 0.50 fcadd z0.s, p0/m, z0.s, z0.s, #90
+# CHECK-NEXT: 1 3 0.50 fcadd z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: 1 3 0.50 fcadd z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: 1 3 0.50 fcadd z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmeq p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 fcmge p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 fcmge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 fcmge p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 fcmge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 fcmge p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 fcmge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 fcmgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 0.50 fcmla z0.d, p0/m, z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: 1 4 0.50 fcmla z0.h, p0/m, z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 fcmla z0.h, p0/m, z1.h, z2.h, #90
+# CHECK-NEXT: 1 4 0.50 fcmla z0.h, z0.h, z0.h[0], #0
+# CHECK-NEXT: 1 4 0.50 fcmla z0.s, p0/m, z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 fcmla z0.s, p0/m, z1.s, z2.s, #90
+# CHECK-NEXT: 1 4 0.50 fcmla z21.s, z10.s, z5.s[1], #90
+# CHECK-NEXT: 1 4 0.50 fcmla z23.s, z13.s, z8.s[0], #270
+# CHECK-NEXT: 1 4 0.50 fcmla z29.d, p7/m, z30.d, z31.d, #180
+# CHECK-NEXT: 1 4 0.50 fcmla z29.h, p7/m, z30.h, z31.h, #180
+# CHECK-NEXT: 1 4 0.50 fcmla z29.s, p7/m, z30.s, z31.s, #180
+# CHECK-NEXT: 1 4 0.50 fcmla z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: 1 4 0.50 fcmla z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: 1 4 0.50 fcmla z31.h, z31.h, z7.h[3], #270
+# CHECK-NEXT: 1 4 0.50 fcmla z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: 1 2 0.50 fcmle p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmle p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmle p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmlt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmlt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmlt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmne p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmne p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 fcmne p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmne p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 fcmne p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fcmne p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 2 0.50 fcmuo p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 2 0.50 fcmuo p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 fcmuo p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 2 4 1.00 fcvt z0.d, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvt z0.d, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 fcvt z0.h, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvt z0.h, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 fcvt z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvt z0.s, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtlt z0.s, p0/m, z1.h
+# CHECK-NEXT: 2 4 1.00 fcvtlt z30.d, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 fcvtnt z0.h, p0/m, z1.s
+# CHECK-NEXT: 2 4 1.00 fcvtnt z30.s, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 fcvtx z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvtx z30.s, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 fcvtxnt z0.s, p0/m, z1.d
+# CHECK-NEXT: 2 4 1.00 fcvtxnt z30.s, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.d, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.d, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.d, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.h, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.s, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzs z0.s, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.d, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.d, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.d, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.h, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.s, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 fcvtzu z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 9 1.00 fdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 5 1.00 fdiv z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 7 1.00 fdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 fdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 5 1.00 fdivr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 7 1.00 fdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 4 1.00 fexpa z0.d, z31.d
+# CHECK-NEXT: 2 4 1.00 fexpa z0.h, z31.h
+# CHECK-NEXT: 2 4 1.00 fexpa z0.s, z31.s
+# CHECK-NEXT: 2 4 1.00 flogb z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 flogb z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 flogb z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 fmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fmax z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fmax z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fmax z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fmax z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fmax z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fmax z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fmax z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fmax z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fmax z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fmaxnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fmaxnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 3 0.50 fmaxnmp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 fmaxnmp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 fmaxnmp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 2 6 1.00 fmaxnmv d0, p7, z31.d
+# CHECK-NEXT: 2 6 1.00 fmaxnmv h0, p7, z31.h
+# CHECK-NEXT: 2 6 1.00 fmaxnmv s0, p7, z31.s
+# CHECK-NEXT: 1 3 0.50 fmaxp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 fmaxp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 fmaxp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 2 6 1.00 fmaxv d0, p7, z31.d
+# CHECK-NEXT: 2 6 1.00 fmaxv h0, p7, z31.h
+# CHECK-NEXT: 2 6 1.00 fmaxv s0, p7, z31.s
+# CHECK-NEXT: 1 2 0.50 fmin z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fmin z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fmin z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fmin z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fmin z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fmin z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fmin z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fmin z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fmin z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 2 0.50 fminnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 2 0.50 fminnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fminnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 2 0.50 fminnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fminnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 2 0.50 fminnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fminnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fminnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fminnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 3 0.50 fminnmp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 fminnmp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 fminnmp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 2 6 1.00 fminnmv d0, p7, z31.d
+# CHECK-NEXT: 2 6 1.00 fminnmv h0, p7, z31.h
+# CHECK-NEXT: 2 6 1.00 fminnmv s0, p7, z31.s
+# CHECK-NEXT: 1 3 0.50 fminp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 fminp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 fminp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 2 6 1.00 fminv d0, p7, z31.d
+# CHECK-NEXT: 2 6 1.00 fminv h0, p7, z31.h
+# CHECK-NEXT: 2 6 1.00 fminv s0, p7, z31.s
+# CHECK-NEXT: 1 4 0.50 fmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fmla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 4 0.50 fmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 fmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fmla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 4 0.50 fmlalb z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: 1 4 0.50 fmlalb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmlalb z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 fmlalt z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: 1 4 0.50 fmlalt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmlalt z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 fmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fmls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 4 0.50 fmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 fmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fmls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 4 0.50 fmlslb z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: 1 4 0.50 fmlslb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmlslb z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: 1 4 0.50 fmlslt z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: 1 4 0.50 fmlslt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmlslt z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: 1 2 0.50 fmov z0.d, #-10.00000000
+# CHECK-NEXT: 1 2 0.50 fmov z0.d, #0.12500000
+# CHECK-NEXT: 1 2 0.50 fmov z0.d, p0/m, #-10.00000000
+# CHECK-NEXT: 1 2 0.50 fmov z0.d, p0/m, #0.12500000
+# CHECK-NEXT: 1 2 0.50 fmov z0.h, #-0.12500000
+# CHECK-NEXT: 1 2 0.50 fmov z0.h, p0/m, #-0.12500000
+# CHECK-NEXT: 1 2 0.50 fmov z0.s, #-0.12500000
+# CHECK-NEXT: 1 2 0.50 fmov z0.s, p0/m, #-0.12500000
+# CHECK-NEXT: 1 4 0.50 fmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 fmul z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 3 0.50 fmul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 3 0.50 fmul z0.d, z0.d, z0.d[0]
+# CHECK-NEXT: 1 3 0.50 fmul z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 fmul z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 3 0.50 fmul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 fmul z0.h, z0.h, z0.h[0]
+# CHECK-NEXT: 1 3 0.50 fmul z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 fmul z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 3 0.50 fmul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 fmul z0.s, z0.s, z0.s[0]
+# CHECK-NEXT: 1 3 0.50 fmul z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 fmul z31.d, p7/m, z31.d, #2.0
+# CHECK-NEXT: 1 3 0.50 fmul z31.d, z31.d, z15.d[1]
+# CHECK-NEXT: 1 3 0.50 fmul z31.h, p7/m, z31.h, #2.0
+# CHECK-NEXT: 1 3 0.50 fmul z31.h, z31.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 fmul z31.s, p7/m, z31.s, #2.0
+# CHECK-NEXT: 1 3 0.50 fmul z31.s, z31.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 fmulx z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 3 0.50 fmulx z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 fmulx z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 1 0.50 fneg z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 fneg z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 fneg z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 fnmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fnmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fnmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fnmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fnmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fnmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fnmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fnmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fnmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fnmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fnmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fnmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 2 4 1.00 frecpe z0.d, z31.d
+# CHECK-NEXT: 2 4 1.00 frecpe z0.h, z31.h
+# CHECK-NEXT: 2 4 1.00 frecpe z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 frecps z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 frecps z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 frecps z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 4 1.00 frecpx z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frecpx z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frecpx z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frinta z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frinta z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frinta z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frinti z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frinti z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frinti z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frintm z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frintm z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frintm z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frintn z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frintn z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frintn z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frintp z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frintp z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frintp z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frintx z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frintx z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frintx z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frintz z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 4 1.00 frintz z31.h, p7/m, z31.h
+# CHECK-NEXT: 2 4 1.00 frintz z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 4 1.00 frsqrte z0.d, z31.d
+# CHECK-NEXT: 2 4 1.00 frsqrte z0.h, z31.h
+# CHECK-NEXT: 2 4 1.00 frsqrte z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 frsqrts z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 frsqrts z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 frsqrts z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 fscale z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 3 0.50 fscale z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 fscale z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 fsqrt z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 5 1.00 fsqrt z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 7 1.00 fsqrt z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 fsub z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 2 0.50 fsub z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fsub z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fsub z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 2 0.50 fsub z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fsub z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fsub z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 2 0.50 fsub z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fsub z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fsub z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fsub z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fsub z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 2 0.50 fsubr z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 2 0.50 fsubr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 fsubr z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 2 0.50 fsubr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 fsubr z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 2 0.50 fsubr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 fsubr z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 2 0.50 fsubr z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 2 0.50 fsubr z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 4 0.50 ftmad z0.d, z0.d, z31.d, #7
+# CHECK-NEXT: 1 4 0.50 ftmad z0.h, z0.h, z31.h, #7
+# CHECK-NEXT: 1 4 0.50 ftmad z0.s, z0.s, z31.s, #7
+# CHECK-NEXT: 1 3 0.50 ftsmul z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 ftsmul z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 ftsmul z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 ftssel z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 ftssel z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 1 0.50 ftssel z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 histcnt z0.s, p0/z, z1.s, z2.s
+# CHECK-NEXT: 1 2 0.50 histcnt z29.d, p7/z, z30.d, z31.d
+# CHECK-NEXT: 1 2 0.50 histseg z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 2 0.50 incb x0
+# CHECK-NEXT: 1 2 0.50 incb x0, #14
+# CHECK-NEXT: 1 2 0.50 incb x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 incb x0, pow2
+# CHECK-NEXT: 1 2 0.50 incb x0, vl1
+# CHECK-NEXT: 1 2 0.50 incd x0
+# CHECK-NEXT: 1 2 0.50 incd x0, #14
+# CHECK-NEXT: 1 2 0.50 incd x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 incd x0, pow2
+# CHECK-NEXT: 1 2 0.50 incd x0, vl1
+# CHECK-NEXT: 2 5 1.00 incd z0.d
+# CHECK-NEXT: 2 5 1.00 incd z0.d, all, mul #16
+# CHECK-NEXT: 1 2 0.50 inch x0
+# CHECK-NEXT: 1 2 0.50 inch x0, #14
+# CHECK-NEXT: 1 2 0.50 inch x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 inch x0, pow2
+# CHECK-NEXT: 1 2 0.50 inch x0, vl1
+# CHECK-NEXT: 2 5 1.00 inch z0.h
+# CHECK-NEXT: 2 5 1.00 inch z0.h, all, mul #16
+# CHECK-NEXT: 2 6 0.50 incp x0, p0.b
+# CHECK-NEXT: 2 6 0.50 incp x0, p0.d
+# CHECK-NEXT: 2 6 0.50 incp x0, p0.h
+# CHECK-NEXT: 2 6 0.50 incp x0, p0.s
+# CHECK-NEXT: 2 6 0.50 incp xzr, p15.b
+# CHECK-NEXT: 2 6 0.50 incp xzr, p15.d
+# CHECK-NEXT: 2 6 0.50 incp xzr, p15.h
+# CHECK-NEXT: 2 6 0.50 incp xzr, p15.s
+# CHECK-NEXT: 2 3 0.50 incp z31.d, p15.d
+# CHECK-NEXT: 2 3 0.50 incp z31.h, p15.h
+# CHECK-NEXT: 2 3 0.50 incp z31.s, p15.s
+# CHECK-NEXT: 1 2 0.50 incw x0
+# CHECK-NEXT: 1 2 0.50 incw x0, #14
+# CHECK-NEXT: 1 2 0.50 incw x0, all, mul #16
+# CHECK-NEXT: 1 2 0.50 incw x0, pow2
+# CHECK-NEXT: 1 2 0.50 incw x0, vl1
+# CHECK-NEXT: 2 5 1.00 incw z0.s
+# CHECK-NEXT: 2 5 1.00 incw z0.s, all, mul #16
+# CHECK-NEXT: 1 3 0.50 index z0.b, #0, #0
+# CHECK-NEXT: 2 4 1.00 index z0.d, #0, #0
+# CHECK-NEXT: 1 3 0.50 index z0.h, #0, #0
+# CHECK-NEXT: 6 10 1.50 index z0.h, w0, w0
+# CHECK-NEXT: 1 3 0.50 index z0.s, #0, #0
+# CHECK-NEXT: 6 10 1.50 index z21.b, w10, w21
+# CHECK-NEXT: 8 11 2.00 index z21.d, x10, x21
+# CHECK-NEXT: 6 10 1.50 index z21.s, w10, w21
+# CHECK-NEXT: 2 10 0.50 index z23.b, #13, w8
+# CHECK-NEXT: 2 10 0.50 index z23.b, w13, #8
+# CHECK-NEXT: 4 11 1.00 index z23.d, #13, x8
+# CHECK-NEXT: 4 11 1.00 index z23.d, x13, #8
+# CHECK-NEXT: 2 10 0.50 index z23.h, #13, w8
+# CHECK-NEXT: 2 10 0.50 index z23.h, w13, #8
+# CHECK-NEXT: 2 10 0.50 index z23.s, #13, w8
+# CHECK-NEXT: 2 10 0.50 index z23.s, w13, #8
+# CHECK-NEXT: 1 3 0.50 index z31.b, #-1, #-1
+# CHECK-NEXT: 2 10 0.50 index z31.b, #-1, wzr
+# CHECK-NEXT: 2 10 0.50 index z31.b, wzr, #-1
+# CHECK-NEXT: 6 10 1.50 index z31.b, wzr, wzr
+# CHECK-NEXT: 2 4 1.00 index z31.d, #-1, #-1
+# CHECK-NEXT: 4 11 1.00 index z31.d, #-1, xzr
+# CHECK-NEXT: 4 11 1.00 index z31.d, xzr, #-1
+# CHECK-NEXT: 8 11 2.00 index z31.d, xzr, xzr
+# CHECK-NEXT: 1 3 0.50 index z31.h, #-1, #-1
+# CHECK-NEXT: 2 10 0.50 index z31.h, #-1, wzr
+# CHECK-NEXT: 2 10 0.50 index z31.h, wzr, #-1
+# CHECK-NEXT: 6 10 1.50 index z31.h, wzr, wzr
+# CHECK-NEXT: 1 3 0.50 index z31.s, #-1, #-1
+# CHECK-NEXT: 2 10 0.50 index z31.s, #-1, wzr
+# CHECK-NEXT: 2 10 0.50 index z31.s, wzr, #-1
+# CHECK-NEXT: 6 10 1.50 index z31.s, wzr, wzr
+# CHECK-NEXT: 2 6 0.50 insr z0.b, w0
+# CHECK-NEXT: 2 6 0.50 insr z0.d, x0
+# CHECK-NEXT: 2 6 0.50 insr z0.h, w0
+# CHECK-NEXT: 2 6 0.50 insr z0.s, w0
+# CHECK-NEXT: 1 2 0.50 insr z31.b, b31
+# CHECK-NEXT: 2 6 0.50 insr z31.b, wzr
+# CHECK-NEXT: 1 2 0.50 insr z31.d, d31
+# CHECK-NEXT: 2 6 0.50 insr z31.d, xzr
+# CHECK-NEXT: 1 2 0.50 insr z31.h, h31
+# CHECK-NEXT: 2 6 0.50 insr z31.h, wzr
+# CHECK-NEXT: 1 2 0.50 insr z31.s, s31
+# CHECK-NEXT: 2 6 0.50 insr z31.s, wzr
+# CHECK-NEXT: 1 2 0.50 lasta b0, p7, z31.b
+# CHECK-NEXT: 1 2 0.50 lasta d0, p7, z31.d
+# CHECK-NEXT: 1 2 0.50 lasta h0, p7, z31.h
+# CHECK-NEXT: 1 2 0.50 lasta s0, p7, z31.s
+# CHECK-NEXT: 2 5 0.50 lasta w0, p7, z31.b
+# CHECK-NEXT: 2 5 0.50 lasta w0, p7, z31.h
+# CHECK-NEXT: 2 5 0.50 lasta w0, p7, z31.s
+# CHECK-NEXT: 2 5 0.50 lasta x0, p7, z31.d
+# CHECK-NEXT: 1 2 0.50 lastb b0, p7, z31.b
+# CHECK-NEXT: 1 2 0.50 lastb d0, p7, z31.d
+# CHECK-NEXT: 1 2 0.50 lastb h0, p7, z31.h
+# CHECK-NEXT: 1 2 0.50 lastb s0, p7, z31.s
+# CHECK-NEXT: 2 5 0.50 lastb w0, p7, z31.b
+# CHECK-NEXT: 2 5 0.50 lastb w0, p7, z31.h
+# CHECK-NEXT: 2 5 0.50 lastb w0, p7, z31.s
+# CHECK-NEXT: 2 5 0.50 lastb x0, p7, z31.d
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.b }, p0/z, [sp, x0]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 8 10 2.67 * ld1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 10 2.67 * ld1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 6 0.33 * ld1b { z5.h }, p3/z, [x17, x16]
+# CHECK-NEXT: 8 10 2.67 * ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 8 10 2.67 * ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 1 6 0.33 * ld1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * ld1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
+# CHECK-NEXT: 1 6 0.33 * ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
+# CHECK-NEXT: 8 10 2.67 * ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: 1 6 0.33 * ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z31.b }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rd { z31.d }, p7/z, [sp, #504]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z31.h }, p7/z, [sp, #126]
+# CHECK-NEXT: 2 8 0.50 * ld1rh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 6 0.33 * ld1rqb { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * ld1rqb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1rqb { z21.b }, p5/z, [x10, #112]
+# CHECK-NEXT: 1 6 0.33 * ld1rqb { z23.b }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 6 0.33 * ld1rqb { z31.b }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 6 0.33 * ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 6 0.33 * ld1rqd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1rqd { z23.d }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 6 0.33 * ld1rqd { z23.d }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 6 0.33 * ld1rqd { z31.d }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 6 0.33 * ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1rqh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1rqh { z23.h }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 6 0.33 * ld1rqh { z23.h }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 6 0.33 * ld1rqh { z31.h }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 6 0.33 * ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1rqw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ld1rqw { z23.s }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 6 0.33 * ld1rqw { z23.s }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 6 0.33 * ld1rqw { z31.s }, p7/z, [sp, #-16]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rsb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: 2 8 0.50 * ld1rsh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: 2 8 0.50 * ld1rsh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: 2 8 0.50 * ld1rsw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rsw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: 2 8 0.50 * ld1rw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 2 8 0.50 * ld1rw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: 2 8 0.50 * ld1rw { z31.s }, p7/z, [sp, #252]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z0.h }, p0/z, [sp, x0]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 8 10 2.67 * ld1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 10 2.67 * ld1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 6 0.33 * ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 8 10 2.67 * ld1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 8 10 2.67 * ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 6 0.33 * ld1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: 8 10 2.67 * ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 4 9 1.33 * ld1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 6 0.33 * ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: 8 10 2.67 * ld1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: 4 8 1.00 * ld2b { z0.b, z1.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 8 1.00 * ld2b { z0.b, z1.b }, p0/z, [x0]
+# CHECK-NEXT: 4 8 1.00 * ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2b { z5.b, z6.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 4 8 1.00 * ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 4 8 1.00 * ld2d { z0.d, z1.d }, p0/z, [x0]
+# CHECK-NEXT: 4 8 1.00 * ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 4 8 1.00 * ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 8 1.00 * ld2h { z0.h, z1.h }, p0/z, [x0]
+# CHECK-NEXT: 4 8 1.00 * ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 4 8 1.00 * ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 4 8 1.00 * ld2w { z0.s, z1.s }, p0/z, [x0]
+# CHECK-NEXT: 4 8 1.00 * ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 4 8 1.00 * ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 9 10 3.00 * ld3b { z0.b - z2.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 9 10 3.00 * ld3b { z0.b - z2.b }, p0/z, [x0]
+# CHECK-NEXT: 9 10 3.00 * ld3b { z21.b - z23.b }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3b { z23.b - z25.b }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3b { z5.b - z7.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 6 10 1.50 * ld3d { z0.d - z2.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 6 10 1.50 * ld3d { z0.d - z2.d }, p0/z, [x0]
+# CHECK-NEXT: 6 10 1.50 * ld3d { z21.d - z23.d }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 6 10 1.50 * ld3d { z23.d - z25.d }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 6 10 1.50 * ld3d { z5.d - z7.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 9 10 3.00 * ld3h { z0.h - z2.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 9 10 3.00 * ld3h { z0.h - z2.h }, p0/z, [x0]
+# CHECK-NEXT: 9 10 3.00 * ld3h { z21.h - z23.h }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3h { z23.h - z25.h }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3h { z5.h - z7.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 9 10 3.00 * ld3w { z0.s - z2.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 9 10 3.00 * ld3w { z0.s - z2.s }, p0/z, [x0]
+# CHECK-NEXT: 9 10 3.00 * ld3w { z21.s - z23.s }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3w { z23.s - z25.s }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 9 10 3.00 * ld3w { z5.s - z7.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 12 11 4.00 * ld4b { z0.b - z3.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 12 11 4.00 * ld4b { z0.b - z3.b }, p0/z, [x0]
+# CHECK-NEXT: 12 11 4.00 * ld4b { z21.b - z24.b }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4b { z23.b - z26.b }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4b { z5.b - z8.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 8 11 2.00 * ld4d { z0.d - z3.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 8 11 2.00 * ld4d { z0.d - z3.d }, p0/z, [x0]
+# CHECK-NEXT: 8 11 2.00 * ld4d { z21.d - z24.d }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 8 11 2.00 * ld4d { z23.d - z26.d }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 8 11 2.00 * ld4d { z5.d - z8.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 12 11 4.00 * ld4h { z0.h - z3.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 12 11 4.00 * ld4h { z0.h - z3.h }, p0/z, [x0]
+# CHECK-NEXT: 12 11 4.00 * ld4h { z21.h - z24.h }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4h { z23.h - z26.h }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4h { z5.h - z8.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 12 11 4.00 * ld4w { z0.s - z3.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 12 11 4.00 * ld4w { z0.s - z3.s }, p0/z, [x0]
+# CHECK-NEXT: 12 11 4.00 * ld4w { z21.s - z24.s }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4w { z23.s - z26.s }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 12 11 4.00 * ld4w { z5.s - z8.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z31.b }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 1 6 0.33 * U ldff1b { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 6 0.33 * U ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 8 10 2.67 * U ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 8 10 2.67 * U ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 4 9 1.33 * U ldff1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 4 9 1.33 * U ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: 4 9 1.33 * U ldff1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1d { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 6 0.33 * U ldff1h { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sb { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sh { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sh { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1sw { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 6 0.33 * U ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 6 0.33 * U ldff1w { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 4 9 1.33 * U ldff1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: 1 6 0.33 * U ldff1w { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 8 10 2.67 * U ldff1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * U ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1b { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1d { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1h { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sb { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sh { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sw { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sw { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1sw { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: 1 6 0.33 * ldnt1w { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: 2 8 0.50 * ldr p0, [x0]
+# CHECK-NEXT: 2 8 0.50 * ldr p5, [x10, #255, mul vl]
+# CHECK-NEXT: 2 8 0.50 * ldr p7, [x13, #-256, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldr z0, [x0]
+# CHECK-NEXT: 1 6 0.33 * ldr z23, [x13, #255, mul vl]
+# CHECK-NEXT: 1 6 0.33 * ldr z31, [sp, #-256, mul vl]
+# CHECK-NEXT: 1 2 0.50 lsl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 lsl z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 lsl z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 lsl z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 2 0.50 lsl z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 lsl z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 2 0.50 lsl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 lsl z31.b, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 lsl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 lsl z31.d, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 lsl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 lsl z31.h, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 lsl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 lsl z31.s, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 lslr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 lslr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 lslr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 lslr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 lsr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 lsr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.b, z0.b, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.d, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 lsr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.h, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 lsr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 2 0.50 lsr z0.s, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 lsr z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 2 0.50 lsr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 2 0.50 lsr z31.b, z31.b, #8
+# CHECK-NEXT: 1 2 0.50 lsr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 2 0.50 lsr z31.d, z31.d, #64
+# CHECK-NEXT: 1 2 0.50 lsr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 2 0.50 lsr z31.h, z31.h, #16
+# CHECK-NEXT: 1 2 0.50 lsr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 lsr z31.s, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 lsrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 lsrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 lsrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 lsrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 3 0.50 mad z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 mad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 mad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 mad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 match p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 match p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 match p15.b, p7/z, z30.b, z31.b
+# CHECK-NEXT: 1 2 0.50 match p15.h, p7/z, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 mla z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 mla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 1.00 mla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 3 0.50 mla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 mla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 mla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 mla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 mls z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 mls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 4 1.00 mls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 3 0.50 mls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 mls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 mls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 mls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 2 2 0.50 mov p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 mov p0.b, p0/m, p0.b
+# CHECK-NEXT: 2 2 0.50 mov p0.b, p0/z, p0.b
+# CHECK-NEXT: 2 2 0.50 mov p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 mov p15.b, p15/m, p15.b
+# CHECK-NEXT: 2 2 0.50 mov p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 2 0.50 mov z0.b, #127
+# CHECK-NEXT: 1 2 0.50 mov z0.b, b0
+# CHECK-NEXT: 1 2 0.50 mov z0.b, p0/m, b0
+# CHECK-NEXT: 2 6 0.50 mov z0.b, p0/m, w0
+# CHECK-NEXT: 1 2 0.50 mov z0.b, p0/z, #127
+# CHECK-NEXT: 2 6 0.50 mov z0.b, w0
+# CHECK-NEXT: 1 2 0.50 mov z0.d, #0
+# CHECK-NEXT: 1 1 0.50 mov z0.d, #0xe0000000000003ff
+# CHECK-NEXT: 1 1 0.50 mov z0.d, #0xffffffffffff7fff
+# CHECK-NEXT: 1 1 0.50 mov z0.d, #32768
+# CHECK-NEXT: 1 2 0.50 mov z0.d, d0
+# CHECK-NEXT: 1 2 0.50 mov z0.d, p0/m, d0
+# CHECK-NEXT: 2 6 0.50 mov z0.d, p0/m, x0
+# CHECK-NEXT: 2 6 0.50 mov z0.d, x0
+# CHECK-NEXT: 1 1 0.50 mov z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 mov z0.h, #-256
+# CHECK-NEXT: 1 2 0.50 mov z0.h, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z0.h, #0
+# CHECK-NEXT: 1 2 0.50 mov z0.h, #32512
+# CHECK-NEXT: 1 1 0.50 mov z0.h, #32767
+# CHECK-NEXT: 1 2 0.50 mov z0.h, h0
+# CHECK-NEXT: 1 2 0.50 mov z0.h, p0/m, h0
+# CHECK-NEXT: 2 6 0.50 mov z0.h, p0/m, w0
+# CHECK-NEXT: 1 2 0.50 mov z0.h, p0/z, #32512
+# CHECK-NEXT: 2 6 0.50 mov z0.h, w0
+# CHECK-NEXT: 1 2 0.50 mov z0.q, q0
+# CHECK-NEXT: 1 2 0.50 mov z0.s, #0
+# CHECK-NEXT: 1 1 0.50 mov z0.s, #0xffff7fff
+# CHECK-NEXT: 1 1 0.50 mov z0.s, #32768
+# CHECK-NEXT: 1 2 0.50 mov z0.s, p0/m, s0
+# CHECK-NEXT: 2 6 0.50 mov z0.s, p0/m, w0
+# CHECK-NEXT: 1 2 0.50 mov z0.s, s0
+# CHECK-NEXT: 2 6 0.50 mov z0.s, w0
+# CHECK-NEXT: 1 2 0.50 mov z21.d, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.d, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.d, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.d, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p0/z, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p0/z, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p0/z, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p0/z, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p15/m, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.d, p15/m, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.h, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.h, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.h, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.h, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p0/z, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p0/z, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p0/z, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p0/z, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p15/m, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.h, p15/m, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.s, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.s, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.s, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.s, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p0/z, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p0/z, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p0/z, #127
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p0/z, #32512
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p15/m, #-128
+# CHECK-NEXT: 1 2 0.50 mov z21.s, p15/m, #-32768
+# CHECK-NEXT: 1 2 0.50 mov z31.b, p15/m, z31.b
+# CHECK-NEXT: 1 2 0.50 mov z31.b, p7/m, b31
+# CHECK-NEXT: 1 2 0.50 movprfx z31, z6
+# CHECK-NEXT: 2 6 0.50 mov z31.b, p7/m, wsp
+# CHECK-NEXT: 2 6 0.50 mov z31.b, wsp
+# CHECK-NEXT: 1 2 0.50 mov z31.b, z31.b[63]
+# CHECK-NEXT: 1 2 0.50 mov z31.d, p15/m, z31.d
+# CHECK-NEXT: 1 2 0.50 mov z31.d, p7/m, d31
+# CHECK-NEXT: 1 2 0.50 movprfx z31.d, p7/z, z6.d
+# CHECK-NEXT: 2 6 0.50 mov z31.d, p7/m, sp
+# CHECK-NEXT: 2 6 0.50 mov z31.d, sp
+# CHECK-NEXT: 1 1 0.50 mov z31.d, z0.d
+# CHECK-NEXT: 1 2 0.50 mov z31.d, z31.d[7]
+# CHECK-NEXT: 1 2 0.50 mov z31.h, p15/m, z31.h
+# CHECK-NEXT: 1 2 0.50 mov z31.h, p7/m, h31
+# CHECK-NEXT: 2 6 0.50 mov z31.h, p7/m, wsp
+# CHECK-NEXT: 2 6 0.50 mov z31.h, wsp
+# CHECK-NEXT: 1 2 0.50 mov z31.h, z31.h[31]
+# CHECK-NEXT: 1 2 0.50 mov z31.s, p15/m, z31.s
+# CHECK-NEXT: 1 2 0.50 mov z31.s, p7/m, s31
+# CHECK-NEXT: 2 6 0.50 mov z31.s, p7/m, wsp
+# CHECK-NEXT: 2 6 0.50 mov z31.s, wsp
+# CHECK-NEXT: 1 2 0.50 mov z31.s, z31.s[15]
+# CHECK-NEXT: 1 2 0.50 mov z5.b, #-1
+# CHECK-NEXT: 1 2 0.50 mov z5.b, #-128
+# CHECK-NEXT: 1 2 0.50 mov z5.b, #127
+# CHECK-NEXT: 1 2 0.50 mov z5.b, p0/z, #-1
+# CHECK-NEXT: 1 2 0.50 mov z5.b, p0/z, #-128
+# CHECK-NEXT: 1 2 0.50 mov z5.b, p0/z, #127
+# CHECK-NEXT: 1 2 0.50 mov z5.b, p15/m, #-128
+# CHECK-NEXT: 1 2 0.50 mov z5.d, #-6
+# CHECK-NEXT: 1 2 0.50 mov z5.h, #-6
+# CHECK-NEXT: 1 2 0.50 mov z5.q, z17.q[3]
+# CHECK-NEXT: 1 2 0.50 mov z5.s, #-6
+# CHECK-NEXT: 2 2 0.50 movs p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 movs p0.b, p0/z, p0.b
+# CHECK-NEXT: 2 2 0.50 movs p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 movs p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 1 0.50 U mrs x3, ID_AA64ZFR0_EL1
+# CHECK-NEXT: 1 1 0.50 U mrs x3, ZCR_EL1
+# CHECK-NEXT: 1 1 0.50 U mrs x3, ZCR_EL12
+# CHECK-NEXT: 1 1 0.50 U mrs x3, ZCR_EL2
+# CHECK-NEXT: 1 1 0.50 U mrs x3, ZCR_EL3
+# CHECK-NEXT: 1 3 0.50 msb z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 msb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 msb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 msb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 U msr ZCR_EL1, x3
+# CHECK-NEXT: 1 1 0.50 U msr ZCR_EL12, x3
+# CHECK-NEXT: 1 1 0.50 U msr ZCR_EL2, x3
+# CHECK-NEXT: 1 1 0.50 U msr ZCR_EL3, x3
+# CHECK-NEXT: 1 3 0.50 mul z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 3 0.50 mul z0.b, z1.b, z2.b
+# CHECK-NEXT: 2 4 1.00 mul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 4 1.00 mul z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: 1 3 0.50 mul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 mul z0.h, z1.h, z2.h
+# CHECK-NEXT: 1 3 0.50 mul z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 mul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 mul z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 mul z29.s, z30.s, z31.s
+# CHECK-NEXT: 1 3 0.50 mul z31.b, z31.b, #-128
+# CHECK-NEXT: 1 3 0.50 mul z31.b, z31.b, #127
+# CHECK-NEXT: 2 4 1.00 mul z31.d, z31.d, #-128
+# CHECK-NEXT: 2 4 1.00 mul z31.d, z31.d, #127
+# CHECK-NEXT: 2 4 1.00 mul z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 3 0.50 mul z31.h, z31.h, #-128
+# CHECK-NEXT: 1 3 0.50 mul z31.h, z31.h, #127
+# CHECK-NEXT: 1 3 0.50 mul z31.s, z31.s, #-128
+# CHECK-NEXT: 1 3 0.50 mul z31.s, z31.s, #127
+# CHECK-NEXT: 2 2 0.50 nand p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 nand p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 nands p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 nands p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 1 0.50 nbsl z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: 1 1 0.50 neg z0.b, p0/m, z0.b
+# CHECK-NEXT: 1 1 0.50 neg z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 neg z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 1 0.50 neg z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 neg z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 neg z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 neg z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 neg z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 nmatch p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 nmatch p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 nmatch p15.b, p7/z, z30.b, z31.b
+# CHECK-NEXT: 1 2 0.50 nmatch p15.h, p7/z, z30.h, z31.h
+# CHECK-NEXT: 2 2 0.50 nor p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 nor p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 nors p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 nors p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 not p0.b, p0/z, p0.b
+# CHECK-NEXT: 2 2 0.50 not p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 1 0.50 not z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 not z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 not z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 not z31.s, p7/m, z31.s
+# CHECK-NEXT: 2 2 0.50 nots p0.b, p0/z, p0.b
+# CHECK-NEXT: 2 2 0.50 nots p15.b, p15/z, p15.b
+# CHECK-NEXT: 2 2 0.50 orn p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 orn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 orns p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 orns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 orr p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 1 0.50 orr z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 1 0.50 orr z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 1 0.50 orr z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 1 0.50 orr z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 1 0.50 orr z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 orr z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 1 0.50 orr z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 1 0.50 orr z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 orr z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 orr z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 orr z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 orr z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 1 0.50 orr z5.b, z5.b, #0xf9
+# CHECK-NEXT: 2 2 0.50 orrs p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 2 4 1.00 orv b0, p7, z31.b
+# CHECK-NEXT: 2 4 1.00 orv d0, p7, z31.d
+# CHECK-NEXT: 2 4 1.00 orv h0, p7, z31.h
+# CHECK-NEXT: 2 4 1.00 orv s0, p7, z31.s
+# CHECK-NEXT: 2 2 0.50 pfalse p15.b
+# CHECK-NEXT: 2 2 0.50 pfirst p0.b, p15, p0.b
+# CHECK-NEXT: 2 2 0.50 pfirst p15.b, p15, p15.b
+# CHECK-NEXT: 1 2 0.50 pmul z0.b, z1.b, z2.b
+# CHECK-NEXT: 1 2 0.50 pmul z29.b, z30.b, z31.b
+# CHECK-NEXT: 1 2 0.50 pmullb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 2 0.50 pmullb z29.q, z30.d, z31.d
+# CHECK-NEXT: 1 2 0.50 pmullb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 pmullt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 2 0.50 pmullt z29.q, z30.d, z31.d
+# CHECK-NEXT: 1 2 0.50 pmullt z31.d, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 pnext p0.b, p15, p0.b
+# CHECK-NEXT: 2 2 0.50 pnext p0.d, p15, p0.d
+# CHECK-NEXT: 2 2 0.50 pnext p0.h, p15, p0.h
+# CHECK-NEXT: 2 2 0.50 pnext p0.s, p15, p0.s
+# CHECK-NEXT: 2 2 0.50 pnext p15.b, p15, p15.b
+# CHECK-NEXT: 1 4 0.33 * * U prfb #14, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb #15, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb #6, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb #7, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb #7, p3, [z13.s, #31]
+# CHECK-NEXT: 1 4 0.33 * * U prfb #7, p3, [z13.s]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1keep, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1keep, p0, [x0, z0.d]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1keep, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3strm, p5, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3strm, p5, [x10, z21.s, uxtw]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3strm, p5, [z10.d, #31]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pldl3strm, p5, [z10.d]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfb pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #14, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #15, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #15, p7, [z31.d, #248]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #15, p7, [z31.d]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #15, p7, [z31.s, #248]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #15, p7, [z31.s]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #6, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd #7, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0, z0.s, uxtw #3]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfd pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #14, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #15, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #15, p7, [z31.d, #62]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #15, p7, [z31.d]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #15, p7, [z31.s, #62]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #15, p7, [z31.s]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #6, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh #7, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3strm, p5, [x10, z21.d, uxtw #1]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pldl3strm, p5, [x10, z21.s, uxtw #1]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfh pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #14, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #15, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #15, p7, [z31.d, #124]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #15, p7, [z31.d]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #15, p7, [z31.s, #124]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #15, p7, [z31.s]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #6, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #7, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw #7, p3, [x13, z8.d, uxtw #2]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1keep, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1keep, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pldl3strm, p5, [x10, z21.s, sxtw #2]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 4 0.33 * * U prfw pstl3strm, p0, [x0]
+# CHECK-NEXT: 2 2 0.50 ptest p15, p0.b
+# CHECK-NEXT: 2 2 0.50 ptest p15, p15.b
+# CHECK-NEXT: 2 2 0.50 ptrue p0.b, pow2
+# CHECK-NEXT: 2 2 0.50 ptrue p0.d, pow2
+# CHECK-NEXT: 2 2 0.50 ptrue p0.h, pow2
+# CHECK-NEXT: 2 2 0.50 ptrue p0.s, pow2
+# CHECK-NEXT: 2 2 0.50 ptrue p15.b
+# CHECK-NEXT: 2 2 0.50 ptrue p15.d
+# CHECK-NEXT: 2 2 0.50 ptrue p15.h
+# CHECK-NEXT: 2 2 0.50 ptrue p15.s
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #14
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #15
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #16
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #17
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #18
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #19
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #20
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #21
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #22
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #23
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #24
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #25
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #26
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #27
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, #28
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, mul3
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, mul4
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl1
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl128
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl16
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl2
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl256
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl3
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl32
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl4
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl5
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl6
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl64
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl7
+# CHECK-NEXT: 2 2 0.50 ptrue p7.s, vl8
+# CHECK-NEXT: 2 2 0.50 ptrues p0.b, pow2
+# CHECK-NEXT: 2 2 0.50 ptrues p0.d, pow2
+# CHECK-NEXT: 2 2 0.50 ptrues p0.h, pow2
+# CHECK-NEXT: 2 2 0.50 ptrues p0.s, pow2
+# CHECK-NEXT: 2 2 0.50 ptrues p15.b
+# CHECK-NEXT: 2 2 0.50 ptrues p15.d
+# CHECK-NEXT: 2 2 0.50 ptrues p15.h
+# CHECK-NEXT: 2 2 0.50 ptrues p15.s
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #14
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #15
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #16
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #17
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #18
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #19
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #20
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #21
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #22
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #23
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #24
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #25
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #26
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #27
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, #28
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, mul3
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, mul4
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl1
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl128
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl16
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl2
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl256
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl3
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl32
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl4
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl5
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl6
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl64
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl7
+# CHECK-NEXT: 2 2 0.50 ptrues p7.s, vl8
+# CHECK-NEXT: 2 2 0.50 punpkhi p0.h, p0.b
+# CHECK-NEXT: 2 2 0.50 punpkhi p15.h, p15.b
+# CHECK-NEXT: 2 2 0.50 punpklo p0.h, p0.b
+# CHECK-NEXT: 2 2 0.50 punpklo p15.h, p15.b
+# CHECK-NEXT: 1 2 0.50 raddhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 raddhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 raddhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 raddhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 raddhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 raddhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 rax1 z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 rbit z0.b, p7/m, z31.b
+# CHECK-NEXT: 1 1 0.50 rbit z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 rbit z0.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 rbit z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 * U rdffr p0.b
+# CHECK-NEXT: 1 2 0.50 * U rdffr p0.b, p0/z
+# CHECK-NEXT: 1 2 0.50 * U rdffr p15.b
+# CHECK-NEXT: 1 2 0.50 * U rdffr p15.b, p15/z
+# CHECK-NEXT: 1 2 0.50 U rdffrs p0.b, p0/z
+# CHECK-NEXT: 1 2 0.50 U rdffrs p15.b, p15/z
+# CHECK-NEXT: 1 1 0.17 rdvl x0, #0
+# CHECK-NEXT: 1 1 0.17 rdvl x21, #-32
+# CHECK-NEXT: 1 1 0.17 rdvl x23, #31
+# CHECK-NEXT: 1 1 0.17 rdvl xzr, #-1
+# CHECK-NEXT: 2 2 0.50 rev p0.b, p1.b
+# CHECK-NEXT: 2 2 0.50 rev p0.d, p1.d
+# CHECK-NEXT: 2 2 0.50 rev p0.h, p1.h
+# CHECK-NEXT: 2 2 0.50 rev p0.s, p1.s
+# CHECK-NEXT: 1 2 0.50 rev z0.b, z31.b
+# CHECK-NEXT: 1 2 0.50 rev z0.d, z31.d
+# CHECK-NEXT: 1 2 0.50 rev z0.h, z31.h
+# CHECK-NEXT: 1 2 0.50 rev z0.s, z31.s
+# CHECK-NEXT: 1 2 0.50 revb z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 revb z0.h, p7/m, z31.h
+# CHECK-NEXT: 1 2 0.50 revb z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 revh z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 revh z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 revw z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 rshrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 rshrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 rshrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 rshrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 rshrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 rshrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 rshrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 rshrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 rshrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 rshrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 rshrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 rshrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 rsubhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 rsubhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 rsubhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 rsubhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 rsubhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 rsubhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 saba z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 2 0.50 saba z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 saba z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 saba z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sabalb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sabalb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sabalb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sabalt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sabalt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sabalt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 sabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 sabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 sabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 sabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sabdlb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 sabdlb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sabdlb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sabdlt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 sabdlt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sabdlt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sadalp z0.h, p0/m, z1.b
+# CHECK-NEXT: 1 3 0.50 sadalp z29.s, p0/m, z30.h
+# CHECK-NEXT: 1 3 0.50 sadalp z30.d, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 saddlb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 saddlb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 saddlb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 saddlbt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 saddlbt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 1 0.50 saddlbt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 saddlt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 saddlt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 saddlt z31.d, z31.s, z31.s
+# CHECK-NEXT: 5 13 2.50 saddv d0, p7, z31.b
+# CHECK-NEXT: 4 10 2.00 saddv d0, p7, z31.h
+# CHECK-NEXT: 3 7 1.50 saddv d0, p7, z31.s
+# CHECK-NEXT: 1 1 0.50 saddwb z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 saddwb z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 saddwb z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 1 0.50 saddwt z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 saddwt z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 saddwt z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 3 0.50 sbclb z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 sbclb z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sbclt z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 sbclt z0.s, z1.s, z31.s
+# CHECK-NEXT: 2 4 1.00 scvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 scvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 scvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 scvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 scvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 scvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 scvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: 2 9 1.00 sdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 7 1.00 sdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 9 1.00 sdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 7 1.00 sdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sdot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: 1 3 0.50 sdot z0.d, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sdot z0.s, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sdot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: 2 2 0.50 sel p0.b, p1, p2.b, p3.b
+# CHECK-NEXT: 1 2 0.50 sel z23.b, p11, z13.b, z8.b
+# CHECK-NEXT: 1 2 0.50 sel z23.d, p11, z13.d, z8.d
+# CHECK-NEXT: 1 2 0.50 sel z23.h, p11, z13.h, z8.h
+# CHECK-NEXT: 1 2 0.50 sel z23.s, p11, z13.s, z8.s
+# CHECK-NEXT: 1 0 0.13 * U setffr
+# CHECK-NEXT: 1 2 0.50 shadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 shadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 shadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 shadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 shrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 shrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 shrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 shrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 shrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 shrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 shrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 shrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 shrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 shrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 shrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 shrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 shsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 shsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 shsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 shsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 shsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 shsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 shsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 shsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sli z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sli z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 sli z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sli z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sli z31.b, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 sli z31.d, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 sli z31.h, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 sli z31.s, z31.s, #31
+# CHECK-NEXT: 1 4 0.50 sm4e z0.s, z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 sm4ekey z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 smax z0.b, z0.b, #-128
+# CHECK-NEXT: 1 2 0.50 smax z0.d, z0.d, #-128
+# CHECK-NEXT: 1 2 0.50 smax z0.h, z0.h, #-128
+# CHECK-NEXT: 1 2 0.50 smax z0.s, z0.s, #-128
+# CHECK-NEXT: 1 2 0.50 smax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 smax z31.b, z31.b, #127
+# CHECK-NEXT: 1 2 0.50 smax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 smax z31.d, z31.d, #127
+# CHECK-NEXT: 1 2 0.50 smax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 smax z31.h, z31.h, #127
+# CHECK-NEXT: 1 2 0.50 smax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 smax z31.s, z31.s, #127
+# CHECK-NEXT: 1 3 0.50 smaxp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 smaxp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 smaxp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 smaxp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 5 14 2.50 smaxv b0, p7, z31.b
+# CHECK-NEXT: 2 5 1.00 smaxv d0, p7, z31.d
+# CHECK-NEXT: 4 11 2.00 smaxv h0, p7, z31.h
+# CHECK-NEXT: 3 8 1.50 smaxv s0, p7, z31.s
+# CHECK-NEXT: 1 2 0.50 smin z0.b, z0.b, #-128
+# CHECK-NEXT: 1 2 0.50 smin z0.d, z0.d, #-128
+# CHECK-NEXT: 1 2 0.50 smin z0.h, z0.h, #-128
+# CHECK-NEXT: 1 2 0.50 smin z0.s, z0.s, #-128
+# CHECK-NEXT: 1 2 0.50 smin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 smin z31.b, z31.b, #127
+# CHECK-NEXT: 1 2 0.50 smin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 smin z31.d, z31.d, #127
+# CHECK-NEXT: 1 2 0.50 smin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 smin z31.h, z31.h, #127
+# CHECK-NEXT: 1 2 0.50 smin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 smin z31.s, z31.s, #127
+# CHECK-NEXT: 1 3 0.50 sminp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 sminp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 sminp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 sminp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 5 14 2.50 sminv b0, p7, z31.b
+# CHECK-NEXT: 2 5 1.00 sminv d0, p7, z31.d
+# CHECK-NEXT: 4 11 2.00 sminv h0, p7, z31.h
+# CHECK-NEXT: 3 8 1.50 sminv s0, p7, z31.s
+# CHECK-NEXT: 1 4 1.00 smlalb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 smlalb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smlalb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 smlalb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smlalb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 smlalt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 smlalt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smlalt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 smlalt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smlalt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 smlslb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 smlslb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smlslb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 smlslb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smlslb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 smlslt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 smlslt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smlslt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 smlslt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smlslt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 smmla z0.s, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 smulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 3 0.50 smulh z0.b, z1.b, z2.b
+# CHECK-NEXT: 2 4 1.00 smulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 3 0.50 smulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smulh z0.h, z1.h, z2.h
+# CHECK-NEXT: 1 3 0.50 smulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smulh z29.s, z30.s, z31.s
+# CHECK-NEXT: 2 4 1.00 smulh z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 3 0.50 smullb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 smullb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 smullb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 smullb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smullb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 smullt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 smullt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 smullt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 smullt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 smullt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 splice z29.b, p7, { z30.b, z31.b }
+# CHECK-NEXT: 1 2 0.50 splice z29.d, p7, { z30.d, z31.d }
+# CHECK-NEXT: 1 2 0.50 splice z29.h, p7, { z30.h, z31.h }
+# CHECK-NEXT: 1 2 0.50 splice z29.s, p7, { z30.s, z31.s }
+# CHECK-NEXT: 1 2 0.50 splice z31.b, p7, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 splice z31.d, p7, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 splice z31.h, p7, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 splice z31.s, p7, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 sqabs z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 2 0.50 sqabs z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 sqabs z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 2 0.50 sqabs z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 sqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqadd z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 sqadd z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 sqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 sqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqadd z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 sqadd z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 sqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqadd z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 sqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqadd z31.d, z31.d, #65280
+# CHECK-NEXT: 1 2 0.50 sqadd z31.h, z31.h, #65280
+# CHECK-NEXT: 1 2 0.50 sqadd z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 0.50 sqcadd z0.b, z0.b, z0.b, #90
+# CHECK-NEXT: 1 2 0.50 sqcadd z0.d, z0.d, z0.d, #90
+# CHECK-NEXT: 1 2 0.50 sqcadd z0.h, z0.h, z0.h, #90
+# CHECK-NEXT: 1 2 0.50 sqcadd z0.s, z0.s, z0.s, #90
+# CHECK-NEXT: 1 2 0.50 sqcadd z31.b, z31.b, z31.b, #270
+# CHECK-NEXT: 1 2 0.50 sqcadd z31.d, z31.d, z31.d, #270
+# CHECK-NEXT: 1 2 0.50 sqcadd z31.h, z31.h, z31.h, #270
+# CHECK-NEXT: 1 2 0.50 sqcadd z31.s, z31.s, z31.s, #270
+# CHECK-NEXT: 1 1 0.17 sqdecb x0
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, #14
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, w0
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecb x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecd x0
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, #14
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, w0
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecd x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdecd z0.d
+# CHECK-NEXT: 2 5 1.00 sqdecd z0.d, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdecd z0.d, pow2
+# CHECK-NEXT: 2 5 1.00 sqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdech x0
+# CHECK-NEXT: 1 1 0.17 sqdech x0, #14
+# CHECK-NEXT: 1 1 0.17 sqdech x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdech x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdech x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqdech x0, w0
+# CHECK-NEXT: 1 1 0.17 sqdech x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdech x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdech x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdech z0.h
+# CHECK-NEXT: 2 5 1.00 sqdech z0.h, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdech z0.h, pow2
+# CHECK-NEXT: 2 5 1.00 sqdech z0.h, pow2, mul #16
+# CHECK-NEXT: 2 7 0.50 sqdecp x0, p0.b
+# CHECK-NEXT: 2 7 0.50 sqdecp x0, p0.d
+# CHECK-NEXT: 2 7 0.50 sqdecp x0, p0.h
+# CHECK-NEXT: 2 7 0.50 sqdecp x0, p0.s
+# CHECK-NEXT: 2 7 0.50 sqdecp xzr, p15.b, wzr
+# CHECK-NEXT: 2 7 0.50 sqdecp xzr, p15.d, wzr
+# CHECK-NEXT: 2 7 0.50 sqdecp xzr, p15.h, wzr
+# CHECK-NEXT: 2 7 0.50 sqdecp xzr, p15.s, wzr
+# CHECK-NEXT: 2 4 0.50 sqdecp z0.d, p0.d
+# CHECK-NEXT: 2 4 0.50 sqdecp z0.h, p0.h
+# CHECK-NEXT: 2 4 0.50 sqdecp z0.s, p0.s
+# CHECK-NEXT: 1 1 0.17 sqdecw x0
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, #14
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, w0
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqdecw x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdecw z0.s
+# CHECK-NEXT: 2 5 1.00 sqdecw z0.s, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqdecw z0.s, pow2
+# CHECK-NEXT: 2 5 1.00 sqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 4 1.00 sqdmlalb z0.d, z1.s, z15.s[3]
+# CHECK-NEXT: 1 4 1.00 sqdmlalb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlalb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlalb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqdmlalb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 sqdmlalbt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlalbt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlalbt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 4 1.00 sqdmlalt z0.d, z1.s, z15.s[3]
+# CHECK-NEXT: 1 4 1.00 sqdmlalt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlalt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlalt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqdmlalt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 sqdmlslb z0.d, z1.s, z15.s[3]
+# CHECK-NEXT: 1 4 1.00 sqdmlslb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlslb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlslb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqdmlslb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 sqdmlslbt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlslbt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlslbt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 4 1.00 sqdmlslt z0.d, z1.s, z15.s[3]
+# CHECK-NEXT: 1 4 1.00 sqdmlslt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqdmlslt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 sqdmlslt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqdmlslt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqdmulh z0.b, z1.b, z2.b
+# CHECK-NEXT: 2 4 1.00 sqdmulh z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: 1 3 0.50 sqdmulh z0.h, z1.h, z2.h
+# CHECK-NEXT: 1 3 0.50 sqdmulh z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqdmulh z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 sqdmulh z29.s, z30.s, z31.s
+# CHECK-NEXT: 2 4 1.00 sqdmulh z31.d, z31.d, z31.d
+# CHECK-NEXT: 2 4 1.00 sqdmullb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 sqdmullb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 sqdmullb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqdmullb z29.s, z30.h, z31.h
+# CHECK-NEXT: 2 4 1.00 sqdmullb z31.d, z31.s, z31.s
+# CHECK-NEXT: 2 4 1.00 sqdmullt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 sqdmullt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 sqdmullt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqdmullt z29.s, z30.h, z31.h
+# CHECK-NEXT: 2 4 1.00 sqdmullt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.17 sqincb x0
+# CHECK-NEXT: 1 1 0.17 sqincb x0, #14
+# CHECK-NEXT: 1 1 0.17 sqincb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincb x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincb x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqincb x0, w0
+# CHECK-NEXT: 1 1 0.17 sqincb x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincb x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincb x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincd x0
+# CHECK-NEXT: 1 1 0.17 sqincd x0, #14
+# CHECK-NEXT: 1 1 0.17 sqincd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincd x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincd x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqincd x0, w0
+# CHECK-NEXT: 1 1 0.17 sqincd x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincd x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincd x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqincd z0.d
+# CHECK-NEXT: 2 5 1.00 sqincd z0.d, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqincd z0.d, pow2
+# CHECK-NEXT: 2 5 1.00 sqincd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 sqinch x0
+# CHECK-NEXT: 1 1 0.17 sqinch x0, #14
+# CHECK-NEXT: 1 1 0.17 sqinch x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqinch x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqinch x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqinch x0, w0
+# CHECK-NEXT: 1 1 0.17 sqinch x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqinch x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqinch x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqinch z0.h
+# CHECK-NEXT: 2 5 1.00 sqinch z0.h, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqinch z0.h, pow2
+# CHECK-NEXT: 2 5 1.00 sqinch z0.h, pow2, mul #16
+# CHECK-NEXT: 2 7 0.50 sqincp x0, p0.b
+# CHECK-NEXT: 2 7 0.50 sqincp x0, p0.d
+# CHECK-NEXT: 2 7 0.50 sqincp x0, p0.h
+# CHECK-NEXT: 2 7 0.50 sqincp x0, p0.s
+# CHECK-NEXT: 2 7 0.50 sqincp xzr, p15.b, wzr
+# CHECK-NEXT: 2 7 0.50 sqincp xzr, p15.d, wzr
+# CHECK-NEXT: 2 7 0.50 sqincp xzr, p15.h, wzr
+# CHECK-NEXT: 2 7 0.50 sqincp xzr, p15.s, wzr
+# CHECK-NEXT: 2 4 0.50 sqincp z0.d, p0.d
+# CHECK-NEXT: 2 4 0.50 sqincp z0.h, p0.h
+# CHECK-NEXT: 2 4 0.50 sqincp z0.s, p0.s
+# CHECK-NEXT: 1 1 0.17 sqincw x0
+# CHECK-NEXT: 1 1 0.17 sqincw x0, #14
+# CHECK-NEXT: 1 1 0.17 sqincw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincw x0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincw x0, vl1
+# CHECK-NEXT: 1 1 0.17 sqincw x0, w0
+# CHECK-NEXT: 1 1 0.17 sqincw x0, w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 sqincw x0, w0, pow2
+# CHECK-NEXT: 1 1 0.17 sqincw x0, w0, pow2, mul #16
+# CHECK-NEXT: 2 5 1.00 sqincw z0.s
+# CHECK-NEXT: 2 5 1.00 sqincw z0.s, all, mul #16
+# CHECK-NEXT: 2 5 1.00 sqincw z0.s, pow2
+# CHECK-NEXT: 2 5 1.00 sqincw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 2 0.50 sqneg z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 2 0.50 sqneg z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 sqneg z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 2 0.50 sqneg z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z0.b, z1.b, z2.b, #0
+# CHECK-NEXT: 1 4 1.00 sqrdcmlah z0.d, z1.d, z2.d, #0
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z0.h, z1.h, z2.h, #0
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z0.h, z1.h, z2.h[0], #0
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z0.s, z1.s, z2.s, #0
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z0.s, z1.s, z2.s[0], #0
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z15.b, z16.b, z17.b, #270
+# CHECK-NEXT: 1 4 1.00 sqrdcmlah z15.d, z16.d, z17.d, #270
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z15.h, z16.h, z17.h, #270
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z15.s, z16.s, z17.s, #270
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z29.b, z30.b, z31.b, #90
+# CHECK-NEXT: 1 4 1.00 sqrdcmlah z29.d, z30.d, z31.d, #90
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z29.h, z30.h, z31.h, #90
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z29.s, z30.s, z31.s, #90
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z31.b, z31.b, z31.b, #180
+# CHECK-NEXT: 1 4 1.00 sqrdcmlah z31.d, z31.d, z31.d, #180
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z31.h, z30.h, z7.h[0], #180
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z31.h, z31.h, z31.h, #180
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z31.s, z30.s, z7.s[0], #180
+# CHECK-NEXT: 1 3 0.50 sqrdcmlah z31.s, z31.s, z31.s, #180
+# CHECK-NEXT: 1 3 0.50 sqrdmlah z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 sqrdmlah z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: 1 4 1.00 sqrdmlah z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 sqrdmlah z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqrdmlah z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqrdmlah z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqrdmlah z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 sqrdmlsh z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 4 1.00 sqrdmlsh z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: 1 4 1.00 sqrdmlsh z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 3 0.50 sqrdmlsh z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 sqrdmlsh z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqrdmlsh z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 sqrdmlsh z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 sqrdmulh z0.b, z1.b, z2.b
+# CHECK-NEXT: 2 4 1.00 sqrdmulh z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: 1 3 0.50 sqrdmulh z0.h, z1.h, z2.h
+# CHECK-NEXT: 1 3 0.50 sqrdmulh z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 sqrdmulh z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 3 0.50 sqrdmulh z29.s, z30.s, z31.s
+# CHECK-NEXT: 2 4 1.00 sqrdmulh z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 sqrshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqrshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqrshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqrshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqrshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqrshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqrshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqrshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqrshrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqrshrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqrshrunb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqrshrunt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqshl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sqshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqshl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 sqshl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sqshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqshl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sqshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqshl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 sqshl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 sqshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqshl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 sqshl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 sqshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqshlu z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sqshlu z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 sqshlu z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sqshlu z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sqshlu z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 sqshlu z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 sqshlu z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 sqshlu z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 sqshrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqshrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqshrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqshrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqshrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqshrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqshrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqshrunb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqshrunb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqshrunb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqshrunt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sqshrunt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 sqshrunt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 sqshrunt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 sqsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqsub z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 sqsub z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 sqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 sqsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqsub z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 sqsub z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 sqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 sqsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqsub z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 sqsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqsub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 2 0.50 sqsub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 2 0.50 sqsub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 0.50 sqsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 sqsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 sqsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 sqsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sqxtnb z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 sqxtnb z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 sqxtnb z0.s, z31.d
+# CHECK-NEXT: 1 2 0.50 sqxtnt z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 sqxtnt z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 sqxtnt z0.s, z31.d
+# CHECK-NEXT: 1 2 0.50 sqxtunb z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 sqxtunb z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 sqxtunb z0.s, z31.d
+# CHECK-NEXT: 1 2 0.50 sqxtunt z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 sqxtunt z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 sqxtunt z0.s, z31.d
+# CHECK-NEXT: 1 2 0.50 srhadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 srhadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 srhadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 srhadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 sri z0.b, z0.b, #1
+# CHECK-NEXT: 1 2 0.50 sri z0.d, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 sri z0.h, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 sri z0.s, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 sri z31.b, z31.b, #8
+# CHECK-NEXT: 1 2 0.50 sri z31.d, z31.d, #64
+# CHECK-NEXT: 1 2 0.50 sri z31.h, z31.h, #16
+# CHECK-NEXT: 1 2 0.50 sri z31.s, z31.s, #32
+# CHECK-NEXT: 1 3 0.50 srshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 srshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 srshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 srshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 srshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 srshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 srshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 srshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 srshr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 srshr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 srshr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 srshr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 srshr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 srshr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 srshr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 srshr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 3 0.50 srsra z0.b, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 srsra z0.d, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 srsra z0.h, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 srsra z0.s, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 srsra z31.b, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 srsra z31.d, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 srsra z31.h, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 srsra z31.s, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 sshllb z0.d, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sshllb z0.h, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sshllb z0.s, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sshllb z31.d, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 sshllb z31.h, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 sshllb z31.s, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 sshllt z0.d, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 sshllt z0.h, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 sshllt z0.s, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 sshllt z31.d, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 sshllt z31.h, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 sshllt z31.s, z31.h, #15
+# CHECK-NEXT: 1 3 0.50 ssra z0.b, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 ssra z0.d, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 ssra z0.h, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 ssra z0.s, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 ssra z31.b, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 ssra z31.d, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 ssra z31.h, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 ssra z31.s, z31.s, #32
+# CHECK-NEXT: 1 3 0.50 ssublb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 ssublb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 ssublb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 ssublbt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 ssublbt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 1 0.50 ssublbt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 ssublt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 ssublt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 ssublt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 ssubltb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 ssubltb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 1 0.50 ssubltb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 1 0.50 ssubwb z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 ssubwb z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 ssubwb z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 1 0.50 ssubwt z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 ssubwt z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 ssubwt z31.d, z31.d, z31.s
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.b }, p0, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.d }, p0, [x0, x0]
+# CHECK-NEXT: 16 8 4.00 * st1b { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1b { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 8 4 2.00 * st1b { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.d }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * st1b { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.h }, p0, [x0, x0]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.h }, p0, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.s }, p0, [x0, x0]
+# CHECK-NEXT: 16 8 4.00 * st1b { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1b { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 2 1 0.50 * st1b { z0.s }, p0, [x0]
+# CHECK-NEXT: 16 8 4.00 * st1b { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 2 1 0.50 * st1b { z21.b }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z31.b }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 4 2.00 * st1b { z31.d }, p7, [z31.d, #31]
+# CHECK-NEXT: 2 1 0.50 * st1b { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1b { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 16 8 4.00 * st1b { z31.s }, p7, [z31.s, #31]
+# CHECK-NEXT: 2 1 0.50 * st1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 8 4 2.00 * st1d { z0.d }, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: 16 8 4.00 * st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 16 8 4.00 * st1d { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 16 8 4.00 * st1d { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 8 4 2.00 * st1d { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1d { z0.d }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * st1d { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1d { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1d { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 4 2.00 * st1d { z31.d }, p7, [z31.d, #248]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.d }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 8 4 2.00 * st1h { z0.d }, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 8 4 2.00 * st1h { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.d }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * st1h { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.h }, p0, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.s }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 2 1 0.50 * st1h { z0.s }, p0, [x0]
+# CHECK-NEXT: 16 8 4.00 * st1h { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 2 1 0.50 * st1h { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1h { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1h { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1h { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 4 2.00 * st1h { z31.d }, p7, [z31.d, #62]
+# CHECK-NEXT: 2 1 0.50 * st1h { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1h { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 16 8 4.00 * st1h { z31.s }, p7, [z31.s, #62]
+# CHECK-NEXT: 2 1 0.50 * st1w { z0.d }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 8 4 2.00 * st1w { z0.d }, p0, [x0, z0.d, lsl #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 8 4 2.00 * st1w { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1w { z0.d }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * st1w { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 2 1 0.50 * st1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 2 1 0.50 * st1w { z0.s }, p0, [x0]
+# CHECK-NEXT: 16 8 4.00 * st1w { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 2 1 0.50 * st1w { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1w { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 2 1 0.50 * st1w { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 4 2.00 * st1w { z31.d }, p7, [z31.d, #124]
+# CHECK-NEXT: 2 1 0.50 * st1w { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 16 8 4.00 * st1w { z31.s }, p7, [z31.s, #124]
+# CHECK-NEXT: 6 4 1.00 * st2b { z0.b, z1.b }, p0, [x0, x0]
+# CHECK-NEXT: 6 4 1.00 * st2b { z0.b, z1.b }, p0, [x0]
+# CHECK-NEXT: 6 4 1.00 * st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2b { z5.b, z6.b }, p3, [x17, x16]
+# CHECK-NEXT: 6 4 1.00 * st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 6 4 1.00 * st2d { z0.d, z1.d }, p0, [x0]
+# CHECK-NEXT: 6 4 1.00 * st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 6 4 1.00 * st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 6 4 1.00 * st2h { z0.h, z1.h }, p0, [x0]
+# CHECK-NEXT: 6 4 1.00 * st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 6 4 1.00 * st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 6 4 1.00 * st2w { z0.s, z1.s }, p0, [x0]
+# CHECK-NEXT: 6 4 1.00 * st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 6 4 1.00 * st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 18 7 3.00 * st3b { z0.b - z2.b }, p0, [x0, x0]
+# CHECK-NEXT: 18 7 3.00 * st3b { z0.b - z2.b }, p0, [x0]
+# CHECK-NEXT: 18 7 3.00 * st3b { z21.b - z23.b }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3b { z23.b - z25.b }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3b { z5.b - z7.b }, p3, [x17, x16]
+# CHECK-NEXT: 18 7 3.00 * st3d { z0.d - z2.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 18 7 3.00 * st3d { z0.d - z2.d }, p0, [x0]
+# CHECK-NEXT: 18 7 3.00 * st3d { z21.d - z23.d }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3d { z23.d - z25.d }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3d { z5.d - z7.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 18 7 3.00 * st3h { z0.h - z2.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 18 7 3.00 * st3h { z0.h - z2.h }, p0, [x0]
+# CHECK-NEXT: 18 7 3.00 * st3h { z21.h - z23.h }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3h { z23.h - z25.h }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3h { z5.h - z7.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 18 7 3.00 * st3w { z0.s - z2.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 18 7 3.00 * st3w { z0.s - z2.s }, p0, [x0]
+# CHECK-NEXT: 18 7 3.00 * st3w { z21.s - z23.s }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3w { z23.s - z25.s }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 18 7 3.00 * st3w { z5.s - z7.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 24 7 4.00 * st4b { z0.b - z3.b }, p0, [x0, x0]
+# CHECK-NEXT: 24 7 4.00 * st4b { z0.b - z3.b }, p0, [x0]
+# CHECK-NEXT: 24 7 4.00 * st4b { z21.b - z24.b }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4b { z23.b - z26.b }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4b { z5.b - z8.b }, p3, [x17, x16]
+# CHECK-NEXT: 24 7 4.00 * st4d { z0.d - z3.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 24 7 4.00 * st4d { z0.d - z3.d }, p0, [x0]
+# CHECK-NEXT: 24 7 4.00 * st4d { z21.d - z24.d }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4d { z23.d - z26.d }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4d { z5.d - z8.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 24 7 4.00 * st4h { z0.h - z3.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 24 7 4.00 * st4h { z0.h - z3.h }, p0, [x0]
+# CHECK-NEXT: 24 7 4.00 * st4h { z21.h - z24.h }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4h { z23.h - z26.h }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4h { z5.h - z8.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 24 7 4.00 * st4w { z0.s - z3.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 24 7 4.00 * st4w { z0.s - z3.s }, p0, [x0]
+# CHECK-NEXT: 24 7 4.00 * st4w { z21.s - z24.s }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4w { z23.s - z26.s }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 24 7 4.00 * st4w { z5.s - z8.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 2 1 0.50 * stnt1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: 2 1 0.50 * stnt1b { z0.b }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1b { z0.d }, p0, [z1.d]
+# CHECK-NEXT: 16 8 4.00 * stnt1b { z0.s }, p0, [z1.s]
+# CHECK-NEXT: 2 1 0.50 * stnt1b { z21.b }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 2 1 0.50 * stnt1b { z23.b }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 8 4 2.00 * stnt1b { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1b { z31.d }, p7, [z31.d]
+# CHECK-NEXT: 16 8 4.00 * stnt1b { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: 16 8 4.00 * stnt1b { z31.s }, p7, [z31.s]
+# CHECK-NEXT: 2 1 0.50 * stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 2 1 0.50 * stnt1d { z0.d }, p0, [x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1d { z0.d }, p0, [z1.d]
+# CHECK-NEXT: 2 1 0.50 * stnt1d { z21.d }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 2 1 0.50 * stnt1d { z23.d }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 8 4 2.00 * stnt1d { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1d { z31.d }, p7, [z31.d]
+# CHECK-NEXT: 8 4 2.00 * stnt1h { z0.d }, p0, [z1.d]
+# CHECK-NEXT: 2 1 0.50 * stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 2 1 0.50 * stnt1h { z0.h }, p0, [x0]
+# CHECK-NEXT: 16 8 4.00 * stnt1h { z0.s }, p0, [z1.s]
+# CHECK-NEXT: 2 1 0.50 * stnt1h { z21.h }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 2 1 0.50 * stnt1h { z23.h }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 8 4 2.00 * stnt1h { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1h { z31.d }, p7, [z31.d]
+# CHECK-NEXT: 16 8 4.00 * stnt1h { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: 16 8 4.00 * stnt1h { z31.s }, p7, [z31.s]
+# CHECK-NEXT: 8 4 2.00 * stnt1w { z0.d }, p0, [z1.d]
+# CHECK-NEXT: 2 1 0.50 * stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 2 1 0.50 * stnt1w { z0.s }, p0, [x0]
+# CHECK-NEXT: 16 8 4.00 * stnt1w { z0.s }, p0, [z1.s]
+# CHECK-NEXT: 2 1 0.50 * stnt1w { z21.s }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 2 1 0.50 * stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 8 4 2.00 * stnt1w { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: 8 4 2.00 * stnt1w { z31.d }, p7, [z31.d]
+# CHECK-NEXT: 16 8 4.00 * stnt1w { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: 16 8 4.00 * stnt1w { z31.s }, p7, [z31.s]
+# CHECK-NEXT: 3 4 0.50 * str p0, [x0]
+# CHECK-NEXT: 3 4 0.50 * str p15, [sp, #-256, mul vl]
+# CHECK-NEXT: 3 4 0.50 * str p5, [x10, #255, mul vl]
+# CHECK-NEXT: 2 1 0.50 * str z0, [x0]
+# CHECK-NEXT: 2 1 0.50 * str z21, [x10, #-256, mul vl]
+# CHECK-NEXT: 2 1 0.50 * str z31, [sp, #255, mul vl]
+# CHECK-NEXT: 1 1 0.50 sub z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 1 0.50 sub z0.b, z0.b, #0
+# CHECK-NEXT: 1 1 0.50 sub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 1 0.50 sub z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 sub z0.d, z0.d, #0
+# CHECK-NEXT: 1 1 0.50 sub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 sub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 sub z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 1 0.50 sub z0.h, z0.h, #0
+# CHECK-NEXT: 1 1 0.50 sub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 sub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 1 0.50 sub z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 sub z0.s, z0.s, #0
+# CHECK-NEXT: 1 1 0.50 sub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 sub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 sub z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: 1 1 0.50 sub z21.b, z10.b, z21.b
+# CHECK-NEXT: 1 1 0.50 sub z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: 1 1 0.50 sub z21.d, z10.d, z21.d
+# CHECK-NEXT: 1 1 0.50 sub z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: 1 1 0.50 sub z21.h, z10.h, z21.h
+# CHECK-NEXT: 1 1 0.50 sub z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: 1 1 0.50 sub z21.s, z10.s, z21.s
+# CHECK-NEXT: 1 1 0.50 sub z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: 1 1 0.50 sub z23.b, z13.b, z8.b
+# CHECK-NEXT: 1 1 0.50 sub z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: 1 1 0.50 sub z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 1 0.50 sub z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: 1 1 0.50 sub z23.h, z13.h, z8.h
+# CHECK-NEXT: 1 1 0.50 sub z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: 1 1 0.50 sub z23.s, z13.s, z8.s
+# CHECK-NEXT: 1 1 0.50 sub z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 sub z31.b, z31.b, #255
+# CHECK-NEXT: 1 1 0.50 sub z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 1 0.50 sub z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 sub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 1 0.50 sub z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 1 0.50 sub z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 sub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 1 0.50 sub z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 1 0.50 sub z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 sub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 1 0.50 sub z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 subhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 subhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 subhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 subhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 subhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: 1 2 0.50 subhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: 1 1 0.50 subr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 1 0.50 subr z0.b, z0.b, #0
+# CHECK-NEXT: 1 1 0.50 subr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 1 0.50 subr z0.d, z0.d, #0
+# CHECK-NEXT: 1 1 0.50 subr z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 subr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 1 0.50 subr z0.h, z0.h, #0
+# CHECK-NEXT: 1 1 0.50 subr z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 subr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 1 0.50 subr z0.s, z0.s, #0
+# CHECK-NEXT: 1 1 0.50 subr z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 1 0.50 subr z31.b, z31.b, #255
+# CHECK-NEXT: 1 1 0.50 subr z31.d, z31.d, #65280
+# CHECK-NEXT: 1 1 0.50 subr z31.h, z31.h, #65280
+# CHECK-NEXT: 1 1 0.50 subr z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 0.50 sunpkhi z31.d, z31.s
+# CHECK-NEXT: 1 2 0.50 sunpkhi z31.h, z31.b
+# CHECK-NEXT: 1 2 0.50 sunpkhi z31.s, z31.h
+# CHECK-NEXT: 1 2 0.50 sunpklo z31.d, z31.s
+# CHECK-NEXT: 1 2 0.50 sunpklo z31.h, z31.b
+# CHECK-NEXT: 1 2 0.50 sunpklo z31.s, z31.h
+# CHECK-NEXT: 1 2 0.50 suqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 suqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 suqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 suqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 1 0.50 sxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 sxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 1 0.50 sxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 sxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 sxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 sxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 sxth z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 sxth z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 sxth z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 sxth z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 sxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 sxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 2 0.50 tbl z28.b, { z29.b, z30.b }, z31.b
+# CHECK-NEXT: 1 2 0.50 tbl z28.d, { z29.d, z30.d }, z31.d
+# CHECK-NEXT: 1 2 0.50 tbl z28.h, { z29.h, z30.h }, z31.h
+# CHECK-NEXT: 1 2 0.50 tbl z28.s, { z29.s, z30.s }, z31.s
+# CHECK-NEXT: 1 2 0.50 tbl z31.b, { z31.b }, z31.b
+# CHECK-NEXT: 1 2 0.50 tbl z31.d, { z31.d }, z31.d
+# CHECK-NEXT: 1 2 0.50 tbl z31.h, { z31.h }, z31.h
+# CHECK-NEXT: 1 2 0.50 tbl z31.s, { z31.s }, z31.s
+# CHECK-NEXT: 1 2 0.50 tbx z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 tbx z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 tbx z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 tbx z31.s, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 trn1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 trn1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 trn1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 trn1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 trn1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 trn1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 trn1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 trn1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 trn2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 trn2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 trn2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 trn2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 trn2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 trn2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 trn2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 trn2 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 uaba z0.b, z1.b, z31.b
+# CHECK-NEXT: 1 2 0.50 uaba z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 2 0.50 uaba z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 uaba z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uabalb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uabalb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 uabalb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 uabalt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uabalt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 uabalt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 2 0.50 uabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 uabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 uabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 uabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uabdlb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 uabdlb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 uabdlb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uabdlt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 uabdlt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 uabdlt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uadalp z0.h, p0/m, z1.b
+# CHECK-NEXT: 1 3 0.50 uadalp z29.s, p0/m, z30.h
+# CHECK-NEXT: 1 3 0.50 uadalp z30.d, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 uaddlb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 uaddlb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 uaddlb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uaddlt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 uaddlt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 uaddlt z31.d, z31.s, z31.s
+# CHECK-NEXT: 5 13 2.50 uaddv d0, p7, z31.b
+# CHECK-NEXT: 2 4 1.00 uaddv d0, p7, z31.d
+# CHECK-NEXT: 4 10 2.00 uaddv d0, p7, z31.h
+# CHECK-NEXT: 3 7 1.50 uaddv d0, p7, z31.s
+# CHECK-NEXT: 1 1 0.50 uaddwb z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 uaddwb z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 uaddwb z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 1 0.50 uaddwt z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 uaddwt z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 uaddwt z31.d, z31.d, z31.s
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: 2 4 1.00 ucvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: 2 9 1.00 udiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 7 1.00 udiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 9 1.00 udivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 7 1.00 udivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 udot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: 1 3 0.50 udot z0.d, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 udot z0.s, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 udot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: 1 2 0.50 uhadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uhadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uhadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uhadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uhsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uhsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uhsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uhsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uhsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uhsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uhsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uhsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 umax z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 umax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 umax z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 umax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 umax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 umax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umaxp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 umaxp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 umaxp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 umaxp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 5 14 2.50 umaxv b0, p7, z31.b
+# CHECK-NEXT: 2 5 1.00 umaxv d0, p7, z31.d
+# CHECK-NEXT: 4 11 2.00 umaxv h0, p7, z31.h
+# CHECK-NEXT: 3 8 1.50 umaxv s0, p7, z31.s
+# CHECK-NEXT: 1 2 0.50 umin z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 umin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 umin z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 umin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 umin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 umin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 uminp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 uminp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 uminp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 uminp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 5 14 2.50 uminv b0, p7, z31.b
+# CHECK-NEXT: 2 5 1.00 uminv d0, p7, z31.d
+# CHECK-NEXT: 4 11 2.00 uminv h0, p7, z31.h
+# CHECK-NEXT: 3 8 1.50 uminv s0, p7, z31.s
+# CHECK-NEXT: 1 4 1.00 umlalb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 umlalb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umlalb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 umlalb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umlalb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 umlalt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 umlalt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umlalt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 umlalt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umlalt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 umlslb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 umlslb z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umlslb z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 umlslb z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umlslb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 4 1.00 umlslt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 4 1.00 umlslt z0.d, z1.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umlslt z0.h, z1.b, z31.b
+# CHECK-NEXT: 1 3 0.50 umlslt z0.s, z1.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umlslt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 ummla z0.s, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 umulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 3 0.50 umulh z0.b, z1.b, z2.b
+# CHECK-NEXT: 2 4 1.00 umulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 3 0.50 umulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umulh z0.h, z1.h, z2.h
+# CHECK-NEXT: 1 3 0.50 umulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umulh z29.s, z30.s, z31.s
+# CHECK-NEXT: 2 4 1.00 umulh z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 3 0.50 umullb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 umullb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 umullb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 umullb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umullb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 umullt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: 1 3 0.50 umullt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 umullt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: 1 3 0.50 umullt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 umullt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 uqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqadd z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 uqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 uqadd z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 uqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 uqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqadd z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 uqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 uqadd z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 uqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 uqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqadd z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 uqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqadd z31.d, z31.d, #65280
+# CHECK-NEXT: 1 2 0.50 uqadd z31.h, z31.h, #65280
+# CHECK-NEXT: 1 2 0.50 uqadd z31.s, z31.s, #65280
+# CHECK-NEXT: 1 1 0.17 uqdecb w0
+# CHECK-NEXT: 1 1 0.17 uqdecb w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecb w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecb w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecb x0
+# CHECK-NEXT: 1 1 0.17 uqdecb x0, #14
+# CHECK-NEXT: 1 1 0.17 uqdecb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecb x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecb x0, vl1
+# CHECK-NEXT: 1 1 0.17 uqdecd w0
+# CHECK-NEXT: 1 1 0.17 uqdecd w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecd w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecd w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecd x0
+# CHECK-NEXT: 1 1 0.17 uqdecd x0, #14
+# CHECK-NEXT: 1 1 0.17 uqdecd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecd x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecd x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqdecd z0.d
+# CHECK-NEXT: 2 5 1.00 uqdecd z0.d, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqdecd z0.d, pow2
+# CHECK-NEXT: 2 5 1.00 uqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdech w0
+# CHECK-NEXT: 1 1 0.17 uqdech w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdech w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdech w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdech x0
+# CHECK-NEXT: 1 1 0.17 uqdech x0, #14
+# CHECK-NEXT: 1 1 0.17 uqdech x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdech x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdech x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqdech z0.h
+# CHECK-NEXT: 2 5 1.00 uqdech z0.h, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqdech z0.h, pow2
+# CHECK-NEXT: 2 5 1.00 uqdech z0.h, pow2, mul #16
+# CHECK-NEXT: 2 7 0.50 uqdecp wzr, p15.b
+# CHECK-NEXT: 2 7 0.50 uqdecp wzr, p15.d
+# CHECK-NEXT: 2 7 0.50 uqdecp wzr, p15.h
+# CHECK-NEXT: 2 7 0.50 uqdecp wzr, p15.s
+# CHECK-NEXT: 2 7 0.50 uqdecp x0, p0.b
+# CHECK-NEXT: 2 7 0.50 uqdecp x0, p0.d
+# CHECK-NEXT: 2 7 0.50 uqdecp x0, p0.h
+# CHECK-NEXT: 2 7 0.50 uqdecp x0, p0.s
+# CHECK-NEXT: 2 4 0.50 uqdecp z0.d, p0.d
+# CHECK-NEXT: 2 4 0.50 uqdecp z0.h, p0.h
+# CHECK-NEXT: 2 4 0.50 uqdecp z0.s, p0.s
+# CHECK-NEXT: 1 1 0.17 uqdecw w0
+# CHECK-NEXT: 1 1 0.17 uqdecw w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecw w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecw w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecw x0
+# CHECK-NEXT: 1 1 0.17 uqdecw x0, #14
+# CHECK-NEXT: 1 1 0.17 uqdecw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqdecw x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqdecw x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqdecw z0.s
+# CHECK-NEXT: 2 5 1.00 uqdecw z0.s, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqdecw z0.s, pow2
+# CHECK-NEXT: 2 5 1.00 uqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincb w0
+# CHECK-NEXT: 1 1 0.17 uqincb w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincb w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincb w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincb x0
+# CHECK-NEXT: 1 1 0.17 uqincb x0, #14
+# CHECK-NEXT: 1 1 0.17 uqincb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincb x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincb x0, vl1
+# CHECK-NEXT: 1 1 0.17 uqincd w0
+# CHECK-NEXT: 1 1 0.17 uqincd w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincd w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincd w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincd x0
+# CHECK-NEXT: 1 1 0.17 uqincd x0, #14
+# CHECK-NEXT: 1 1 0.17 uqincd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincd x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincd x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqincd z0.d
+# CHECK-NEXT: 2 5 1.00 uqincd z0.d, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqincd z0.d, pow2
+# CHECK-NEXT: 2 5 1.00 uqincd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqinch w0
+# CHECK-NEXT: 1 1 0.17 uqinch w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqinch w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqinch w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqinch x0
+# CHECK-NEXT: 1 1 0.17 uqinch x0, #14
+# CHECK-NEXT: 1 1 0.17 uqinch x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqinch x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqinch x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqinch z0.h
+# CHECK-NEXT: 2 5 1.00 uqinch z0.h, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqinch z0.h, pow2
+# CHECK-NEXT: 2 5 1.00 uqinch z0.h, pow2, mul #16
+# CHECK-NEXT: 2 7 0.50 uqincp wzr, p15.b
+# CHECK-NEXT: 2 7 0.50 uqincp wzr, p15.d
+# CHECK-NEXT: 2 7 0.50 uqincp wzr, p15.h
+# CHECK-NEXT: 2 7 0.50 uqincp wzr, p15.s
+# CHECK-NEXT: 2 7 0.50 uqincp x0, p0.b
+# CHECK-NEXT: 2 7 0.50 uqincp x0, p0.d
+# CHECK-NEXT: 2 7 0.50 uqincp x0, p0.h
+# CHECK-NEXT: 2 7 0.50 uqincp x0, p0.s
+# CHECK-NEXT: 2 4 0.50 uqincp z0.d, p0.d
+# CHECK-NEXT: 2 4 0.50 uqincp z0.h, p0.h
+# CHECK-NEXT: 2 4 0.50 uqincp z0.s, p0.s
+# CHECK-NEXT: 1 1 0.17 uqincw w0
+# CHECK-NEXT: 1 1 0.17 uqincw w0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincw w0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincw w0, pow2, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincw x0
+# CHECK-NEXT: 1 1 0.17 uqincw x0, #14
+# CHECK-NEXT: 1 1 0.17 uqincw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.17 uqincw x0, pow2
+# CHECK-NEXT: 1 1 0.17 uqincw x0, vl1
+# CHECK-NEXT: 2 5 1.00 uqincw z0.s
+# CHECK-NEXT: 2 5 1.00 uqincw z0.s, all, mul #16
+# CHECK-NEXT: 2 5 1.00 uqincw z0.s, pow2
+# CHECK-NEXT: 2 5 1.00 uqincw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 2 0.50 uqrshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqrshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqrshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqrshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqrshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqrshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqrshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqrshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 uqrshrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 uqrshrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 uqshl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 uqshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqshl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 uqshl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 uqshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqshl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 uqshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqshl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 uqshl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: 1 2 0.50 uqshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqshl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 uqshl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 uqshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqshrnb z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnb z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnb z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnb z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 uqshrnb z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 uqshrnb z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 uqshrnt z0.b, z0.h, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnt z0.h, z0.s, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnt z0.s, z0.d, #1
+# CHECK-NEXT: 1 2 0.50 uqshrnt z31.b, z31.h, #8
+# CHECK-NEXT: 1 2 0.50 uqshrnt z31.h, z31.s, #16
+# CHECK-NEXT: 1 2 0.50 uqshrnt z31.s, z31.d, #32
+# CHECK-NEXT: 1 2 0.50 uqsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqsub z0.b, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 uqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 uqsub z0.d, z0.d, #0
+# CHECK-NEXT: 1 2 0.50 uqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 uqsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqsub z0.h, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 uqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 uqsub z0.s, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 uqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 2 0.50 uqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 uqsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqsub z31.b, z31.b, #255
+# CHECK-NEXT: 1 2 0.50 uqsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqsub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 2 0.50 uqsub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 2 0.50 uqsub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 0.50 uqsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 uqsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 uqsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 uqsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 2 0.50 uqxtnb z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 uqxtnb z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 uqxtnb z0.s, z31.d
+# CHECK-NEXT: 1 2 0.50 uqxtnt z0.b, z31.h
+# CHECK-NEXT: 1 2 0.50 uqxtnt z0.h, z31.s
+# CHECK-NEXT: 1 2 0.50 uqxtnt z0.s, z31.d
+# CHECK-NEXT: 2 4 1.00 urecpe z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 2 0.50 urhadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 urhadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 urhadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 urhadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 urshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 urshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 urshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 urshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 urshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 3 0.50 urshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 3 0.50 urshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 3 0.50 urshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 urshr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 urshr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 urshr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 urshr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 urshr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 urshr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 urshr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 urshr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 2 4 1.00 ursqrte z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 0.50 ursra z0.b, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 ursra z0.d, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 ursra z0.h, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 ursra z0.s, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 ursra z31.b, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 ursra z31.d, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 ursra z31.h, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 ursra z31.s, z31.s, #32
+# CHECK-NEXT: 1 2 0.50 ushllb z0.d, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 ushllb z0.h, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 ushllb z0.s, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 ushllb z31.d, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 ushllb z31.h, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 ushllb z31.s, z31.h, #15
+# CHECK-NEXT: 1 2 0.50 ushllt z0.d, z0.s, #0
+# CHECK-NEXT: 1 2 0.50 ushllt z0.h, z0.b, #0
+# CHECK-NEXT: 1 2 0.50 ushllt z0.s, z0.h, #0
+# CHECK-NEXT: 1 2 0.50 ushllt z31.d, z31.s, #31
+# CHECK-NEXT: 1 2 0.50 ushllt z31.h, z31.b, #7
+# CHECK-NEXT: 1 2 0.50 ushllt z31.s, z31.h, #15
+# CHECK-NEXT: 1 3 0.50 usmmla z0.s, z1.b, z2.b
+# CHECK-NEXT: 1 2 0.50 usqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: 1 2 0.50 usqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: 1 2 0.50 usqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: 1 2 0.50 usqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 1 3 0.50 usra z0.b, z0.b, #1
+# CHECK-NEXT: 1 3 0.50 usra z0.d, z0.d, #1
+# CHECK-NEXT: 1 3 0.50 usra z0.h, z0.h, #1
+# CHECK-NEXT: 1 3 0.50 usra z0.s, z0.s, #1
+# CHECK-NEXT: 1 3 0.50 usra z31.b, z31.b, #8
+# CHECK-NEXT: 1 3 0.50 usra z31.d, z31.d, #64
+# CHECK-NEXT: 1 3 0.50 usra z31.h, z31.h, #16
+# CHECK-NEXT: 1 3 0.50 usra z31.s, z31.s, #32
+# CHECK-NEXT: 1 3 0.50 usublb z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 usublb z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 usublb z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 3 0.50 usublt z0.h, z1.b, z2.b
+# CHECK-NEXT: 1 3 0.50 usublt z29.s, z30.h, z31.h
+# CHECK-NEXT: 1 3 0.50 usublt z31.d, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 usubwb z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 usubwb z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 usubwb z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 1 0.50 usubwt z0.h, z1.h, z2.b
+# CHECK-NEXT: 1 1 0.50 usubwt z29.s, z30.s, z31.h
+# CHECK-NEXT: 1 1 0.50 usubwt z31.d, z31.d, z31.s
+# CHECK-NEXT: 1 2 0.50 uunpkhi z31.d, z31.s
+# CHECK-NEXT: 1 2 0.50 uunpkhi z31.h, z31.b
+# CHECK-NEXT: 1 2 0.50 uunpkhi z31.s, z31.h
+# CHECK-NEXT: 1 2 0.50 uunpklo z31.d, z31.s
+# CHECK-NEXT: 1 2 0.50 uunpklo z31.h, z31.b
+# CHECK-NEXT: 1 2 0.50 uunpklo z31.s, z31.h
+# CHECK-NEXT: 1 1 0.50 uxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 uxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 1 0.50 uxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 uxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 uxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 1 0.50 uxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 uxth z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 uxth z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 1 0.50 uxth z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 1 0.50 uxth z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 uxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 1 0.50 uxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: 2 2 0.50 uzp1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 uzp1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 uzp1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 uzp1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 uzp1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 uzp1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 uzp1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 uzp2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 uzp2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 uzp2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 uzp2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 uzp2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 uzp2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 uzp2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 2 0.50 whilege p15.b, w0, wzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.b, wzr, w0
+# CHECK-NEXT: 1 2 0.50 whilege p15.b, x0, xzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.b, xzr, x0
+# CHECK-NEXT: 1 2 0.50 whilege p15.d, w0, wzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.d, x0, xzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.h, w0, wzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.h, x0, xzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.s, w0, wzr
+# CHECK-NEXT: 1 2 0.50 whilege p15.s, x0, xzr
+# CHECK-NEXT: 1 2 0.50 whilerw p15.b, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilerw p15.d, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilerw p15.h, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilerw p15.s, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilewr p15.b, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilewr p15.d, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilewr p15.h, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilewr p15.s, x30, x30
+# CHECK-NEXT: 2 9 9.00 * U wrffr p0.b
+# CHECK-NEXT: 2 9 9.00 * U wrffr p15.b
+# CHECK-NEXT: 1 2 0.50 xar z0.b, z0.b, z1.b, #1
+# CHECK-NEXT: 1 2 0.50 xar z0.d, z0.d, z1.d, #1
+# CHECK-NEXT: 1 2 0.50 xar z0.h, z0.h, z1.h, #1
+# CHECK-NEXT: 1 2 0.50 xar z0.s, z0.s, z1.s, #1
+# CHECK-NEXT: 1 2 0.50 xar z31.b, z31.b, z30.b, #8
+# CHECK-NEXT: 1 2 0.50 xar z31.d, z31.d, z30.d, #64
+# CHECK-NEXT: 1 2 0.50 xar z31.h, z31.h, z30.h, #16
+# CHECK-NEXT: 1 2 0.50 xar z31.s, z31.s, z30.s, #32
+# CHECK-NEXT: 2 2 0.50 zip1 p0.b, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 zip1 p0.d, p0.d, p0.d
+# CHECK-NEXT: 2 2 0.50 zip1 p0.h, p0.h, p0.h
+# CHECK-NEXT: 2 2 0.50 zip1 p0.s, p0.s, p0.s
+# CHECK-NEXT: 2 2 0.50 zip1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 zip1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 zip1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 zip1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 zip1 z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 zip1 z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 zip1 z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 zip1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 zip1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 zip1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 zip1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 2 2 0.50 zip2 p0.b, p0.b, p0.b
+# CHECK-NEXT: 2 2 0.50 zip2 p0.d, p0.d, p0.d
+# CHECK-NEXT: 2 2 0.50 zip2 p0.h, p0.h, p0.h
+# CHECK-NEXT: 2 2 0.50 zip2 p0.s, p0.s, p0.s
+# CHECK-NEXT: 2 2 0.50 zip2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 2 2 0.50 zip2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 2 2 0.50 zip2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 2 2 0.50 zip2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 2 0.50 zip2 z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 zip2 z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 2 0.50 zip2 z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 2 0.50 zip2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 2 0.50 zip2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 2 0.50 zip2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 2 0.50 zip2 z31.s, z31.s, z31.s
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - 466.67 466.67 466.67 52.83 61.33 52.83 61.33 77.33 77.33 401.00 401.00 401.00 401.00 1726.50 1699.50 1726.50 1699.50
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z0.b, p0/m, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 abs z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adclb z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adclb z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adclt z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adclt z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z0.s, z1.s, z2.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 add z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 addp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addpl sp, sp, #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addpl x0, x0, #-32
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addpl x21, x21, #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addpl x23, x8, #-1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addvl sp, sp, #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addvl x0, x0, #-32
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addvl x21, x21, #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - addvl x23, x8, #-1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, sxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, sxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, sxtw #3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, uxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, uxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, uxtw #3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.d, [z0.d, z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.s, [z0.s, z0.s, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.s, [z0.s, z0.s, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.s, [z0.s, z0.s, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 adr z0.s, [z0.s, z0.s]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesd z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aese z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesimc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesimc z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesmc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 aesmc z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z0.d, z0.d, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z0.s, z0.s, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z23.h, z23.h, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z23.h, z23.h, #0xfff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 and z5.b, z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ands p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 andv b0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 andv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 andv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 andv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asr z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrd z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 asrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bcax z29.d, z29.d, z30.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bdep z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bdep z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bdep z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bdep z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bext z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bext z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bext z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bext z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfcvt z0.h, p0/m, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfcvtnt z0.h, p0/m, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfdot z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfdot z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bfdot z0.s, z1.h, z2.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalb z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalb z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalb z0.s, z1.h, z2.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalb z10.s, z21.h, z14.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalb z21.s, z14.h, z3.h[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalt z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalt z0.s, z1.h, z2.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalt z0.s, z1.h, z2.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bfmlalt z14.s, z10.h, z21.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 2.00 2.00 2.00 bfmmla z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bgrp z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bgrp z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bgrp z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 bgrp z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bic z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bics p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bics p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brka p0.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brka p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brkas p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brkb p0.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brkb p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 - 0.50 - brkbs p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkn p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkns p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpa p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpa p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpas p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpas p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpb p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpb p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpbs p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 brkpbs p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bsl z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bsl1n z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 bsl2n z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z0.b, z0.b, z0.b, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z0.d, z0.d, z0.d, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z0.h, z0.h, z0.h, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z0.s, z0.s, z0.s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z31.b, z31.b, z31.b, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z31.d, z31.d, z31.d, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z31.h, z31.h, z31.h, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cadd z31.s, z31.s, z31.s, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.d, z1.h, z15.h[1], #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.d, z1.h, z31.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.d, z1.h, z31.h, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.d, z1.h, z31.h, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.d, z1.h, z31.h, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.s, z1.b, z31.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z0.s, z1.b, z7.b[3], #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z29.d, z30.h, z0.h[0], #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z31.d, z30.h, z7.h[1], #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cdot z5.d, z6.h, z3.h[0], #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta b0, p7, b0, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta s0, p7, s0, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clasta w0, p7, w0, z31.b
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clasta w0, p7, w0, z31.h
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clasta w0, p7, w0, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clasta x0, p7, x0, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clasta z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb b0, p7, b0, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb s0, p7, s0, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clastb w0, p7, w0, z31.b
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clastb w0, p7, w0, z31.h
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clastb w0, p7, w0, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 clastb x0, p7, x0, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clastb z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cls z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cls z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cls z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cls z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clz z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clz z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clz z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 clz z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z0.b, z1.b, z2.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 cmla z0.d, z1.d, z2.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z0.h, z1.h, z2.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z0.h, z1.h, z2.h[0], #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z0.s, z1.s, z2.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z0.s, z1.s, z2.s[0], #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z15.b, z16.b, z17.b, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 cmla z15.d, z16.d, z17.d, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z15.h, z16.h, z17.h, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z15.s, z16.s, z17.s, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z29.b, z30.b, z31.b, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 cmla z29.d, z30.d, z31.d, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z29.h, z30.h, z31.h, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z29.s, z30.s, z31.s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z31.b, z31.b, z31.b, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 cmla z31.d, z31.d, z31.d, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z31.h, z30.h, z7.h[0], #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z31.h, z31.h, z31.h, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z31.s, z30.s, z7.s[0], #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmla z31.s, z31.s, z31.s, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpeq p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphi p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmphs p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmple p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplo p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpls p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmplt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cmpne p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnot z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnot z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnot z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnot z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnt z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnt z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnt z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cnt z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntb x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntb x0, #28
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntb x0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntb x0, pow2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntd x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntd x0, #28
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntd x0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntd x0, pow2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cnth x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cnth x0, #28
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cnth x0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cnth x0, pow2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cntp x0, p15, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cntp x0, p15, p0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cntp x0, p15, p0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 cntp x0, p15, p0.s
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntw x0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntw x0, #28
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntw x0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - cntw x0, pow2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 compact z31.d, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 compact z31.s, p7, z31.s
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermeq w30, wzr
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermeq wzr, w30
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermeq x30, xzr
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermeq xzr, x30
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermne w30, wzr
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermne wzr, w30
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermne x30, xzr
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - ctermne xzr, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - decb x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - decb x0, #14
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 eor z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 eor z5.b, z5.b, #0xf9
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 eortb z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 eortb z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 eortb z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 eorv b0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 eorv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 eorv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 eorv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ext z0.b, { z1.b, z2.b }, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ext z31.b, z31.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ext z31.b, z31.b, z0.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ext z31.b, { z30.b, z31.b }, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fabs z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 facgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fadd z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 6.00 6.00 6.00 6.00 fadda d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 9.00 9.00 9.00 9.00 fadda h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 5.00 5.00 5.00 5.00 fadda s0, p7, s0, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 faddp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 faddp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 faddp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.50 1.50 1.50 1.50 faddv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.50 2.50 2.50 2.50 faddv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 2.00 2.00 2.00 faddv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcadd z0.d, p0/m, z0.d, z0.d, #90
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcadd z31.d, p7/m, z31.d, z31.d, #270
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcadd z31.s, p7/m, z31.s, z31.s, #270
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmeq p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmeq p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmeq p0.s, p0/z, z0.s, z1.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.d, p0/m, z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.d, p0/m, z1.d, z2.d, #90
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.h, p0/m, z1.h, z2.h, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.h, z0.h, z0.h[0], #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.s, p0/m, z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z0.s, p0/m, z1.s, z2.s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z21.s, z10.s, z5.s[1], #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z23.s, z13.s, z8.s[0], #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z29.d, p7/m, z30.d, z31.d, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z29.h, p7/m, z30.h, z31.h, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z29.s, p7/m, z30.s, z31.s, #180
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z31.h, z31.h, z7.h[3], #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmla z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmle p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmle p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmle p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmlt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmlt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmlt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmne p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmuo p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmuo p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fcmuo p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvt z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtlt z0.s, p0/m, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtlt z30.d, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtnt z0.h, p0/m, z1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtnt z30.s, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtx z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtx z30.s, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtxnt z0.s, p0/m, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtxnt z30.s, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzs z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fcvtzu z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdiv z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdivr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fexpa z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fexpa z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fexpa z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 flogb z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 flogb z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 flogb z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmax z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnmp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnmp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxnmp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxnmv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxnmv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxnmv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmaxp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fmaxv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmin z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnmp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnmp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminnmp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminnmv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminnmv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminnmv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminp z29.s, p3/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fminp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fminv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalb z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalb z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalt z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlalt z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslb z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslb z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslt z0.s, z1.h, z7.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmlslt z30.s, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.d, #-10.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.d, #0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.d, p0/m, #-10.00000000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.d, p0/m, #0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.h, #-0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.h, p0/m, #-0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.s, #-0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmov z0.s, p0/m, #-0.12500000
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.d, z0.d, z0.d[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.h, z0.h, z0.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.s, z0.s, z0.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.d, p7/m, z31.d, #2.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.d, z31.d, z15.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.h, p7/m, z31.h, #2.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.h, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.s, p7/m, z31.s, #2.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmul z31.s, z31.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmulx z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmulx z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fmulx z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fneg z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fneg z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fneg z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fnmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpe z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpe z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpe z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecps z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecps z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frecps z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpx z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpx z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frecpx z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinta z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinta z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinta z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinti z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinti z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frinti z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintm z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintm z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintm z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintn z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintn z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintn z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintp z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintp z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintp z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintx z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintx z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintx z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintz z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintz z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frintz z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frsqrte z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frsqrte z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 frsqrte z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrts z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrts z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 frsqrts z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fscale z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fscale z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fscale z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fsqrt z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fsqrt z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 fsqrt z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsub z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 fsubr z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftmad z0.d, z0.d, z31.d, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftmad z0.h, z0.h, z31.h, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftmad z0.s, z0.s, z31.s, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftsmul z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftsmul z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftsmul z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftssel z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftssel z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ftssel z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 histcnt z0.s, p0/z, z1.s, z2.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 histcnt z29.d, p7/z, z30.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 histseg z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incb x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incb x0, #14
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incb x0, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incb x0, pow2
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incb x0, vl1
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incd x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incd x0, #14
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incd x0, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incd x0, pow2
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incd x0, vl1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 incd z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 incd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - inch x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - inch x0, #14
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - inch x0, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - inch x0, pow2
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - inch x0, vl1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 inch z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 inch z0.h, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp x0, p0.b
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp x0, p0.d
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp x0, p0.h
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp x0, p0.s
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp xzr, p15.b
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp xzr, p15.d
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp xzr, p15.h
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - 0.50 - 0.50 - incp xzr, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 incp z31.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 incp z31.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 incp z31.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incw x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incw x0, #14
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incw x0, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incw x0, pow2
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - incw x0, vl1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 incw z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 incw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z0.b, #0, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 index z0.d, #0, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z0.h, #0, #0
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z0.h, w0, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z0.s, #0, #0
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z21.b, w10, w21
+# CHECK-NEXT: - - - - - - 1.00 1.00 1.00 1.00 - - - - - - 2.00 2.00 2.00 2.00 index z21.d, x10, x21
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z21.s, w10, w21
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.b, #13, w8
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.b, w13, #8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 1.00 1.00 1.00 1.00 index z23.d, #13, x8
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 1.00 1.00 1.00 1.00 index z23.d, x13, #8
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.h, #13, w8
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.h, w13, #8
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.s, #13, w8
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z23.s, w13, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z31.b, #-1, #-1
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.b, #-1, wzr
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.b, wzr, #-1
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z31.b, wzr, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 index z31.d, #-1, #-1
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 1.00 1.00 1.00 1.00 index z31.d, #-1, xzr
+# CHECK-NEXT: - - - - - - 0.50 0.50 0.50 0.50 - - - - - - 1.00 1.00 1.00 1.00 index z31.d, xzr, #-1
+# CHECK-NEXT: - - - - - - 1.00 1.00 1.00 1.00 - - - - - - 2.00 2.00 2.00 2.00 index z31.d, xzr, xzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z31.h, #-1, #-1
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.h, #-1, wzr
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.h, wzr, #-1
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z31.h, wzr, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 index z31.s, #-1, #-1
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.s, #-1, wzr
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 index z31.s, wzr, #-1
+# CHECK-NEXT: - - - - - - 0.75 0.75 0.75 0.75 - - - - - - 1.50 1.50 1.50 1.50 index z31.s, wzr, wzr
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z0.b, w0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z0.d, x0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z0.h, w0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z0.s, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 insr z31.b, b31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z31.b, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 insr z31.d, d31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z31.d, xzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 insr z31.h, h31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z31.h, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 insr z31.s, s31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 insr z31.s, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lasta b0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lasta d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lasta h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lasta s0, p7, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lasta w0, p7, z31.b
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lasta w0, p7, z31.h
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lasta w0, p7, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lasta x0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lastb b0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lastb d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lastb h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lastb s0, p7, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lastb w0, p7, z31.b
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lastb w0, p7, z31.h
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lastb w0, p7, z31.s
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 lastb x0, p7, z31.d
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.b }, p0/z, [sp, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1b { z5.h }, p3/z, [x17, x16]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z31.b }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rd { z31.d }, p7/z, [sp, #504]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z31.h }, p7/z, [sp, #126]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqb { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqb { z21.b }, p5/z, [x10, #112]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqb { z23.b }, p3/z, [x13, #-128]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqb { z31.b }, p7/z, [sp, #-16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqd { z23.d }, p3/z, [x13, #-128]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqd { z23.d }, p3/z, [x13, #112]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqd { z31.d }, p7/z, [sp, #-16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqh { z23.h }, p3/z, [x13, #-128]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqh { z23.h }, p3/z, [x13, #112]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqh { z31.h }, p7/z, [sp, #-16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqw { z23.s }, p3/z, [x13, #-128]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqw { z23.s }, p3/z, [x13, #112]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1rqw { z31.s }, p7/z, [sp, #-16]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rsw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ld1rw { z31.s }, p7/z, [sp, #252]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z0.h }, p0/z, [sp, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ld1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ld1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2b { z0.b, z1.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2b { z0.b, z1.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2b { z5.b, z6.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2d { z0.d, z1.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2h { z0.h, z1.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2w { z0.s, z1.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - 0.67 0.67 0.67 - - - - - - - - - - 1.00 1.00 1.00 1.00 ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3b { z0.b - z2.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3b { z0.b - z2.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3b { z21.b - z23.b }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3b { z23.b - z25.b }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3b { z5.b - z7.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3d { z0.d - z2.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3d { z0.d - z2.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3d { z21.d - z23.d }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3d { z23.d - z25.d }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 1.50 1.50 1.50 1.50 ld3d { z5.d - z7.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3h { z0.h - z2.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3h { z0.h - z2.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3h { z21.h - z23.h }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3h { z23.h - z25.h }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3h { z5.h - z7.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3w { z0.s - z2.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3w { z0.s - z2.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3w { z21.s - z23.s }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3w { z23.s - z25.s }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - 1.00 1.00 1.00 - - - - - - - - - - 3.00 3.00 3.00 3.00 ld3w { z5.s - z7.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4b { z0.b - z3.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4b { z0.b - z3.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4b { z21.b - z24.b }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4b { z23.b - z26.b }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4b { z5.b - z8.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4d { z0.d - z3.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4d { z0.d - z3.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4d { z21.d - z24.d }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4d { z23.d - z26.d }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 2.00 2.00 2.00 2.00 ld4d { z5.d - z8.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4h { z0.h - z3.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4h { z0.h - z3.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4h { z21.h - z24.h }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4h { z23.h - z26.h }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4h { z5.h - z8.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4w { z0.s - z3.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4w { z0.s - z3.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4w { z21.s - z24.s }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4w { z23.s - z26.s }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - 4.00 4.00 4.00 4.00 ld4w { z5.s - z8.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z31.b }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1b { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1d { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1h { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sb { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sh { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sh { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1sw { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1w { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - - - 1.33 1.33 1.33 - - - - - - - - - - - - - - ldff1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldff1w { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - - - 2.67 2.67 2.67 - - - - - - - - - - - - - - ldff1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1b { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1d { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1h { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sb { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sh { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sw { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sw { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1sw { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z0.d }, p0/z, [z1.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z0.s }, p0/z, [z1.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z31.d }, p7/z, [z31.d, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z31.d }, p7/z, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z31.s }, p7/z, [z31.s, x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldnt1w { z31.s }, p7/z, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ldr p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ldr p5, [x10, #255, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - 0.50 0.50 0.50 0.50 ldr p7, [x13, #-256, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr z0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr z23, [x13, #255, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - ldr z31, [sp, #-256, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.b, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.d, z31.d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.h, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsl z31.s, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lslr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lslr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lslr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lslr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsr z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 lsrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mad z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 match p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 match p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 match p15.b, p7/z, z30.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 match p15.h, p7/z, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mla z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mls z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p0.b, p0/m, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p15.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, b0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, p0/m, b0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, p0/m, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, p0/z, #127
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.b, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, #0xe0000000000003ff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, #0xffffffffffff7fff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, #32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, d0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, p0/m, d0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, p0/m, x0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, #-256
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, #32767
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, h0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, p0/m, h0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, p0/m, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, p0/z, #32512
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.h, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.q, q0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, #0xffff7fff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, #32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, p0/m, s0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, p0/m, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, s0
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z0.s, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p0/z, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p0/z, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p0/z, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p0/z, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p15/m, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.d, p15/m, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p0/z, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p0/z, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p0/z, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p0/z, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p15/m, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.h, p15/m, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p0/z, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p0/z, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p0/z, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p0/z, #32512
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p15/m, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z21.s, p15/m, #-32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.b, p15/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.b, p7/m, b31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movprfx z31, z6
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.b, p7/m, wsp
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.b, wsp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.b, z31.b[63]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, p15/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, p7/m, d31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movprfx z31.d, p7/z, z6.d
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, p7/m, sp
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, sp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.d, z31.d[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.h, p15/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.h, p7/m, h31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.h, p7/m, wsp
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.h, wsp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.h, z31.h[31]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.s, p15/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.s, p7/m, s31
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.s, p7/m, wsp
+# CHECK-NEXT: - - - - - - 0.25 0.25 0.25 0.25 - - - - - - 0.50 0.50 0.50 0.50 mov z31.s, wsp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z31.s, z31.s[15]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, #-1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, p0/z, #-1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, p0/z, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, p0/z, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.b, p15/m, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.d, #-6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.h, #-6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.q, z17.q[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mov z5.s, #-6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movs p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movs p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movs p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 movs p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - mrs x3, ID_AA64ZFR0_EL1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - mrs x3, ZCR_EL1
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - mrs x3, ZCR_EL12
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - mrs x3, ZCR_EL2
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - mrs x3, ZCR_EL3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 msb z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 msb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 msb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 msb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - msr ZCR_EL1, x3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - msr ZCR_EL12, x3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - msr ZCR_EL2, x3
+# CHECK-NEXT: - - - - - - - 0.50 - 0.50 - - - - - - - - - - msr ZCR_EL3, x3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.b, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mul z0.d, z1.d, z15.d[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.h, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z29.s, z30.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.b, z31.b, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.b, z31.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mul z31.d, z31.d, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mul z31.d, z31.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 mul z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.h, z31.h, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.h, z31.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.s, z31.s, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 mul z31.s, z31.s, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nand p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nand p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nands p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nands p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nbsl z0.d, z0.d, z1.d, z2.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z0.b, p0/m, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 neg z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nmatch p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nmatch p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nmatch p15.b, p7/z, z30.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nmatch p15.h, p7/z, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nor p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nor p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nors p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nors p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 not z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nots p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 nots p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orn p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orns p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z0.d, z0.d, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z0.s, z0.s, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z23.h, z23.h, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z23.h, z23.h, #0xfff9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orr z5.b, z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 orrs p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 orv b0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 orv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 orv h0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 orv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pfalse p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pfirst p0.b, p15, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pfirst p15.b, p15, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmul z0.b, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmul z29.b, z30.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullb z29.q, z30.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullt z29.q, z30.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pmullt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pnext p0.b, p15, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pnext p0.d, p15, p0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pnext p0.h, p15, p0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pnext p0.s, p15, p0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 pnext p15.b, p15, p15.b
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #14, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #15, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #6, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #7, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #7, p3, [z13.s, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb #7, p3, [z13.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1keep, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1keep, p0, [x0, z0.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1keep, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl1strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl2keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl2strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3strm, p5, [x10, z21.d, sxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3strm, p5, [x10, z21.s, uxtw]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3strm, p5, [z10.d, #31]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pldl3strm, p5, [z10.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl1keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl1strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl2keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl2strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl3keep, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfb pstl3strm, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #14, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #15, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #15, p7, [z31.d, #248]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #15, p7, [z31.d]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #15, p7, [z31.s, #248]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #15, p7, [z31.s]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #6, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd #7, p0, [x0]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rbit z0.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rbit z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffr p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffr p0.b, p0/z
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffr p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffr p15.b, p15/z
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffrs p0.b, p0/z
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rdffrs p15.b, p15/z
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - rdvl x0, #0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - rdvl x21, #-32
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - rdvl x23, #31
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - rdvl xzr, #-1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev p0.b, p1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev p0.d, p1.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev p0.h, p1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev p0.s, p1.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev z0.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rev z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revb z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revb z0.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revb z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revh z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revh z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 revw z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rshrnt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 rsubhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saba z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saba z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saba z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saba z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalb z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalb z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalb z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalt z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalt z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabalt z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sabdlt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sadalp z0.h, p0/m, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sadalp z29.s, p0/m, z30.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sadalp z30.d, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlbt z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlbt z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlbt z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddlt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.50 2.50 2.50 2.50 saddv d0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 2.00 2.00 2.00 saddv d0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.50 1.50 1.50 1.50 saddv d0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwb z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwb z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwb z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwt z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwt z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 saddwt z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sbclb z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sbclb z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sbclt z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sbclt z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 scvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sdot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sdot z0.d, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sdot z0.s, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sdot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sel p0.b, p1, p2.b, p3.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sel z23.b, p11, z13.b, z8.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sel z23.d, p11, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sel z23.h, p11, z13.h, z8.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sel z23.s, p11, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - setffr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shrnt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 shsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z31.b, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z31.d, z31.d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z31.h, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sli z31.s, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sm4e z0.s, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sm4ekey z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z0.b, z0.b, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z0.d, z0.d, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z0.h, z0.h, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z0.s, z0.s, #-128
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.b, z31.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.d, z31.d, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.h, z31.h, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smax z31.s, z31.s, #127
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smlalt z0.d, z1.s, z31.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smlslb z0.d, z1.s, z31.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smlslt z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smlslt z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smlslt z0.s, z1.h, z31.h
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smmla z0.s, z1.b, z2.b
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smulh z0.h, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smulh z29.s, z30.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 smulh z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullb z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullb z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullt z0.d, z1.s, z15.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullt z0.s, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 smullt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z29.b, p7, { z30.b, z31.b }
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z29.d, p7, { z30.d, z31.d }
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z29.h, p7, { z30.h, z31.h }
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z29.s, p7, { z30.s, z31.s }
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z31.b, p7, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z31.d, p7, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z31.h, p7, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 splice z31.s, p7, z31.s, z31.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqabs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqabs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqabs z31.s, p7/m, z31.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqadd z0.d, z0.d, #0
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqadd z0.h, p0/m, z0.h, z1.h
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqadd z0.h, z0.h, #0, lsl #8
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqadd z31.d, p7/m, z31.d, z30.d
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqadd z31.s, z31.s, #65280
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqcadd z31.s, z31.s, z31.s, #270
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecb x0, w0, all, mul #16
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, all, mul #16
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, vl1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, w0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, w0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, w0, pow2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdecd x0, w0, pow2, mul #16
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqdecd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqdecd z0.d, pow2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqdecd z0.d, pow2, mul #16
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+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, #14
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, pow2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, vl1
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, w0
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, w0, all, mul #16
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, w0, pow2
+# CHECK-NEXT: - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - - - - - - sqdech x0, w0, pow2, mul #16
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqdech z0.h, all, mul #16
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqdech z0.h, pow2, mul #16
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+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp x0, p0.d
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp x0, p0.h
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp x0, p0.s
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp xzr, p15.b, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp xzr, p15.d, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp xzr, p15.h, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - sqdecp xzr, p15.s, wzr
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqdecp z0.d, p0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqdecp z0.h, p0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqdecp z0.s, p0.s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrdmulh z0.h, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrdmulh z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrdmulh z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrdmulh z29.s, z30.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 sqrdmulh z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrnt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqrshrunt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshlu z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrnt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunb z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z0.b, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z0.h, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqshrunt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsub z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnb z0.b, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnb z0.h, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnb z0.s, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnt z0.b, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnt z0.h, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtnt z0.s, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunb z0.b, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunb z0.h, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunb z0.s, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunt z0.b, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunt z0.h, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sqxtunt z0.s, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srhadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srhadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srhadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srhadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sri z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshl z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshl z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshl z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshl z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshlr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshlr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshlr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshlr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srshr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 srsra z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z0.d, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z0.h, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z0.s, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z31.d, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z31.h, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllb z31.s, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z0.d, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z0.h, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z0.s, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z31.d, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z31.h, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sshllt z31.s, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssra z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublbt z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublbt z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublbt z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssublt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubltb z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubltb z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubltb z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwb z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwb z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwb z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwt z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwt z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ssubwt z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.b }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.d }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1b { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1b { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.h }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.s }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z0.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z21.b }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z31.b }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1b { z31.d }, p7, [z31.d, #31]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1b { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1b { z31.s }, p7, [z31.s, #31]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1d { z0.d }, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1d { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1d { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1d { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1d { z0.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1d { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1d { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1d { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1d { z31.d }, p7, [z31.d, #248]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.d }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1h { z0.d }, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1h { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1h { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.s }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z0.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1h { z31.d }, p7, [z31.d, #62]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1h { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1h { z31.s }, p7, [z31.s, #62]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z0.d }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1w { z0.d }, p0, [x0, z0.d, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1w { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z0.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1w { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z0.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - st1w { z31.d }, p7, [z31.d, #124]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - st1w { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - st1w { z31.s }, p7, [z31.s, #124]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2b { z0.b, z1.b }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2b { z0.b, z1.b }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2b { z5.b, z6.b }, p3, [x17, x16]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2d { z0.d, z1.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2h { z0.h, z1.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2w { z0.s, z1.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3b { z0.b - z2.b }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3b { z0.b - z2.b }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3b { z21.b - z23.b }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3b { z23.b - z25.b }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3b { z5.b - z7.b }, p3, [x17, x16]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3d { z0.d - z2.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3d { z0.d - z2.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3d { z21.d - z23.d }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3d { z23.d - z25.d }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3d { z5.d - z7.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3h { z0.h - z2.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3h { z0.h - z2.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3h { z21.h - z23.h }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3h { z23.h - z25.h }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3h { z5.h - z7.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3w { z0.s - z2.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3w { z0.s - z2.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3w { z21.s - z23.s }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3w { z23.s - z25.s }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 3.00 3.00 3.00 3.00 3.00 3.00 3.00 3.00 st3w { z5.s - z7.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4b { z0.b - z3.b }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4b { z0.b - z3.b }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4b { z21.b - z24.b }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4b { z23.b - z26.b }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4b { z5.b - z8.b }, p3, [x17, x16]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4d { z0.d - z3.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4d { z0.d - z3.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4d { z21.d - z24.d }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4d { z23.d - z26.d }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4d { z5.d - z8.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4h { z0.h - z3.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4h { z0.h - z3.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4h { z21.h - z24.h }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4h { z23.h - z26.h }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4h { z5.h - z8.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4w { z0.s - z3.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4w { z0.s - z3.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4w { z21.s - z24.s }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4w { z23.s - z26.s }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 4.00 4.00 4.00 4.00 st4w { z5.s - z8.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1b { z0.b }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1b { z0.d }, p0, [z1.d]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1b { z0.s }, p0, [z1.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1b { z21.b }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1b { z23.b }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1b { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1b { z31.d }, p7, [z31.d]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1b { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1b { z31.s }, p7, [z31.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1d { z0.d }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1d { z0.d }, p0, [z1.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1d { z21.d }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1d { z23.d }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1d { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1d { z31.d }, p7, [z31.d]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1h { z0.d }, p0, [z1.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1h { z0.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1h { z0.s }, p0, [z1.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1h { z21.h }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1h { z23.h }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1h { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1h { z31.d }, p7, [z31.d]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1h { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1h { z31.s }, p7, [z31.s]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1w { z0.d }, p0, [z1.d]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1w { z0.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1w { z0.s }, p0, [z1.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1w { z21.s }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1w { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 2.00 2.00 2.00 2.00 - - - - stnt1w { z31.d }, p7, [z31.d]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1w { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: - - - - - - - - - - - - 4.00 4.00 4.00 4.00 - - - - stnt1w { z31.s }, p7, [z31.s]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 str p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 str p15, [sp, #-256, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 0.50 0.50 0.50 0.50 str p5, [x10, #255, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str z0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str z21, [x10, #-256, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - - - - str z31, [sp, #255, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sub z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 subr z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpkhi z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpkhi z31.h, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpkhi z31.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpklo z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpklo z31.h, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sunpklo z31.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 suqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 suqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 suqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 suqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxth z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxth z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxth z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxth z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 sxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z28.b, { z29.b, z30.b }, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z28.d, { z29.d, z30.d }, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z28.h, { z29.h, z30.h }, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z28.s, { z29.s, z30.s }, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z31.b, { z31.b }, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z31.d, { z31.d }, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z31.h, { z31.h }, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbl z31.s, { z31.s }, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 tbx z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 trn2 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaba z0.b, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaba z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaba z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaba z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalb z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalb z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalb z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalt z0.d, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalt z0.h, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabalt z0.s, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uabdlt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uadalp z0.h, p0/m, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uadalp z29.s, p0/m, z30.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uadalp z30.d, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddlt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.50 2.50 2.50 2.50 uaddv d0, p7, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 uaddv d0, p7, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 2.00 2.00 2.00 uaddv d0, p7, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.50 1.50 1.50 1.50 uaddv d0, p7, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwb z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwb z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwb z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwt z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwt z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uaddwt z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 ucvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 udiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 udiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 udivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 udivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 udot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 udot z0.d, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 udot z0.s, z1.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 udot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsubr z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsubr z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsubr z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uhsubr z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umaxp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umaxp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umaxp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 umaxp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.50 2.50 2.50 2.50 umaxv b0, p7, z31.b
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+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - uqincp wzr, p15.h
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - uqincp wzr, p15.s
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - uqincp x0, p0.b
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - uqincp x0, p0.d
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 0.50 - 0.50 - uqincp x0, p0.h
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnb z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnb z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnb z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnb z31.s, z31.d, #32
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnt z0.s, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnt z31.b, z31.h, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnt z31.h, z31.s, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqshrnt z31.s, z31.d, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z0.s, z0.s, #0, lsl #8
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uqsub z31.s, z31.s, #65280
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ushllb z31.s, z31.h, #15
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ushllt z0.s, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ushllt z31.d, z31.s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ushllt z31.h, z31.b, #7
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 ushllt z31.s, z31.h, #15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usmmla z0.s, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usqadd z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usqadd z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usqadd z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usqadd z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usra z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublb z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublb z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublb z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublt z0.h, z1.b, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublt z29.s, z30.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usublt z31.d, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwb z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwb z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwb z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwt z0.h, z1.h, z2.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwt z29.s, z30.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 usubwt z31.d, z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpkhi z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpkhi z31.h, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpkhi z31.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpklo z31.d, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpklo z31.h, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uunpklo z31.s, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxth z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxth z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxth z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxth z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.b, w0, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.b, wzr, w0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.b, x0, xzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.b, xzr, x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.d, w0, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.d, x0, xzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.h, w0, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.h, x0, xzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.s, w0, wzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.s, x0, xzr
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilerw p15.b, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilerw p15.d, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilerw p15.h, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilerw p15.s, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilewr p15.b, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilewr p15.d, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilewr p15.h, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilewr p15.s, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 9.00 9.00 9.00 9.00 wrffr p0.b
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - 9.00 9.00 9.00 9.00 wrffr p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z0.b, z0.b, z1.b, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z0.d, z0.d, z1.d, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z0.h, z0.h, z1.h, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z0.s, z0.s, z1.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z31.b, z31.b, z30.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z31.d, z31.d, z30.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z31.h, z31.h, z30.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 xar z31.s, z31.s, z30.s, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p0.b, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p0.d, p0.d, p0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p0.h, p0.h, p0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p0.s, p0.s, p0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p0.b, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p0.d, p0.d, p0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p0.h, p0.h, p0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p0.s, p0.s, p0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 zip2 z31.s, z31.s, z31.s
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-while-instructions.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-while-instructions.s
new file mode 100644
index 0000000000000..1e7c86256edd3
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-while-instructions.s
@@ -0,0 +1,53 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 -instruction-tables < %p/../Inputs/sve-while-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 2 0.50 whilege p15.b, xzr, x0
+# CHECK-NEXT: 1 2 0.50 whilegt p15.b, xzr, x0
+# CHECK-NEXT: 1 2 0.50 whilehi p15.b, xzr, x0
+# CHECK-NEXT: 1 2 0.50 whilehs p15.b, xzr, x0
+# CHECK-NEXT: 1 2 0.50 whilerw p15.b, x30, x30
+# CHECK-NEXT: 1 2 0.50 whilewr p15.b, x30, x30
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - HIP12UnitB
+# CHECK-NEXT: [0.1] - HIP12UnitB
+# CHECK-NEXT: [1] - HIP12UnitDummy
+# CHECK-NEXT: [2.0] - HIP12UnitLD
+# CHECK-NEXT: [2.1] - HIP12UnitLD
+# CHECK-NEXT: [2.2] - HIP12UnitLD
+# CHECK-NEXT: [3] - HIP12UnitS0
+# CHECK-NEXT: [4] - HIP12UnitS1
+# CHECK-NEXT: [5] - HIP12UnitS3
+# CHECK-NEXT: [6] - HIP12UnitS4
+# CHECK-NEXT: [7] - HIP12UnitSM2
+# CHECK-NEXT: [8] - HIP12UnitSM5
+# CHECK-NEXT: [9.0] - HIP12UnitST
+# CHECK-NEXT: [9.1] - HIP12UnitST
+# CHECK-NEXT: [10.0] - HIP12UnitSTD
+# CHECK-NEXT: [10.1] - HIP12UnitSTD
+# CHECK-NEXT: [11] - HIP12UnitV0
+# CHECK-NEXT: [12] - HIP12UnitV1
+# CHECK-NEXT: [13] - HIP12UnitV2
+# CHECK-NEXT: [14] - HIP12UnitV3
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14]
+# CHECK-NEXT: - - - - - - - - - - 3.00 3.00 - - - - - - - -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9.0] [9.1] [10.0] [10.1] [11] [12] [13] [14] Instructions:
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilege p15.b, xzr, x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilegt p15.b, xzr, x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilehi p15.b, xzr, x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilehs p15.b, xzr, x0
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilerw p15.b, x30, x30
+# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - - - - - - - whilewr p15.b, x30, x30
diff --git a/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-writeback.s b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-writeback.s
new file mode 100644
index 0000000000000..a1bfd5d625986
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-writeback.s
@@ -0,0 +1,5269 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=hip12 --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=1 < %s | FileCheck %s
+
+# LLVM-MCA-BEGIN G01
+ld1 { v1.1d }, [x27], #8
+add x0, x27, 1
+ld1 { v1.2d }, [x27], #16
+add x0, x27, 1
+ld1 { v1.2s }, [x27], #8
+add x0, x27, 1
+ld1 { v1.4h }, [x27], #8
+add x0, x27, 1
+ld1 { v1.4s }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G02
+ld1 { v1.8b }, [x27], #8
+add x0, x27, 1
+ld1 { v1.8h }, [x27], #16
+add x0, x27, 1
+ld1 { v1.16b }, [x27], #16
+add x0, x27, 1
+ld1 { v1.1d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G03
+ld1 { v1.2s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G04
+ld1 { v1.16b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.1d, v2.1d }, [x27], #16
+add x0, x27, 1
+ld1 { v1.2d, v2.2d }, [x27], #32
+add x0, x27, 1
+ld1 { v1.2s, v2.2s }, [x27], #16
+add x0, x27, 1
+ld1 { v1.4h, v2.4h }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G05
+ld1 { v1.4s, v2.4s }, [x27], #32
+add x0, x27, 1
+ld1 { v1.8b, v2.8b }, [x27], #16
+add x0, x27, 1
+ld1 { v1.8h, v2.8h }, [x27], #32
+add x0, x27, 1
+ld1 { v1.16b, v2.16b }, [x27], #32
+add x0, x27, 1
+ld1 { v1.1d, v2.1d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G06
+ld1 { v1.2d, v2.2d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2s, v2.2s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4h, v2.4h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4s, v2.4s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8b, v2.8b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G07
+ld1 { v1.8h, v2.8h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.16b, v2.16b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+add x0, x27, 1
+ld1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+add x0, x27, 1
+ld1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G08
+ld1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+add x0, x27, 1
+ld1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+add x0, x27, 1
+ld1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+add x0, x27, 1
+ld1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+add x0, x27, 1
+ld1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G09
+ld1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G10
+ld1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+add x0, x27, 1
+ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G11
+ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+add x0, x27, 1
+ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+add x0, x27, 1
+ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+add x0, x27, 1
+ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+add x0, x27, 1
+ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G12
+ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+add x0, x27, 1
+ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+add x0, x27, 1
+ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G13
+ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+add x0, x27, 1
+ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+add x0, x27, 1
+ld1 { v1.b }[0], [x27], #1
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G14
+ld1 { v1.b }[8], [x27], #1
+add x0, x27, 1
+ld1 { v1.b }[0], [x27], x28
+add x0, x27, 1
+ld1 { v1.b }[8], [x27], x28
+add x0, x27, 1
+ld1 { v1.h }[0], [x27], #2
+add x0, x27, 1
+ld1 { v1.h }[4], [x27], #2
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G15
+ld1 { v1.h }[0], [x27], x28
+add x0, x27, 1
+ld1 { v1.h }[4], [x27], x28
+add x0, x27, 1
+ld1 { v1.s }[0], [x27], #4
+add x0, x27, 1
+ld1 { v1.s }[0], [x27], x28
+add x0, x27, 1
+ld1 { v1.d }[0], [x27], #8
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G16
+ld1 { v1.d }[0], [x27], x28
+add x0, x27, 1
+ld1r { v1.1d }, [x27], #8
+add x0, x27, 1
+ld1r { v1.2d }, [x27], #8
+add x0, x27, 1
+ld1r { v1.2s }, [x27], #4
+add x0, x27, 1
+ld1r { v1.4h }, [x27], #2
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G17
+ld1r { v1.4s }, [x27], #4
+add x0, x27, 1
+ld1r { v1.8b }, [x27], #1
+add x0, x27, 1
+ld1r { v1.8h }, [x27], #2
+add x0, x27, 1
+ld1r { v1.16b }, [x27], #1
+add x0, x27, 1
+ld1r { v1.1d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G18
+ld1r { v1.2d }, [x27], x28
+add x0, x27, 1
+ld1r { v1.2s }, [x27], x28
+add x0, x27, 1
+ld1r { v1.4h }, [x27], x28
+add x0, x27, 1
+ld1r { v1.4s }, [x27], x28
+add x0, x27, 1
+ld1r { v1.8b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G19
+ld1r { v1.8h }, [x27], x28
+add x0, x27, 1
+ld1r { v1.16b }, [x27], x28
+add x0, x27, 1
+ld2 { v1.2d, v2.2d }, [x27], #32
+add x0, x27, 1
+ld2 { v1.2s, v2.2s }, [x27], #16
+add x0, x27, 1
+ld2 { v1.4h, v2.4h }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G20
+ld2 { v1.4s, v2.4s }, [x27], #32
+add x0, x27, 1
+ld2 { v1.8b, v2.8b }, [x27], #16
+add x0, x27, 1
+ld2 { v1.8h, v2.8h }, [x27], #32
+add x0, x27, 1
+ld2 { v1.16b, v2.16b }, [x27], #32
+add x0, x27, 1
+ld2 { v1.2d, v2.2d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G21
+ld2 { v1.2s, v2.2s }, [x27], x28
+add x0, x27, 1
+ld2 { v1.4h, v2.4h }, [x27], x28
+add x0, x27, 1
+ld2 { v1.4s, v2.4s }, [x27], x28
+add x0, x27, 1
+ld2 { v1.8b, v2.8b }, [x27], x28
+add x0, x27, 1
+ld2 { v1.8h, v2.8h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G22
+ld2 { v1.16b, v2.16b }, [x27], x28
+add x0, x27, 1
+ld2 { v1.b, v2.b }[0], [x27], #2
+add x0, x27, 1
+ld2 { v1.b, v2.b }[8], [x27], #2
+add x0, x27, 1
+ld2 { v1.b, v2.b }[0], [x27], x28
+add x0, x27, 1
+ld2 { v1.b, v2.b }[8], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G23
+ld2 { v1.h, v2.h }[0], [x27], #4
+add x0, x27, 1
+ld2 { v1.h, v2.h }[4], [x27], #4
+add x0, x27, 1
+ld2 { v1.h, v2.h }[0], [x27], x28
+add x0, x27, 1
+ld2 { v1.h, v2.h }[4], [x27], x28
+add x0, x27, 1
+ld2 { v1.s, v2.s }[0], [x27], #8
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G24
+ld2 { v1.s, v2.s }[0], [x27], x28
+add x0, x27, 1
+ld2 { v1.d, v2.d }[0], [x27], #16
+add x0, x27, 1
+ld2 { v1.d, v2.d }[0], [x27], x28
+add x0, x27, 1
+ld2r { v1.1d, v2.1d }, [x27], #16
+add x0, x27, 1
+ld2r { v1.2d, v2.2d }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G25
+ld2r { v1.2s, v2.2s }, [x27], #8
+add x0, x27, 1
+ld2r { v1.4h, v2.4h }, [x27], #4
+add x0, x27, 1
+ld2r { v1.4s, v2.4s }, [x27], #8
+add x0, x27, 1
+ld2r { v1.8b, v2.8b }, [x27], #2
+add x0, x27, 1
+ld2r { v1.8h, v2.8h }, [x27], #4
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G26
+ld2r { v1.16b, v2.16b }, [x27], #2
+add x0, x27, 1
+ld2r { v1.1d, v2.1d }, [x27], x28
+add x0, x27, 1
+ld2r { v1.2d, v2.2d }, [x27], x28
+add x0, x27, 1
+ld2r { v1.2s, v2.2s }, [x27], x28
+add x0, x27, 1
+ld2r { v1.4h, v2.4h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G27
+ld2r { v1.4s, v2.4s }, [x27], x28
+add x0, x27, 1
+ld2r { v1.8b, v2.8b }, [x27], x28
+add x0, x27, 1
+ld2r { v1.8h, v2.8h }, [x27], x28
+add x0, x27, 1
+ld2r { v1.16b, v2.16b }, [x27], x28
+add x0, x27, 1
+ld3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G28
+ld3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+add x0, x27, 1
+ld3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+add x0, x27, 1
+ld3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+add x0, x27, 1
+ld3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+add x0, x27, 1
+ld3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G29
+ld3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+add x0, x27, 1
+ld3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+add x0, x27, 1
+ld3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+add x0, x27, 1
+ld3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+add x0, x27, 1
+ld3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G30
+ld3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+add x0, x27, 1
+ld3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+add x0, x27, 1
+ld3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+add x0, x27, 1
+ld3 { v1.b, v2.b, v3.b }[0], [x27], #3
+add x0, x27, 1
+ld3 { v1.b, v2.b, v3.b }[8], [x27], #3
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G31
+ld3 { v1.b, v2.b, v3.b }[0], [x27], x28
+add x0, x27, 1
+ld3 { v1.b, v2.b, v3.b }[8], [x27], x28
+add x0, x27, 1
+ld3 { v1.h, v2.h, v3.h }[0], [x27], #6
+add x0, x27, 1
+ld3 { v1.h, v2.h, v3.h }[4], [x27], #6
+add x0, x27, 1
+ld3 { v1.h, v2.h, v3.h }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G32
+ld3 { v1.h, v2.h, v3.h }[4], [x27], x28
+add x0, x27, 1
+ld3 { v1.s, v2.s, v3.s }[0], [x27], #12
+add x0, x27, 1
+ld3 { v1.s, v2.s, v3.s }[0], [x27], x28
+add x0, x27, 1
+ld3 { v1.d, v2.d, v3.d }[0], [x27], #24
+add x0, x27, 1
+ld3 { v1.d, v2.d, v3.d }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G33
+ld3r { v1.1d, v2.1d, v3.1d }, [x27], #24
+add x0, x27, 1
+ld3r { v1.2d, v2.2d, v3.2d }, [x27], #24
+add x0, x27, 1
+ld3r { v1.2s, v2.2s, v3.2s }, [x27], #12
+add x0, x27, 1
+ld3r { v1.4h, v2.4h, v3.4h }, [x27], #6
+add x0, x27, 1
+ld3r { v1.4s, v2.4s, v3.4s }, [x27], #12
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G34
+ld3r { v1.8b, v2.8b, v3.8b }, [x27], #3
+add x0, x27, 1
+ld3r { v1.8h, v2.8h, v3.8h }, [x27], #6
+add x0, x27, 1
+ld3r { v1.16b, v2.16b, v3.16b }, [x27], #3
+add x0, x27, 1
+ld3r { v1.1d, v2.1d, v3.1d }, [x27], x28
+add x0, x27, 1
+ld3r { v1.2d, v2.2d, v3.2d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G35
+ld3r { v1.2s, v2.2s, v3.2s }, [x27], x28
+add x0, x27, 1
+ld3r { v1.4h, v2.4h, v3.4h }, [x27], x28
+add x0, x27, 1
+ld3r { v1.4s, v2.4s, v3.4s }, [x27], x28
+add x0, x27, 1
+ld3r { v1.8b, v2.8b, v3.8b }, [x27], x28
+add x0, x27, 1
+ld3r { v1.8h, v2.8h, v3.8h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G36
+ld3r { v1.16b, v2.16b, v3.16b }, [x27], x28
+add x0, x27, 1
+ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+add x0, x27, 1
+ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+add x0, x27, 1
+ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+add x0, x27, 1
+ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G37
+ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+add x0, x27, 1
+ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+add x0, x27, 1
+ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+add x0, x27, 1
+ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+add x0, x27, 1
+ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G38
+ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+add x0, x27, 1
+ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+add x0, x27, 1
+ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+add x0, x27, 1
+ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+add x0, x27, 1
+ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G39
+ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+add x0, x27, 1
+ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+add x0, x27, 1
+ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+add x0, x27, 1
+ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+add x0, x27, 1
+ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G40
+ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+add x0, x27, 1
+ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+add x0, x27, 1
+ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+add x0, x27, 1
+ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+add x0, x27, 1
+ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G41
+ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+add x0, x27, 1
+ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+add x0, x27, 1
+ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+add x0, x27, 1
+ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #32
+add x0, x27, 1
+ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G42
+ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #8
+add x0, x27, 1
+ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #16
+add x0, x27, 1
+ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #4
+add x0, x27, 1
+ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #8
+add x0, x27, 1
+ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #4
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G43
+ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+add x0, x27, 1
+ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+add x0, x27, 1
+ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+add x0, x27, 1
+ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+add x0, x27, 1
+ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G44
+ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+add x0, x27, 1
+ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+add x0, x27, 1
+ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+add x0, x27, 1
+ldp s1, s2, [x27], #248
+add x0, x27, 1
+ldp d1, d2, [x27], #496
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G45
+ldp q1, q2, [x27], #992
+add x0, x27, 1
+ldp s1, s2, [x27, #248]!
+add x0, x27, 1
+ldp d1, d2, [x27, #496]!
+add x0, x27, 1
+ldp q1, q2, [x27, #992]!
+add x0, x27, 1
+ldp w1, w2, [x27], #248
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G46
+ldp x1, x2, [x27], #496
+add x0, x27, 1
+ldp w1, w2, [x27, #248]!
+add x0, x27, 1
+ldp x1, x2, [x27, #496]!
+add x0, x27, 1
+ldpsw x1, x2, [x27], #248
+add x0, x27, 1
+ldpsw x1, x2, [x27, #248]!
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G47
+ldr b1, [x27], #254
+add x0, x27, 1
+ldr h1, [x27], #254
+add x0, x27, 1
+ldr s1, [x27], #254
+add x0, x27, 1
+ldr d1, [x27], #254
+add x0, x27, 1
+ldr q1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G48
+ldr b1, [x27, #254]!
+add x0, x27, 1
+ldr h1, [x27, #254]!
+add x0, x27, 1
+ldr s1, [x27, #254]!
+add x0, x27, 1
+ldr d1, [x27, #254]!
+add x0, x27, 1
+ldr q1, [x27, #254]!
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G49
+ldr w1, [x27], #254
+add x0, x27, 1
+ldr x1, [x27], #254
+add x0, x27, 1
+ldr w1, [x27, #254]!
+add x0, x27, 1
+ldr x1, [x27, #254]!
+add x0, x27, 1
+ldrb w1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G50
+ldrb w1, [x27, #254]!
+add x0, x27, 1
+ldrh w1, [x27], #254
+add x0, x27, 1
+ldrh w1, [x27, #254]!
+add x0, x27, 1
+ldrsb w1, [x27], #254
+add x0, x27, 1
+ldrsb x1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G51
+ldrsb w1, [x27, #254]!
+add x0, x27, 1
+ldrsb x1, [x27, #254]!
+add x0, x27, 1
+ldrsh w1, [x27], #254
+add x0, x27, 1
+ldrsh x1, [x27], #254
+add x0, x27, 1
+ldrsh w1, [x27, #254]!
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G52
+ldrsh x1, [x27, #254]!
+add x0, x27, 1
+ldrsw x1, [x27], #254
+add x0, x27, 1
+ldrsw x1, [x27, #254]!
+add x0, x27, 1
+st1 { v1.1d }, [x27], #8
+add x0, x27, 1
+st1 { v1.2d }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G53
+st1 { v1.2s }, [x27], #8
+add x0, x27, 1
+st1 { v1.4h }, [x27], #8
+add x0, x27, 1
+st1 { v1.4s }, [x27], #16
+add x0, x27, 1
+st1 { v1.8b }, [x27], #8
+add x0, x27, 1
+st1 { v1.8h }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G54
+st1 { v1.16b }, [x27], #16
+add x0, x27, 1
+st1 { v1.1d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2s }, [x27], x28
+add x0, x27, 1
+st1 { v1.4h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G55
+st1 { v1.4s }, [x27], x28
+add x0, x27, 1
+st1 { v1.8b }, [x27], x28
+add x0, x27, 1
+st1 { v1.8h }, [x27], x28
+add x0, x27, 1
+st1 { v1.16b }, [x27], x28
+add x0, x27, 1
+st1 { v1.1d, v2.1d }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G56
+st1 { v1.2d, v2.2d }, [x27], #32
+add x0, x27, 1
+st1 { v1.2s, v2.2s }, [x27], #16
+add x0, x27, 1
+st1 { v1.4h, v2.4h }, [x27], #16
+add x0, x27, 1
+st1 { v1.4s, v2.4s }, [x27], #32
+add x0, x27, 1
+st1 { v1.8b, v2.8b }, [x27], #16
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G57
+st1 { v1.8h, v2.8h }, [x27], #32
+add x0, x27, 1
+st1 { v1.16b, v2.16b }, [x27], #32
+add x0, x27, 1
+st1 { v1.1d, v2.1d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2d, v2.2d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2s, v2.2s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G58
+st1 { v1.4h, v2.4h }, [x27], x28
+add x0, x27, 1
+st1 { v1.4s, v2.4s }, [x27], x28
+add x0, x27, 1
+st1 { v1.8b, v2.8b }, [x27], x28
+add x0, x27, 1
+st1 { v1.8h, v2.8h }, [x27], x28
+add x0, x27, 1
+st1 { v1.16b, v2.16b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G59
+st1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+add x0, x27, 1
+st1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+add x0, x27, 1
+st1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+add x0, x27, 1
+st1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+add x0, x27, 1
+st1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G60
+st1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+add x0, x27, 1
+st1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+add x0, x27, 1
+st1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+add x0, x27, 1
+st1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G61
+st1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+add x0, x27, 1
+st1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+add x0, x27, 1
+st1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+add x0, x27, 1
+st1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+add x0, x27, 1
+st1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G62
+st1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+add x0, x27, 1
+st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+add x0, x27, 1
+st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+add x0, x27, 1
+st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+add x0, x27, 1
+st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G63
+st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+add x0, x27, 1
+st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+add x0, x27, 1
+st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+add x0, x27, 1
+st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+add x0, x27, 1
+st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G64
+st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+add x0, x27, 1
+st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+add x0, x27, 1
+st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+add x0, x27, 1
+st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+add x0, x27, 1
+st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G65
+st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+add x0, x27, 1
+st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+add x0, x27, 1
+st1 { v1.b }[0], [x27], #1
+add x0, x27, 1
+st1 { v1.b }[8], [x27], #1
+add x0, x27, 1
+st1 { v1.b }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G66
+st1 { v1.b }[8], [x27], x28
+add x0, x27, 1
+st1 { v1.h }[0], [x27], #2
+add x0, x27, 1
+st1 { v1.h }[4], [x27], #2
+add x0, x27, 1
+st1 { v1.h }[0], [x27], x28
+add x0, x27, 1
+st1 { v1.h }[4], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G67
+st1 { v1.s }[0], [x27], #4
+add x0, x27, 1
+st1 { v1.s }[0], [x27], x28
+add x0, x27, 1
+st1 { v1.d }[0], [x27], #8
+add x0, x27, 1
+st1 { v1.d }[0], [x27], x28
+add x0, x27, 1
+st2 { v1.2d, v2.2d }, [x27], #32
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G68
+st2 { v1.2s, v2.2s }, [x27], #16
+add x0, x27, 1
+st2 { v1.4h, v2.4h }, [x27], #16
+add x0, x27, 1
+st2 { v1.4s, v2.4s }, [x27], #32
+add x0, x27, 1
+st2 { v1.8b, v2.8b }, [x27], #16
+add x0, x27, 1
+st2 { v1.8h, v2.8h }, [x27], #32
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G69
+st2 { v1.16b, v2.16b }, [x27], #32
+add x0, x27, 1
+st2 { v1.2d, v2.2d }, [x27], x28
+add x0, x27, 1
+st2 { v1.2s, v2.2s }, [x27], x28
+add x0, x27, 1
+st2 { v1.4h, v2.4h }, [x27], x28
+add x0, x27, 1
+st2 { v1.4s, v2.4s }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G70
+st2 { v1.8b, v2.8b }, [x27], x28
+add x0, x27, 1
+st2 { v1.8h, v2.8h }, [x27], x28
+add x0, x27, 1
+st2 { v1.16b, v2.16b }, [x27], x28
+add x0, x27, 1
+st2 { v1.b, v2.b }[0], [x27], #2
+add x0, x27, 1
+st2 { v1.b, v2.b }[8], [x27], #2
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G71
+st2 { v1.b, v2.b }[0], [x27], x28
+add x0, x27, 1
+st2 { v1.b, v2.b }[8], [x27], x28
+add x0, x27, 1
+st2 { v1.h, v2.h }[0], [x27], #4
+add x0, x27, 1
+st2 { v1.h, v2.h }[4], [x27], #4
+add x0, x27, 1
+st2 { v1.h, v2.h }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G72
+st2 { v1.h, v2.h }[4], [x27], x28
+add x0, x27, 1
+st2 { v1.s, v2.s }[0], [x27], #8
+add x0, x27, 1
+st2 { v1.s, v2.s }[0], [x27], x28
+add x0, x27, 1
+st2 { v1.d, v2.d }[0], [x27], #16
+add x0, x27, 1
+st2 { v1.d, v2.d }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G73
+st3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+add x0, x27, 1
+st3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+add x0, x27, 1
+st3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G74
+st3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+add x0, x27, 1
+st3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+add x0, x27, 1
+st3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+add x0, x27, 1
+st3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+add x0, x27, 1
+st3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G75
+st3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+add x0, x27, 1
+st3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+add x0, x27, 1
+st3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+add x0, x27, 1
+st3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+add x0, x27, 1
+st3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G76
+st3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+add x0, x27, 1
+st3 { v1.b, v2.b, v3.b }[0], [x27], #3
+add x0, x27, 1
+st3 { v1.b, v2.b, v3.b }[8], [x27], #3
+add x0, x27, 1
+st3 { v1.b, v2.b, v3.b }[0], [x27], x28
+add x0, x27, 1
+st3 { v1.b, v2.b, v3.b }[8], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G77
+st3 { v1.h, v2.h, v3.h }[0], [x27], #6
+add x0, x27, 1
+st3 { v1.h, v2.h, v3.h }[4], [x27], #6
+add x0, x27, 1
+st3 { v1.h, v2.h, v3.h }[0], [x27], x28
+add x0, x27, 1
+st3 { v1.h, v2.h, v3.h }[4], [x27], x28
+add x0, x27, 1
+st3 { v1.s, v2.s, v3.s }[0], [x27], #12
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G78
+st3 { v1.s, v2.s, v3.s }[0], [x27], x28
+add x0, x27, 1
+st3 { v1.d, v2.d, v3.d }[0], [x27], #24
+add x0, x27, 1
+st3 { v1.d, v2.d, v3.d }[0], [x27], x28
+add x0, x27, 1
+st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+add x0, x27, 1
+st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G79
+st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+add x0, x27, 1
+st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+add x0, x27, 1
+st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+add x0, x27, 1
+st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+add x0, x27, 1
+st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G80
+st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+add x0, x27, 1
+st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+add x0, x27, 1
+st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+add x0, x27, 1
+st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+add x0, x27, 1
+st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G81
+st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+add x0, x27, 1
+st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+add x0, x27, 1
+st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+add x0, x27, 1
+st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+add x0, x27, 1
+st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G82
+st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+add x0, x27, 1
+st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+add x0, x27, 1
+st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+add x0, x27, 1
+st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+add x0, x27, 1
+st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G83
+st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+add x0, x27, 1
+st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+add x0, x27, 1
+st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+add x0, x27, 1
+st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G84
+stp s1, s2, [x27], #248
+add x0, x27, 1
+stp d1, d2, [x27], #496
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G85
+stp q1, q2, [x27], #992
+add x0, x27, 1
+stp s1, s2, [x27, #248]!
+add x0, x27, 1
+stp d1, d2, [x27, #496]!
+add x0, x27, 1
+stp q1, q2, [x27, #992]!
+add x0, x27, 1
+stp w1, w2, [x27], #248
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G86
+stp x1, x2, [x27], #496
+add x0, x27, 1
+stp w1, w2, [x27, #248]!
+add x0, x27, 1
+stp x1, x2, [x27, #496]!
+add x0, x27, 1
+str b1, [x27], #254
+add x0, x27, 1
+str h1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G87
+str s1, [x27], #254
+add x0, x27, 1
+str d1, [x27], #254
+add x0, x27, 1
+str q1, [x27], #254
+add x0, x27, 1
+str b1, [x27, #254]!
+add x0, x27, 1
+str h1, [x27, #254]!
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G88
+str s1, [x27, #254]!
+add x0, x27, 1
+str d1, [x27, #254]!
+add x0, x27, 1
+str q1, [x27, #254]!
+add x0, x27, 1
+str w1, [x27], #254
+add x0, x27, 1
+str x1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G89
+str w1, [x27, #254]!
+add x0, x27, 1
+str x1, [x27, #254]!
+add x0, x27, 1
+strb w1, [x27], #254
+add x0, x27, 1
+strb w1, [x27, #254]!
+add x0, x27, 1
+strh w1, [x27], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G90
+strh w1, [x27, #254]!
+add x0, x27, 1
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN G91
+ldr x1, [x27], #254
+add x0, x27, 1
+ldr x2, [x1], #254
+add x0, x27, 1
+# LLVM-MCA-END
+
+# CHECK: [0] Code Region - G01
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.1d }, [x27], #8
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.2d }, [x27], #16
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.2s }, [x27], #8
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.4h }, [x27], #8
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.4s }, [x27], #16
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.1d }, [x27], #8
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.2d }, [x27], #16
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.2s }, [x27], #8
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.4h }, [x27], #8
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.4s }, [x27], #16
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [1] Code Region - G02
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.8b }, [x27], #8
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.8h }, [x27], #16
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.16b }, [x27], #16
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.1d }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.2d }, [x27], x28
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.8b }, [x27], #8
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.8h }, [x27], #16
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.16b }, [x27], #16
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.1d }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.2d }, [x27], x28
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [2] Code Region - G03
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.2s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.4h }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.4s }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.8b }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.8h }, [x27], x28
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.2s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.4h }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.4s }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.8b }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.8h }, [x27], x28
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [3] Code Region - G04
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.16b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.16b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [4] Code Region - G05
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [5] Code Region - G06
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.95
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeeeER . ld1 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ld1 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeeeER ld1 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: [0,9] .D====eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ld1 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld1 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: 9. 1 5.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 2.0 <total>
+
+# CHECK: [6] Code Region - G07
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 1800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.54
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 2.7
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ld1 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ld1 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.3 <total>
+
+# CHECK: [7] Code Region - G08
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.93
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeER. . ld1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: [0,1] D=eE-----R. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . ld1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: [0,3] D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.5 <total>
+
+# CHECK: [8] Code Region - G09
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.93
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeER. . ld1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE-----R. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . ld1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.5 <total>
+
+# CHECK: [9] Code Region - G10
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.93
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeER. . ld1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE-----R. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . ld1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.5 <total>
+
+# CHECK: [10] Code Region - G11
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.93
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeER. . ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: [0,1] D=eE-----R. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: [0,3] D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.5 <total>
+
+# CHECK: [11] Code Region - G12
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 509
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.93
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeER. . ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: [0,1] D=eE-----R. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE-----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER. ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE-----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeER ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: [0,9] . D===eE-----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.5 <total>
+
+# CHECK: [12] Code Region - G13
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1110
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 1.80
+# CHECK-NEXT: IPC: 0.90
+# CHECK-NEXT: Block RThroughput: 3.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0
+
+# CHECK: [0,0] DeeeeeeeER. . . ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE-----R. . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeER . . ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE-----R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeER . . ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE-----R . . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeER . . ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE-----R . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D========eeeeeeeeER ld1 { v1.b }[0], [x27], #1
+# CHECK-NEXT: [0,9] . D=========eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 9.0 0.0 0.0 ld1 { v1.b }[0], [x27], #1
+# CHECK-NEXT: 9. 1 10.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.9 0.1 2.6 <total>
+
+# CHECK: [13] Code Region - G14
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.50
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld1 { v1.b }[8], [x27], #1
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D========eeeeeeeeER . . . . . . ld1 { v1.b }[0], [x27], x28
+# CHECK-NEXT: [0,3] D=========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D===============eeeeeeeeER . . . . ld1 { v1.b }[8], [x27], x28
+# CHECK-NEXT: [0,5] .D================eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D=======================eeeeeeeeER. . . ld1 { v1.h }[0], [x27], #2
+# CHECK-NEXT: [0,7] .D========================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==============================eeeeeeeeER ld1 { v1.h }[4], [x27], #2
+# CHECK-NEXT: [0,9] . D===============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.b }[8], [x27], #1
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 9.0 0.0 0.0 ld1 { v1.b }[0], [x27], x28
+# CHECK-NEXT: 3. 1 10.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 16.0 0.0 0.0 ld1 { v1.b }[8], [x27], x28
+# CHECK-NEXT: 5. 1 17.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 24.0 0.0 0.0 ld1 { v1.h }[0], [x27], #2
+# CHECK-NEXT: 7. 1 25.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 31.0 0.0 0.0 ld1 { v1.h }[4], [x27], #2
+# CHECK-NEXT: 9. 1 32.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 16.7 0.1 3.0 <total>
+
+# CHECK: [14] Code Region - G15
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.50
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld1 { v1.h }[0], [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D========eeeeeeeeER . . . . . . ld1 { v1.h }[4], [x27], x28
+# CHECK-NEXT: [0,3] D=========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D===============eeeeeeeeER . . . . ld1 { v1.s }[0], [x27], #4
+# CHECK-NEXT: [0,5] .D================eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D=======================eeeeeeeeER. . . ld1 { v1.s }[0], [x27], x28
+# CHECK-NEXT: [0,7] .D========================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==============================eeeeeeeeER ld1 { v1.d }[0], [x27], #8
+# CHECK-NEXT: [0,9] . D===============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.h }[0], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 9.0 0.0 0.0 ld1 { v1.h }[4], [x27], x28
+# CHECK-NEXT: 3. 1 10.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 16.0 0.0 0.0 ld1 { v1.s }[0], [x27], #4
+# CHECK-NEXT: 5. 1 17.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 24.0 0.0 0.0 ld1 { v1.s }[0], [x27], x28
+# CHECK-NEXT: 7. 1 25.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 31.0 0.0 0.0 ld1 { v1.d }[0], [x27], #8
+# CHECK-NEXT: 9. 1 32.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 16.7 0.1 3.0 <total>
+
+# CHECK: [15] Code Region - G16
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1203
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 1.66
+# CHECK-NEXT: IPC: 0.83
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld1 { v1.d }[0], [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeeER . ld1r { v1.1d }, [x27], #8
+# CHECK-NEXT: [0,3] D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeeER . ld1r { v1.2d }, [x27], #8
+# CHECK-NEXT: [0,5] .D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeeER. ld1r { v1.2s }, [x27], #4
+# CHECK-NEXT: [0,7] .D===eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeeER ld1r { v1.4h }, [x27], #2
+# CHECK-NEXT: [0,9] . D===eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1 { v1.d }[0], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1r { v1.1d }, [x27], #8
+# CHECK-NEXT: 3. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1r { v1.2d }, [x27], #8
+# CHECK-NEXT: 5. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1r { v1.2s }, [x27], #4
+# CHECK-NEXT: 7. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1r { v1.4h }, [x27], #2
+# CHECK-NEXT: 9. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 3.0 <total>
+
+# CHECK: [16] Code Region - G17
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.92
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld1r { v1.4s }, [x27], #4
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeeER . ld1r { v1.8b }, [x27], #1
+# CHECK-NEXT: [0,3] D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeeER . ld1r { v1.8h }, [x27], #2
+# CHECK-NEXT: [0,5] .D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeeER. ld1r { v1.16b }, [x27], #1
+# CHECK-NEXT: [0,7] .D===eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeeER ld1r { v1.1d }, [x27], x28
+# CHECK-NEXT: [0,9] . D===eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1r { v1.4s }, [x27], #4
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1r { v1.8b }, [x27], #1
+# CHECK-NEXT: 3. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1r { v1.8h }, [x27], #2
+# CHECK-NEXT: 5. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1r { v1.16b }, [x27], #1
+# CHECK-NEXT: 7. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1r { v1.1d }, [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 3.0 <total>
+
+# CHECK: [17] Code Region - G18
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.92
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld1r { v1.2d }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeeER . ld1r { v1.2s }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeeER . ld1r { v1.4h }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeeeER. ld1r { v1.4s }, [x27], x28
+# CHECK-NEXT: [0,7] .D===eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeeeER ld1r { v1.8b }, [x27], x28
+# CHECK-NEXT: [0,9] . D===eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1r { v1.2d }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1r { v1.2s }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld1r { v1.4h }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ld1r { v1.4s }, [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ld1r { v1.8b }, [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 3.0 <total>
+
+# CHECK: [18] Code Region - G19
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.71
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld1r { v1.8h }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeeeER . ld1r { v1.16b }, [x27], x28
+# CHECK-NEXT: [0,3] D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeeeER . ld2 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: [0,5] .D==eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eeeeeeeeER. ld2 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: [0,7] . D==eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eeeeeeeeER ld2 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: [0,9] . D==eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld1r { v1.8h }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ld1r { v1.16b }, [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ld2 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: 5. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 ld2 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: 7. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 ld2 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: 9. 1 3.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.3 0.1 3.0 <total>
+
+# CHECK: [19] Code Region - G20
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2900
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.69
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld2 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld2 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld2 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld2 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld2 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld2 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld2 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld2 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld2 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [20] Code Region - G21
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2700
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.29
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld2 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld2 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld2 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld2 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld2 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld2 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld2 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld2 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld2 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [21] Code Region - G22
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 3310
+# CHECK-NEXT: Total uOps: 2600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.79
+# CHECK-NEXT: IPC: 0.30
+# CHECK-NEXT: Block RThroughput: 3.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld2 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .D=======eeeeeeeeER . . . . . . ld2 { v1.b, v2.b }[0], [x27], #2
+# CHECK-NEXT: [0,3] .D========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D==============eeeeeeeeER . . . . ld2 { v1.b, v2.b }[8], [x27], #2
+# CHECK-NEXT: [0,5] . D===============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=====================eeeeeeeeER. . . ld2 { v1.b, v2.b }[0], [x27], x28
+# CHECK-NEXT: [0,7] . D======================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D============================eeeeeeeeER ld2 { v1.b, v2.b }[8], [x27], x28
+# CHECK-NEXT: [0,9] . D=============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 8.0 0.0 0.0 ld2 { v1.b, v2.b }[0], [x27], #2
+# CHECK-NEXT: 3. 1 9.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 15.0 0.0 0.0 ld2 { v1.b, v2.b }[8], [x27], #2
+# CHECK-NEXT: 5. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 22.0 0.0 0.0 ld2 { v1.b, v2.b }[0], [x27], x28
+# CHECK-NEXT: 7. 1 23.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 29.0 0.0 0.0 ld2 { v1.b, v2.b }[8], [x27], x28
+# CHECK-NEXT: 9. 1 30.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 15.5 0.1 3.0 <total>
+
+# CHECK: [22] Code Region - G23
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 2500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.62
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 3.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld2 { v1.h, v2.h }[0], [x27], #4
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .D=======eeeeeeeeER . . . . . . ld2 { v1.h, v2.h }[4], [x27], #4
+# CHECK-NEXT: [0,3] .D========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D==============eeeeeeeeER . . . . ld2 { v1.h, v2.h }[0], [x27], x28
+# CHECK-NEXT: [0,5] . D===============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=====================eeeeeeeeER. . . ld2 { v1.h, v2.h }[4], [x27], x28
+# CHECK-NEXT: [0,7] . D======================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D============================eeeeeeeeER ld2 { v1.s, v2.s }[0], [x27], #8
+# CHECK-NEXT: [0,9] . D=============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2 { v1.h, v2.h }[0], [x27], #4
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 8.0 0.0 0.0 ld2 { v1.h, v2.h }[4], [x27], #4
+# CHECK-NEXT: 3. 1 9.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 15.0 0.0 0.0 ld2 { v1.h, v2.h }[0], [x27], x28
+# CHECK-NEXT: 5. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 22.0 0.0 0.0 ld2 { v1.h, v2.h }[4], [x27], x28
+# CHECK-NEXT: 7. 1 23.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 29.0 0.0 0.0 ld2 { v1.s, v2.s }[0], [x27], #8
+# CHECK-NEXT: 9. 1 30.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 15.5 0.1 3.0 <total>
+
+# CHECK: [23] Code Region - G24
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 2603
+# CHECK-NEXT: Total uOps: 2500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.96
+# CHECK-NEXT: IPC: 0.38
+# CHECK-NEXT: Block RThroughput: 3.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 012345678
+
+# CHECK: [0,0] DeeeeeeeeER . . . . ld2 { v1.s, v2.s }[0], [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .D=======eeeeeeeeER . . . ld2 { v1.d, v2.d }[0], [x27], #16
+# CHECK-NEXT: [0,3] .D========eE------R . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D==============eeeeeeeeER . ld2 { v1.d, v2.d }[0], [x27], x28
+# CHECK-NEXT: [0,5] . D===============eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D==============eeeeeeeeER. ld2r { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: [0,7] . D===============eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==============eeeeeeeeER ld2r { v1.2d, v2.2d }, [x27], #16
+# CHECK-NEXT: [0,9] . D===============eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2 { v1.s, v2.s }[0], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 8.0 0.0 0.0 ld2 { v1.d, v2.d }[0], [x27], #16
+# CHECK-NEXT: 3. 1 9.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 15.0 0.0 0.0 ld2 { v1.d, v2.d }[0], [x27], x28
+# CHECK-NEXT: 5. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 15.0 0.0 0.0 ld2r { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: 7. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 15.0 0.0 0.0 ld2r { v1.2d, v2.2d }, [x27], #16
+# CHECK-NEXT: 9. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 11.3 0.1 3.0 <total>
+
+# CHECK: [24] Code Region - G25
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.90
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld2r { v1.2s, v2.2s }, [x27], #8
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld2r { v1.4h, v2.4h }, [x27], #4
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld2r { v1.4s, v2.4s }, [x27], #8
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld2r { v1.8b, v2.8b }, [x27], #2
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld2r { v1.8h, v2.8h }, [x27], #4
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2r { v1.2s, v2.2s }, [x27], #8
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld2r { v1.4h, v2.4h }, [x27], #4
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld2r { v1.4s, v2.4s }, [x27], #8
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld2r { v1.8b, v2.8b }, [x27], #2
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld2r { v1.8h, v2.8h }, [x27], #4
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [25] Code Region - G26
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.90
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld2r { v1.16b, v2.16b }, [x27], #2
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld2r { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld2r { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld2r { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld2r { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2r { v1.16b, v2.16b }, [x27], #2
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld2r { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld2r { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld2r { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld2r { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [26] Code Region - G27
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 2800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.49
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 3.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld2r { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld2r { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld2r { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld2r { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld2r { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld2r { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld2r { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld2r { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [27] Code Region - G28
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 711
+# CHECK-NEXT: Total uOps: 4300
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.05
+# CHECK-NEXT: IPC: 1.41
+# CHECK-NEXT: Block RThroughput: 5.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234567
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . . ld3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: [0,1] D=eE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . . ld3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: [0,3] .D=eE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeeeER. . ld3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: [0,5] . DeE--------R. . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. . ld3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: [0,7] . D=eE------R. . add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeeeER ld3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: [0,9] . .DeE--------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: 5. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: 9. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.3 0.2 3.4 <total>
+
+# CHECK: [28] Code Region - G29
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 711
+# CHECK-NEXT: Total uOps: 4400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.19
+# CHECK-NEXT: IPC: 1.41
+# CHECK-NEXT: Block RThroughput: 5.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234567
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeeeER . . ld3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: [0,1] .DeE--------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeER . . ld3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: [0,3] . D=eE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . . ld3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. . ld3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. . add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeeeER ld3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: [0,9] . .DeE--------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: 1. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.3 0.2 3.4 <total>
+
+# CHECK: [29] Code Region - G30
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 2111
+# CHECK-NEXT: Total uOps: 4300
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.04
+# CHECK-NEXT: IPC: 0.47
+# CHECK-NEXT: Block RThroughput: 5.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 01
+# CHECK-NEXT: Index 0123456789 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . . . .. ld3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . .. add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeeeER . . . .. ld3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE--------R . . . .. add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeeeER . . .. ld3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: [0,5] . DeE--------R . . .. add x0, x27, #1
+# CHECK-NEXT: [0,6] . D========eeeeeeeeER . .. ld3 { v1.b, v2.b, v3.b }[0], [x27], #3
+# CHECK-NEXT: [0,7] . D=========eE------R . .. add x0, x27, #1
+# CHECK-NEXT: [0,8] . .D===============eeeeeeeeER ld3 { v1.b, v2.b, v3.b }[8], [x27], #3
+# CHECK-NEXT: [0,9] . .D================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 8.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 9.0 0.0 0.0 ld3 { v1.b, v2.b, v3.b }[0], [x27], #3
+# CHECK-NEXT: 7. 1 10.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 16.0 0.0 0.0 ld3 { v1.b, v2.b, v3.b }[8], [x27], #3
+# CHECK-NEXT: 9. 1 17.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 5.9 0.2 3.4 <total>
+
+# CHECK: [30] Code Region - G31
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 3500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.87
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 4.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld3 { v1.b, v2.b, v3.b }[0], [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .D=======eeeeeeeeER . . . . . . ld3 { v1.b, v2.b, v3.b }[8], [x27], x28
+# CHECK-NEXT: [0,3] .D========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D==============eeeeeeeeER . . . . ld3 { v1.h, v2.h, v3.h }[0], [x27], #6
+# CHECK-NEXT: [0,5] . D===============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=====================eeeeeeeeER. . . ld3 { v1.h, v2.h, v3.h }[4], [x27], #6
+# CHECK-NEXT: [0,7] . D======================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D============================eeeeeeeeER ld3 { v1.h, v2.h, v3.h }[0], [x27], x28
+# CHECK-NEXT: [0,9] . D=============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3 { v1.b, v2.b, v3.b }[0], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 8.0 0.0 0.0 ld3 { v1.b, v2.b, v3.b }[8], [x27], x28
+# CHECK-NEXT: 3. 1 9.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 15.0 0.0 0.0 ld3 { v1.h, v2.h, v3.h }[0], [x27], #6
+# CHECK-NEXT: 5. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 22.0 0.0 0.0 ld3 { v1.h, v2.h, v3.h }[4], [x27], #6
+# CHECK-NEXT: 7. 1 23.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 29.0 0.0 0.0 ld3 { v1.h, v2.h, v3.h }[0], [x27], x28
+# CHECK-NEXT: 9. 1 30.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 15.5 0.1 3.0 <total>
+
+# CHECK: [31] Code Region - G32
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 3500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 0.87
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 4.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld3 { v1.h, v2.h, v3.h }[4], [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .D=======eeeeeeeeER . . . . . . ld3 { v1.s, v2.s, v3.s }[0], [x27], #12
+# CHECK-NEXT: [0,3] .D========eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D==============eeeeeeeeER . . . . ld3 { v1.s, v2.s, v3.s }[0], [x27], x28
+# CHECK-NEXT: [0,5] . D===============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=====================eeeeeeeeER. . . ld3 { v1.d, v2.d, v3.d }[0], [x27], #24
+# CHECK-NEXT: [0,7] . D======================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D============================eeeeeeeeER ld3 { v1.d, v2.d, v3.d }[0], [x27], x28
+# CHECK-NEXT: [0,9] . D=============================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3 { v1.h, v2.h, v3.h }[4], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 8.0 0.0 0.0 ld3 { v1.s, v2.s, v3.s }[0], [x27], #12
+# CHECK-NEXT: 3. 1 9.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 15.0 0.0 0.0 ld3 { v1.s, v2.s, v3.s }[0], [x27], x28
+# CHECK-NEXT: 5. 1 16.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 22.0 0.0 0.0 ld3 { v1.d, v2.d, v3.d }[0], [x27], #24
+# CHECK-NEXT: 7. 1 23.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 29.0 0.0 0.0 ld3 { v1.d, v2.d, v3.d }[0], [x27], x28
+# CHECK-NEXT: 9. 1 30.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 15.5 0.1 3.0 <total>
+
+# CHECK: [32] Code Region - G33
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 3500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.86
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 4.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld3r { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld3r { v1.2d, v2.2d, v3.2d }, [x27], #24
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld3r { v1.2s, v2.2s, v3.2s }, [x27], #12
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld3r { v1.4h, v2.4h, v3.4h }, [x27], #6
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld3r { v1.4s, v2.4s, v3.4s }, [x27], #12
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3r { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld3r { v1.2d, v2.2d, v3.2d }, [x27], #24
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld3r { v1.2s, v2.2s, v3.2s }, [x27], #12
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld3r { v1.4h, v2.4h, v3.4h }, [x27], #6
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3r { v1.4s, v2.4s, v3.4s }, [x27], #12
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [33] Code Region - G34
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 3500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.86
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 4.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld3r { v1.8b, v2.8b, v3.8b }, [x27], #3
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld3r { v1.8h, v2.8h, v3.8h }, [x27], #6
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld3r { v1.16b, v2.16b, v3.16b }, [x27], #3
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld3r { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld3r { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3r { v1.8b, v2.8b, v3.8b }, [x27], #3
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld3r { v1.8h, v2.8h, v3.8h }, [x27], #6
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld3r { v1.16b, v2.16b, v3.16b }, [x27], #3
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld3r { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3r { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [34] Code Region - G35
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 510
+# CHECK-NEXT: Total uOps: 3500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.86
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 4.4
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld3r { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeER . ld3r { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . ld3r { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eE------R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER. ld3r { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeeeeeER ld3r { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3r { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld3r { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ld3r { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ld3r { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ld3r { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 3.0 <total>
+
+# CHECK: [35] Code Region - G36
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 912
+# CHECK-NEXT: Total uOps: 4900
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.37
+# CHECK-NEXT: IPC: 1.10
+# CHECK-NEXT: Block RThroughput: 6.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 0
+
+# CHECK: [0,0] DeeeeeeeeER . . ld3r { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeeeeER . . ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: [0,3] . DeE-------R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER . . ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: [0,5] . DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeeeER . ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: [0,7] . .DeE------R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeeeeeeeER ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: [0,9] . . DeE---------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld3r { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: 3. 1 1.0 0.0 7.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: 5. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: 7. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: 9. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.1 0.4 3.4 <total>
+
+# CHECK: [36] Code Region - G37
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1009
+# CHECK-NEXT: Total uOps: 5600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.55
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 7.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345678
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . . ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: [0,1] .DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeeeeER . ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: [0,3] . DeE---------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeeeeER. ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: [0,5] . DeE---------R. add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeeeeeER. ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: [0,7] . . DeE-------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeeeeER ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: [0,9] . . DeE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: 3. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: 5. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 7.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 ld4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 3.7 <total>
+
+# CHECK: [37] Code Region - G38
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1012
+# CHECK-NEXT: Total uOps: 6000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.93
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 8.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01
+
+# CHECK: [0,0] DeeeeeeeeER . .. ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: [0,1] .DeE------R . .. add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeeeeER .. ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE---------R .. add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeE-R .. ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: [0,5] . DeE-------R .. add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeeeeeeeER.. ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: [0,7] . . DeE---------R.. add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeeeeeeeER ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: [0,9] . . DeE---------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 1.0 ld4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 7.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 ld4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 9.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 4.1 <total>
+
+# CHECK: [38] Code Region - G39
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 4500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 1.12
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 5.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+# CHECK-NEXT: [0,1] .DeE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . D======eeeeeeeeER . . . . . . ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+# CHECK-NEXT: [0,3] . D======eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D============eeeeeeeeER . . . . ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+# CHECK-NEXT: [0,5] . D============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .D==================eeeeeeeeER. . . ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+# CHECK-NEXT: [0,7] . . D==================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . D========================eeeeeeeeER ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+# CHECK-NEXT: [0,9] . . D========================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 7.0 0.0 0.0 ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+# CHECK-NEXT: 3. 1 7.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 13.0 0.0 0.0 ld4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+# CHECK-NEXT: 5. 1 13.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 19.0 0.0 0.0 ld4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+# CHECK-NEXT: 7. 1 19.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 25.0 0.0 0.0 ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+# CHECK-NEXT: 9. 1 25.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 13.0 0.1 3.0 <total>
+
+# CHECK: [39] Code Region - G40
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 4003
+# CHECK-NEXT: Total uOps: 4500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 1.12
+# CHECK-NEXT: IPC: 0.25
+# CHECK-NEXT: Block RThroughput: 5.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789 0123456789
+# CHECK-NEXT: Index 0123456789 0123456789 012
+
+# CHECK: [0,0] DeeeeeeeeER . . . . . . . ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+# CHECK-NEXT: [0,1] .DeE------R . . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . D======eeeeeeeeER . . . . . . ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+# CHECK-NEXT: [0,3] . D======eE------R . . . . . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D============eeeeeeeeER . . . . ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+# CHECK-NEXT: [0,5] . D============eE------R . . . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .D==================eeeeeeeeER. . . ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+# CHECK-NEXT: [0,7] . . D==================eE------R. . . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . D========================eeeeeeeeER ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+# CHECK-NEXT: [0,9] . . D========================eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 7.0 0.0 0.0 ld4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+# CHECK-NEXT: 3. 1 7.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 13.0 0.0 0.0 ld4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+# CHECK-NEXT: 5. 1 13.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 19.0 0.0 0.0 ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+# CHECK-NEXT: 7. 1 19.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 25.0 0.0 0.0 ld4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+# CHECK-NEXT: 9. 1 25.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 13.0 0.1 3.0 <total>
+
+# CHECK: [40] Code Region - G41
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1903
+# CHECK-NEXT: Total uOps: 4500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.36
+# CHECK-NEXT: IPC: 0.53
+# CHECK-NEXT: Block RThroughput: 5.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456789
+# CHECK-NEXT: Index 0123456789 01
+
+# CHECK: [0,0] DeeeeeeeeER . .. ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+# CHECK-NEXT: [0,1] .DeE------R . .. add x0, x27, #1
+# CHECK-NEXT: [0,2] . D======eeeeeeeeER .. ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+# CHECK-NEXT: [0,3] . D======eE------R .. add x0, x27, #1
+# CHECK-NEXT: [0,4] . D=====eeeeeeeeER.. ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: [0,5] . D=====eE------R.. add x0, x27, #1
+# CHECK-NEXT: [0,6] . .D====eeeeeeeeER. ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #32
+# CHECK-NEXT: [0,7] . . D====eE------R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . . D===eeeeeeeeER ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #16
+# CHECK-NEXT: [0,9] . . D===eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 7.0 0.0 0.0 ld4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+# CHECK-NEXT: 3. 1 7.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 6.0 0.0 0.0 ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: 5. 1 6.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 5.0 0.0 0.0 ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #32
+# CHECK-NEXT: 7. 1 5.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #16
+# CHECK-NEXT: 9. 1 4.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 4.6 0.1 3.0 <total>
+
+# CHECK: [41] Code Region - G42
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1009
+# CHECK-NEXT: Total uOps: 4500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.46
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 5.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345678
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . . ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #8
+# CHECK-NEXT: [0,1] .DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeER . . ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #16
+# CHECK-NEXT: [0,3] . DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER. . ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #4
+# CHECK-NEXT: [0,5] . DeE------R. . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeeeeER . ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #8
+# CHECK-NEXT: [0,7] . . DeE------R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeeeeER ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #4
+# CHECK-NEXT: [0,9] . . DeE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #8
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #16
+# CHECK-NEXT: 3. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #4
+# CHECK-NEXT: 5. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #8
+# CHECK-NEXT: 7. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #4
+# CHECK-NEXT: 9. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 3.0 <total>
+
+# CHECK: [42] Code Region - G43
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1009
+# CHECK-NEXT: Total uOps: 4500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.46
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 5.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345678
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . . ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: [0,1] .DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeER . . ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE------R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER. . ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: [0,5] . DeE------R. . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeeeeER . ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: [0,7] . . DeE------R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeeeeER ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: [0,9] . . DeE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4r { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld4r { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld4r { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 ld4r { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 ld4r { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 3.0 <total>
+
+# CHECK: [43] Code Region - G44
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 708
+# CHECK-NEXT: Total uOps: 3700
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.23
+# CHECK-NEXT: IPC: 1.41
+# CHECK-NEXT: Block RThroughput: 4.6
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeeeER . ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: [0,1] .DeE------R . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeeeeER . ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE------R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeeeER ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: [0,5] . DeE------R add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeE-R ldp s1, s2, [x27], #248
+# CHECK-NEXT: [0,7] . D=eE-----R add x0, x27, #1
+# CHECK-NEXT: [0,8] . .DeeeeeeER ldp d1, d2, [x27], #496
+# CHECK-NEXT: [0,9] . .D=eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ld4r { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 ld4r { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 1.0 ldp s1, s2, [x27], #248
+# CHECK-NEXT: 7. 1 2.0 0.0 5.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 ldp d1, d2, [x27], #496
+# CHECK-NEXT: 9. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.2 0.3 2.8 <total>
+
+# CHECK: [44] Code Region - G45
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 507
+# CHECK-NEXT: Total uOps: 2800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.52
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 3.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER .. ldp q1, q2, [x27], #992
+# CHECK-NEXT: [0,1] D=eE----R .. add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeeeER.. ldp s1, s2, [x27, #248]!
+# CHECK-NEXT: [0,3] .D=eE----R.. add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeeER. ldp d1, d2, [x27, #496]!
+# CHECK-NEXT: [0,5] . D=eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeeeER ldp q1, q2, [x27, #992]!
+# CHECK-NEXT: [0,7] . D=eE----R add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeE-R ldp w1, w2, [x27], #248
+# CHECK-NEXT: [0,9] . D=eE---R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldp q1, q2, [x27], #992
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 ldp s1, s2, [x27, #248]!
+# CHECK-NEXT: 3. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 ldp d1, d2, [x27, #496]!
+# CHECK-NEXT: 5. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 ldp q1, q2, [x27, #992]!
+# CHECK-NEXT: 7. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 1.0 ldp w1, w2, [x27], #248
+# CHECK-NEXT: 9. 1 2.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 2.0 <total>
+
+# CHECK: [45] Code Region - G46
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.95
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . ldp x1, x2, [x27], #496
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeER . ldp w1, w2, [x27, #248]!
+# CHECK-NEXT: [0,3] D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeER . ldp x1, x2, [x27, #496]!
+# CHECK-NEXT: [0,5] .D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeER. ldpsw x1, x2, [x27], #248
+# CHECK-NEXT: [0,7] .D===eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeER ldpsw x1, x2, [x27, #248]!
+# CHECK-NEXT: [0,9] . D===eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldp x1, x2, [x27], #496
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldp w1, w2, [x27, #248]!
+# CHECK-NEXT: 3. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ldp x1, x2, [x27, #496]!
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldpsw x1, x2, [x27], #248
+# CHECK-NEXT: 7. 1 4.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ldpsw x1, x2, [x27, #248]!
+# CHECK-NEXT: 9. 1 4.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 1.0 <total>
+
+# CHECK: [46] Code Region - G47
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.94
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ldr b1, [x27], #254
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ldr h1, [x27], #254
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeER . ldr s1, [x27], #254
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ldr d1, [x27], #254
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeER ldr q1, [x27], #254
+# CHECK-NEXT: [0,9] . D===eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldr b1, [x27], #254
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldr h1, [x27], #254
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ldr s1, [x27], #254
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldr d1, [x27], #254
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ldr q1, [x27], #254
+# CHECK-NEXT: 9. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.0 <total>
+
+# CHECK: [47] Code Region - G48
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 508
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.94
+# CHECK-NEXT: IPC: 1.97
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeeER . . ldr b1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eE----R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeeeER. . ldr h1, [x27, #254]!
+# CHECK-NEXT: [0,3] D==eE----R. . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eeeeeeER . ldr s1, [x27, #254]!
+# CHECK-NEXT: [0,5] .D==eE----R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeeeER. ldr d1, [x27, #254]!
+# CHECK-NEXT: [0,7] .D===eE----R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eeeeeeER ldr q1, [x27, #254]!
+# CHECK-NEXT: [0,9] . D===eE----R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldr b1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldr h1, [x27, #254]!
+# CHECK-NEXT: 3. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 ldr s1, [x27, #254]!
+# CHECK-NEXT: 5. 1 3.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldr d1, [x27, #254]!
+# CHECK-NEXT: 7. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 ldr q1, [x27, #254]!
+# CHECK-NEXT: 9. 1 4.0 0.0 4.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 2.0 <total>
+
+# CHECK: [48] Code Region - G49
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.96
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . ldr w1, [x27], #254
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeER . ldr x1, [x27], #254
+# CHECK-NEXT: [0,3] D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeER . ldr w1, [x27, #254]!
+# CHECK-NEXT: [0,5] .D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeER. ldr x1, [x27, #254]!
+# CHECK-NEXT: [0,7] .D===eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeER ldrb w1, [x27], #254
+# CHECK-NEXT: [0,9] .D====eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldr w1, [x27], #254
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldr x1, [x27], #254
+# CHECK-NEXT: 3. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ldr w1, [x27, #254]!
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldr x1, [x27, #254]!
+# CHECK-NEXT: 7. 1 4.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ldrb w1, [x27], #254
+# CHECK-NEXT: 9. 1 5.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 1.0 <total>
+
+# CHECK: [49] Code Region - G50
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.96
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . ldrb w1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeER . ldrh w1, [x27], #254
+# CHECK-NEXT: [0,3] D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeER . ldrh w1, [x27, #254]!
+# CHECK-NEXT: [0,5] .D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeER. ldrsb w1, [x27], #254
+# CHECK-NEXT: [0,7] .D===eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeER ldrsb x1, [x27], #254
+# CHECK-NEXT: [0,9] .D====eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldrb w1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldrh w1, [x27], #254
+# CHECK-NEXT: 3. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ldrh w1, [x27, #254]!
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldrsb w1, [x27], #254
+# CHECK-NEXT: 7. 1 4.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ldrsb x1, [x27], #254
+# CHECK-NEXT: 9. 1 5.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 1.0 <total>
+
+# CHECK: [50] Code Region - G51
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 1500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 2.96
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 1.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . ldrsb w1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeER . ldrsb x1, [x27, #254]!
+# CHECK-NEXT: [0,3] D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeER . ldrsh w1, [x27], #254
+# CHECK-NEXT: [0,5] .D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eeeeER. ldrsh x1, [x27], #254
+# CHECK-NEXT: [0,7] .D===eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] .D===eeeeER ldrsh w1, [x27, #254]!
+# CHECK-NEXT: [0,9] .D====eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldrsb w1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldrsb x1, [x27, #254]!
+# CHECK-NEXT: 3. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ldrsh w1, [x27], #254
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 ldrsh x1, [x27], #254
+# CHECK-NEXT: 7. 1 4.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 4.0 0.0 0.0 ldrsh w1, [x27, #254]!
+# CHECK-NEXT: 9. 1 5.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 3.0 0.1 1.0 <total>
+
+# CHECK: [51] Code Region - G52
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 1800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.57
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeeeeER . ldrsh x1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eeeeER. ldrsw x1, [x27], #254
+# CHECK-NEXT: [0,3] D==eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,4] D==eeeeER ldrsw x1, [x27, #254]!
+# CHECK-NEXT: [0,5] .D==eE--R add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eE--R st1 { v1.1d }, [x27], #8
+# CHECK-NEXT: [0,7] .D===eE-R add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eE-R st1 { v1.2d }, [x27], #16
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldrsh x1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 ldrsw x1, [x27], #254
+# CHECK-NEXT: 3. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 3.0 0.0 0.0 ldrsw x1, [x27, #254]!
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 2.0 st1 { v1.1d }, [x27], #8
+# CHECK-NEXT: 7. 1 4.0 0.0 1.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 1.0 st1 { v1.2d }, [x27], #16
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.8 0.1 1.0 <total>
+
+# CHECK: [52] Code Region - G53
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2300
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.56
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.2s }, [x27], #8
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st1 { v1.4h }, [x27], #8
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st1 { v1.4s }, [x27], #16
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st1 { v1.8b }, [x27], #8
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. st1 { v1.8h }, [x27], #16
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.2s }, [x27], #8
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.4h }, [x27], #8
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st1 { v1.4s }, [x27], #16
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 st1 { v1.8b }, [x27], #8
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st1 { v1.8h }, [x27], #16
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.0 0.1 0.0 <total>
+
+# CHECK: [53] Code Region - G54
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2300
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.56
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.16b }, [x27], #16
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st1 { v1.1d }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st1 { v1.2d }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st1 { v1.2s }, [x27], x28
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. st1 { v1.4h }, [x27], x28
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.16b }, [x27], #16
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st1 { v1.1d }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st1 { v1.2d }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 st1 { v1.2s }, [x27], x28
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st1 { v1.4h }, [x27], x28
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.2 0.1 0.0 <total>
+
+# CHECK: [54] Code Region - G55
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.37
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.4s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st1 { v1.8b }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st1 { v1.8h }, [x27], x28
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . st1 { v1.16b }, [x27], x28
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st1 { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.4s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st1 { v1.8b }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st1 { v1.8h }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 st1 { v1.16b }, [x27], x28
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st1 { v1.1d, v2.1d }, [x27], #16
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.5 0.1 0.0 <total>
+
+# CHECK: [55] Code Region - G56
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2700
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.36
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st1 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st1 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . st1 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeER. st1 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: [0,9] . D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st1 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: 9. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 0.0 <total>
+
+# CHECK: [56] Code Region - G57
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.56
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st1 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st1 { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . st1 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeER. st1 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.1d, v2.1d }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st1 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 0.0 <total>
+
+# CHECK: [57] Code Region - G58
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.56
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st1 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st1 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . st1 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeER. st1 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: [0,9] . D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st1 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 0.0 <total>
+
+# CHECK: [58] Code Region - G59
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 703
+# CHECK-NEXT: Total uOps: 4000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.69
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 6.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeER . . st1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeER . st1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eeER st1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.1d, v2.1d, v3.1d }, [x27], #24
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 1.0 0.0 st1 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st1 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.9 0.2 0.0 <total>
+
+# CHECK: [59] Code Region - G60
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 703
+# CHECK-NEXT: Total uOps: 4000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.69
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 6.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeER . . st1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeER . st1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeER . st1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eeER st1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 1.0 0.0 st1 { v1.1d, v2.1d, v3.1d }, [x27], x28
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st1 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.9 0.2 0.0 <total>
+
+# CHECK: [60] Code Region - G61
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 703
+# CHECK-NEXT: Total uOps: 4000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.69
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 6.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeER . . st1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeER . st1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . st1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eeER st1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st1 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 1.0 0.0 st1 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.7 0.2 0.0 <total>
+
+# CHECK: [61] Code Region - G62
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 706
+# CHECK-NEXT: Total uOps: 4200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.95
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 6.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeER. . . st1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeER . . st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: [0,3] .D=eE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D=eeER . . st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: [0,5] . D=eER . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeER . st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: [0,7] . D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eeeeER st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: [0,9] . D==eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], #32
+# CHECK-NEXT: 3. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 1.0 0.0 st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: 7. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 1.0 0.0 st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: 9. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.8 0.3 0.6 <total>
+
+# CHECK: [62] Code Region - G63
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 807
+# CHECK-NEXT: Total uOps: 4600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.70
+# CHECK-NEXT: IPC: 1.24
+# CHECK-NEXT: Block RThroughput: 8.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeER. . . st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: [0,1] .DeER. . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: [0,3] . D=eE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D=eeER . . st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: [0,5] . D=eER . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeER. . st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: [0,7] . .DeER. . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . D=eeeeER st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: [0,9] . . D==eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: 1. 1 1.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: 3. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 1.0 0.0 st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: 7. 1 1.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 2.0 0.0 st1 { v1.1d, v2.1d, v3.1d, v4.1d }, [x27], x28
+# CHECK-NEXT: 9. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.6 0.5 0.4 <total>
+
+# CHECK: [63] Code Region - G64
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 706
+# CHECK-NEXT: Total uOps: 4400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.23
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 7.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeER. . . st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: [0,1] .DeER. . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: [0,3] . D=eE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D=eeeeER . st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: [0,5] . D==eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eeE-R . st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: [0,7] . D=eE-R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . .DeeeeER st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: [0,9] . .D=eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st1 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 1.0 0.0 st1 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 1.0 st1 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 1.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st1 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.7 0.3 0.8 <total>
+
+# CHECK: [64] Code Region - G65
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 704
+# CHECK-NEXT: Total uOps: 3200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.55
+# CHECK-NEXT: IPC: 1.42
+# CHECK-NEXT: Block RThroughput: 5.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeER. . st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: [0,1] .DeER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeER . st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: [0,3] . DeER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . D=eER . st1 { v1.b }[0], [x27], #1
+# CHECK-NEXT: [0,5] . D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st1 { v1.b }[8], [x27], #1
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st1 { v1.b }[0], [x27], x28
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st1 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 1.0 0.0 st1 { v1.b }[0], [x27], #1
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 st1 { v1.b }[8], [x27], #1
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st1 { v1.b }[0], [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.1 0.3 0.0 <total>
+
+# CHECK: [65] Code Region - G66
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.97
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.b }[8], [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st1 { v1.h }[0], [x27], #2
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st1 { v1.h }[4], [x27], #2
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . st1 { v1.h }[0], [x27], x28
+# CHECK-NEXT: [0,7] .D===eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st1 { v1.h }[4], [x27], x28
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.b }[8], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st1 { v1.h }[0], [x27], #2
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st1 { v1.h }[4], [x27], #2
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 st1 { v1.h }[0], [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st1 { v1.h }[4], [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 0.0 <total>
+
+# CHECK: [66] Code Region - G67
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.37
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st1 { v1.s }[0], [x27], #4
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st1 { v1.s }[0], [x27], x28
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st1 { v1.d }[0], [x27], #8
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . st1 { v1.d }[0], [x27], x28
+# CHECK-NEXT: [0,7] .D===eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st2 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st1 { v1.s }[0], [x27], #4
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st1 { v1.s }[0], [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st1 { v1.d }[0], [x27], #8
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 st1 { v1.d }[0], [x27], x28
+# CHECK-NEXT: 7. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st2 { v1.2d, v2.2d }, [x27], #32
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 0.0 <total>
+
+# CHECK: [67] Code Region - G68
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.76
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st2 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st2 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st2 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st2 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. st2 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st2 { v1.2s, v2.2s }, [x27], #16
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st2 { v1.4h, v2.4h }, [x27], #16
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st2 { v1.4s, v2.4s }, [x27], #32
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 st2 { v1.8b, v2.8b }, [x27], #16
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st2 { v1.8h, v2.8h }, [x27], #32
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.3 0.1 0.0 <total>
+
+# CHECK: [68] Code Region - G69
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.16
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st2 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st2 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st2 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . st2 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. st2 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st2 { v1.16b, v2.16b }, [x27], #32
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st2 { v1.2d, v2.2d }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st2 { v1.2s, v2.2s }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 st2 { v1.4h, v2.4h }, [x27], x28
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st2 { v1.4s, v2.4s }, [x27], x28
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.9 0.1 0.0 <total>
+
+# CHECK: [69] Code Region - G70
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.76
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st2 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . st2 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . st2 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . st2 { v1.b, v2.b }[0], [x27], #2
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. st2 { v1.b, v2.b }[8], [x27], #2
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st2 { v1.8b, v2.8b }, [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st2 { v1.8h, v2.8h }, [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st2 { v1.16b, v2.16b }, [x27], x28
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st2 { v1.b, v2.b }[0], [x27], #2
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 st2 { v1.b, v2.b }[8], [x27], #2
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.7 0.1 0.0 <total>
+
+# CHECK: [70] Code Region - G71
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.97
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st2 { v1.b, v2.b }[0], [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st2 { v1.b, v2.b }[8], [x27], x28
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st2 { v1.h, v2.h }[0], [x27], #4
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . st2 { v1.h, v2.h }[4], [x27], #4
+# CHECK-NEXT: [0,7] .D===eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st2 { v1.h, v2.h }[0], [x27], x28
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st2 { v1.b, v2.b }[0], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st2 { v1.b, v2.b }[8], [x27], x28
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st2 { v1.h, v2.h }[0], [x27], #4
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 st2 { v1.h, v2.h }[4], [x27], #4
+# CHECK-NEXT: 7. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st2 { v1.h, v2.h }[0], [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 0.0 <total>
+
+# CHECK: [71] Code Region - G72
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.97
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . st2 { v1.h, v2.h }[4], [x27], x28
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . st2 { v1.s, v2.s }[0], [x27], #8
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . st2 { v1.s, v2.s }[0], [x27], x28
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . st2 { v1.d, v2.d }[0], [x27], #16
+# CHECK-NEXT: [0,7] .D===eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. st2 { v1.d, v2.d }[0], [x27], x28
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st2 { v1.h, v2.h }[4], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 st2 { v1.s, v2.s }[0], [x27], #8
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 st2 { v1.s, v2.s }[0], [x27], x28
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 st2 { v1.d, v2.d }[0], [x27], #16
+# CHECK-NEXT: 7. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 st2 { v1.d, v2.d }[0], [x27], x28
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 0.0 <total>
+
+# CHECK: [72] Code Region - G73
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 600
+# CHECK-NEXT: Total Cycles: 605
+# CHECK-NEXT: Total uOps: 3400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.62
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 4.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeER . st3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: [0,1] .DeE---R . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . st3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: [0,3] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER st3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: [0,5] . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.2d, v2.2d, v3.2d }, [x27], #48
+# CHECK-NEXT: 1. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.2s, v2.2s, v3.2s }, [x27], #24
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.4h, v2.4h, v3.4h }, [x27], #24
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6 1.0 0.5 1.2 <total>
+
+# CHECK: [73] Code Region - G74
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1006
+# CHECK-NEXT: Total uOps: 6600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.56
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 8.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeER . . st3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: [0,1] .DeE---R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: [0,3] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeER . st3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: [0,5] . DeE---R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeER . st3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: [0,7] . . DeE---R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeER st3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: [0,9] . . DeE---R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.4s, v2.4s, v3.4s }, [x27], #48
+# CHECK-NEXT: 1. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.8b, v2.8b, v3.8b }, [x27], #24
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.8h, v2.8h, v3.8h }, [x27], #48
+# CHECK-NEXT: 5. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st3 { v1.16b, v2.16b, v3.16b }, [x27], #48
+# CHECK-NEXT: 7. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st3 { v1.2d, v2.2d, v3.2d }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 1.4 <total>
+
+# CHECK: [74] Code Region - G75
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1006
+# CHECK-NEXT: Total uOps: 5800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.77
+# CHECK-NEXT: IPC: 0.99
+# CHECK-NEXT: Block RThroughput: 7.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . . st3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: [0,1] .DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeeER . st3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: [0,5] . DeE---R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeER . st3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: [0,7] . . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeER st3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: [0,9] . . DeE---R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.2s, v2.2s, v3.2s }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.4h, v2.4h, v3.4h }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.4s, v2.4s, v3.4s }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st3 { v1.8b, v2.8b, v3.8b }, [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st3 { v1.8h, v2.8h, v3.8h }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 1.2 <total>
+
+# CHECK: [75] Code Region - G76
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1005
+# CHECK-NEXT: Total uOps: 5400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.37
+# CHECK-NEXT: IPC: 1.00
+# CHECK-NEXT: Block RThroughput: 6.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeER . . st3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: [0,1] .DeE---R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st3 { v1.b, v2.b, v3.b }[0], [x27], #3
+# CHECK-NEXT: [0,3] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st3 { v1.b, v2.b, v3.b }[8], [x27], #3
+# CHECK-NEXT: [0,5] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeER . st3 { v1.b, v2.b, v3.b }[0], [x27], x28
+# CHECK-NEXT: [0,7] . . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeER st3 { v1.b, v2.b, v3.b }[8], [x27], x28
+# CHECK-NEXT: [0,9] . . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.16b, v2.16b, v3.16b }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 3.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.b, v2.b, v3.b }[0], [x27], #3
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.b, v2.b, v3.b }[8], [x27], #3
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st3 { v1.b, v2.b, v3.b }[0], [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st3 { v1.b, v2.b, v3.b }[8], [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 1.1 <total>
+
+# CHECK: [76] Code Region - G77
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1005
+# CHECK-NEXT: Total uOps: 5000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.98
+# CHECK-NEXT: IPC: 1.00
+# CHECK-NEXT: Block RThroughput: 6.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . . st3 { v1.h, v2.h, v3.h }[0], [x27], #6
+# CHECK-NEXT: [0,1] .DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st3 { v1.h, v2.h, v3.h }[4], [x27], #6
+# CHECK-NEXT: [0,3] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st3 { v1.h, v2.h, v3.h }[0], [x27], x28
+# CHECK-NEXT: [0,5] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeER . st3 { v1.h, v2.h, v3.h }[4], [x27], x28
+# CHECK-NEXT: [0,7] . . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeER st3 { v1.s, v2.s, v3.s }[0], [x27], #12
+# CHECK-NEXT: [0,9] . . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.h, v2.h, v3.h }[0], [x27], #6
+# CHECK-NEXT: 1. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.h, v2.h, v3.h }[4], [x27], #6
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.h, v2.h, v3.h }[0], [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st3 { v1.h, v2.h, v3.h }[4], [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st3 { v1.s, v2.s, v3.s }[0], [x27], #12
+# CHECK-NEXT: 9. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.5 1.0 <total>
+
+# CHECK: [77] Code Region - G78
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1105
+# CHECK-NEXT: Total uOps: 5800
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.25
+# CHECK-NEXT: IPC: 0.90
+# CHECK-NEXT: Block RThroughput: 7.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 012345
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . . st3 { v1.s, v2.s, v3.s }[0], [x27], x28
+# CHECK-NEXT: [0,1] .DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER . . st3 { v1.d, v2.d, v3.d }[0], [x27], #24
+# CHECK-NEXT: [0,3] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st3 { v1.d, v2.d, v3.d }[0], [x27], x28
+# CHECK-NEXT: [0,5] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeeER . st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: [0,7] . . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeER st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: [0,9] . . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st3 { v1.s, v2.s, v3.s }[0], [x27], x28
+# CHECK-NEXT: 1. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st3 { v1.d, v2.d, v3.d }[0], [x27], #24
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st3 { v1.d, v2.d, v3.d }[0], [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], #64
+# CHECK-NEXT: 7. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], #32
+# CHECK-NEXT: 9. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.6 1.0 <total>
+
+# CHECK: [78] Code Region - G79
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1305
+# CHECK-NEXT: Total uOps: 7400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.67
+# CHECK-NEXT: IPC: 0.77
+# CHECK-NEXT: Block RThroughput: 9.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01234567
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . . . st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: [0,1] .DeE--R . . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeER. . . st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: [0,3] . DeE--R. . . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . . st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: [0,5] . .DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,6] . . DeeeeeER. . st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: [0,7] . . DeE--R. . add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeeER st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: [0,9] . . . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], #32
+# CHECK-NEXT: 1. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], #64
+# CHECK-NEXT: 3. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], #32
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], #64
+# CHECK-NEXT: 7. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], #64
+# CHECK-NEXT: 9. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.8 1.0 <total>
+
+# CHECK: [79] Code Region - G80
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 1205
+# CHECK-NEXT: Total uOps: 6600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.48
+# CHECK-NEXT: IPC: 0.83
+# CHECK-NEXT: Block RThroughput: 8.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123456
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeER . .. st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: [0,1] . DeE--R . .. add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeER. .. st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE--R. .. add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER .. st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: [0,5] . .DeE--R .. add x0, x27, #1
+# CHECK-NEXT: [0,6] . . DeeeeeER.. st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: [0,7] . . DeE--R.. add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeER st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: [0,9] . . .DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st4 { v1.2d, v2.2d, v3.2d, v4.2d }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st4 { v1.2s, v2.2s, v3.2s, v4.2s }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st4 { v1.4h, v2.4h, v3.4h, v4.4h }, [x27], x28
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st4 { v1.4s, v2.4s, v3.4s, v4.4s }, [x27], x28
+# CHECK-NEXT: 7. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 1.0 0.0 st4 { v1.8b, v2.8b, v3.8b, v4.8b }, [x27], x28
+# CHECK-NEXT: 9. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.0 0.7 1.0 <total>
+
+# CHECK: [80] Code Region - G81
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 806
+# CHECK-NEXT: Total uOps: 5400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.70
+# CHECK-NEXT: IPC: 1.24
+# CHECK-NEXT: Block RThroughput: 6.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0123
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeeER . . st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: [0,1] . DeE--R . . add x0, x27, #1
+# CHECK-NEXT: [0,2] . DeeeeeER . st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: [0,3] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+# CHECK-NEXT: [0,5] . D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . .DeeeeER. st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+# CHECK-NEXT: [0,7] . .D=eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . . DeeeeER st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+# CHECK-NEXT: [0,9] . . D=eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st4 { v1.8h, v2.8h, v3.8h, v4.8h }, [x27], x28
+# CHECK-NEXT: 1. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 1.0 0.0 st4 { v1.16b, v2.16b, v3.16b, v4.16b }, [x27], x28
+# CHECK-NEXT: 3. 1 1.0 1.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 1.0 0.0 st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], #4
+# CHECK-NEXT: 5. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], #4
+# CHECK-NEXT: 7. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st4 { v1.b, v2.b, v3.b, v4.b }[0], [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.3 0.5 1.0 <total>
+
+# CHECK: [81] Code Region - G82
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 3000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.93
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeER . st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+# CHECK-NEXT: [0,3] .D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+# CHECK-NEXT: [0,5] . D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeER. st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+# CHECK-NEXT: [0,7] . D=eE--R. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeeeeER st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+# CHECK-NEXT: [0,9] . D=eE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st4 { v1.b, v2.b, v3.b, v4.b }[8], [x27], x28
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], #8
+# CHECK-NEXT: 3. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], #8
+# CHECK-NEXT: 5. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 st4 { v1.h, v2.h, v3.h, v4.h }[0], [x27], x28
+# CHECK-NEXT: 7. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 st4 { v1.h, v2.h, v3.h, v4.h }[4], [x27], x28
+# CHECK-NEXT: 9. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 1.0 <total>
+
+# CHECK: [82] Code Region - G83
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 800
+# CHECK-NEXT: Total Cycles: 506
+# CHECK-NEXT: Total uOps: 3200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 6.32
+# CHECK-NEXT: IPC: 1.58
+# CHECK-NEXT: Block RThroughput: 4.0
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeeeeER . st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+# CHECK-NEXT: [0,3] .D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeeeeER . st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+# CHECK-NEXT: [0,5] . DeE--R . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeeeeER st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+# CHECK-NEXT: [0,7] . DeE--R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], #16
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 st4 { v1.s, v2.s, v3.s, v4.s }[0], [x27], x28
+# CHECK-NEXT: 3. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], #32
+# CHECK-NEXT: 5. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 1.0 0.0 st4 { v1.d, v2.d, v3.d, v4.d }[0], [x27], x28
+# CHECK-NEXT: 7. 1 1.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 8 1.3 0.3 1.0 <total>
+
+# CHECK: [83] Code Region - G84
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 204
+# CHECK-NEXT: Total uOps: 1000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.90
+# CHECK-NEXT: IPC: 1.96
+# CHECK-NEXT: Block RThroughput: 1.3
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345
+
+# CHECK: [0,0] DeER . stp s1, s2, [x27], #248
+# CHECK-NEXT: [0,1] D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. stp d1, d2, [x27], #496
+# CHECK-NEXT: [0,3] .D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 stp s1, s2, [x27], #248
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 stp d1, d2, [x27], #496
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4 1.5 0.3 0.0 <total>
+
+# CHECK: [84] Code Region - G85
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 3000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.95
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . stp q1, q2, [x27], #992
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . stp s1, s2, [x27, #248]!
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . stp d1, d2, [x27, #496]!
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . stp q1, q2, [x27, #992]!
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeER. stp w1, w2, [x27], #248
+# CHECK-NEXT: [0,9] . D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 stp q1, q2, [x27], #992
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 stp s1, s2, [x27, #248]!
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 stp d1, d2, [x27, #496]!
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 stp q1, q2, [x27, #992]!
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 stp w1, w2, [x27], #248
+# CHECK-NEXT: 9. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 0.0 <total>
+
+# CHECK: [85] Code Region - G86
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2200
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.37
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . stp x1, x2, [x27], #496
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . stp w1, w2, [x27, #248]!
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . stp x1, x2, [x27, #496]!
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . str b1, [x27], #254
+# CHECK-NEXT: [0,7] . D==eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. str h1, [x27], #254
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 stp x1, x2, [x27], #496
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 stp w1, w2, [x27, #248]!
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 stp x1, x2, [x27, #496]!
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 str b1, [x27], #254
+# CHECK-NEXT: 7. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 str h1, [x27], #254
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.6 0.1 0.0 <total>
+
+# CHECK: [86] Code Region - G87
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2500
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.96
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 3.1
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . str s1, [x27], #254
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . str d1, [x27], #254
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . str q1, [x27], #254
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . DeER . str b1, [x27, #254]!
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . DeER. str h1, [x27, #254]!
+# CHECK-NEXT: [0,9] . D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 str s1, [x27], #254
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 str d1, [x27], #254
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 str q1, [x27], #254
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 1.0 0.0 0.0 str b1, [x27, #254]!
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 1.0 0.0 0.0 str h1, [x27, #254]!
+# CHECK-NEXT: 9. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.5 0.1 0.0 <total>
+
+# CHECK: [87] Code Region - G88
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2300
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 4.56
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.9
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . str s1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] .DeER. . str d1, [x27, #254]!
+# CHECK-NEXT: [0,3] .D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] . DeER . str q1, [x27, #254]!
+# CHECK-NEXT: [0,5] . D=eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] . D=eER . str w1, [x27], #254
+# CHECK-NEXT: [0,7] . D=eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D=eER. str x1, [x27], #254
+# CHECK-NEXT: [0,9] . D==eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 str s1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 1.0 0.0 0.0 str d1, [x27, #254]!
+# CHECK-NEXT: 3. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 1.0 0.0 0.0 str q1, [x27, #254]!
+# CHECK-NEXT: 5. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 2.0 0.0 0.0 str w1, [x27], #254
+# CHECK-NEXT: 7. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 2.0 0.0 0.0 str x1, [x27], #254
+# CHECK-NEXT: 9. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 1.8 0.1 0.0 <total>
+
+# CHECK: [88] Code Region - G89
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 1000
+# CHECK-NEXT: Total Cycles: 504
+# CHECK-NEXT: Total uOps: 2000
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.97
+# CHECK-NEXT: IPC: 1.98
+# CHECK-NEXT: Block RThroughput: 2.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 012345678
+
+# CHECK: [0,0] DeER . . str w1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eER. . add x0, x27, #1
+# CHECK-NEXT: [0,2] D=eER. . str x1, [x27, #254]!
+# CHECK-NEXT: [0,3] D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,4] .D=eER . strb w1, [x27], #254
+# CHECK-NEXT: [0,5] .D==eER . add x0, x27, #1
+# CHECK-NEXT: [0,6] .D==eER . strb w1, [x27, #254]!
+# CHECK-NEXT: [0,7] .D===eER. add x0, x27, #1
+# CHECK-NEXT: [0,8] . D==eER. strh w1, [x27], #254
+# CHECK-NEXT: [0,9] . D===eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 str w1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 2.0 0.0 0.0 str x1, [x27, #254]!
+# CHECK-NEXT: 3. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 4. 1 2.0 0.0 0.0 strb w1, [x27], #254
+# CHECK-NEXT: 5. 1 3.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 6. 1 3.0 0.0 0.0 strb w1, [x27, #254]!
+# CHECK-NEXT: 7. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 8. 1 3.0 0.0 0.0 strh w1, [x27], #254
+# CHECK-NEXT: 9. 1 4.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 10 2.7 0.1 0.0 <total>
+
+# CHECK: [89] Code Region - G90
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 200
+# CHECK-NEXT: Total Cycles: 104
+# CHECK-NEXT: Total uOps: 400
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 3.85
+# CHECK-NEXT: IPC: 1.92
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK: Timeline view:
+# CHECK-NEXT: Index 01234
+
+# CHECK: [0,0] DeER. strh w1, [x27, #254]!
+# CHECK-NEXT: [0,1] D=eER add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 strh w1, [x27, #254]!
+# CHECK-NEXT: 1. 1 2.0 0.0 0.0 add x0, x27, #1
+# CHECK-NEXT: 2 1.5 0.5 0.0 <total>
+
+# CHECK: [90] Code Region - G91
+
+# CHECK: Iterations: 100
+# CHECK-NEXT: Instructions: 400
+# CHECK-NEXT: Total Cycles: 110
+# CHECK-NEXT: Total uOps: 600
+
+# CHECK: Dispatch Width: 8
+# CHECK-NEXT: uOps Per Cycle: 5.45
+# CHECK-NEXT: IPC: 3.64
+# CHECK-NEXT: Block RThroughput: 0.8
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+
+# CHECK: [0,0] DeeeeER . ldr x1, [x27], #254
+# CHECK-NEXT: [0,1] D=eE--R . add x0, x27, #1
+# CHECK-NEXT: [0,2] D====eeeeER ldr x2, [x1], #254
+# CHECK-NEXT: [0,3] D=eE------R add x0, x27, #1
+
+# CHECK: Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK: [0] [1] [2] [3]
+# CHECK-NEXT: 0. 1 1.0 1.0 0.0 ldr x1, [x27], #254
+# CHECK-NEXT: 1. 1 2.0 0.0 2.0 add x0, x27, #1
+# CHECK-NEXT: 2. 1 5.0 0.0 0.0 ldr x2, [x1], #254
+# CHECK-NEXT: 3. 1 2.0 0.0 6.0 add x0, x27, #1
+# CHECK-NEXT: 4 2.5 0.3 2.0 <total>
>From dfd504b5de7eda518ddebbf09e72d471c52ea5bb Mon Sep 17 00:00:00 2001
From: Zhiheng Xie <xiezhiheng at huawei.com>
Date: Mon, 3 Aug 2026 15:00:47 +0800
Subject: [PATCH 2/2] Remove TODO comment
---
llvm/lib/Target/AArch64/AArch64Processors.td | 1 -
1 file changed, 1 deletion(-)
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index 31f1536aa81c4..68efd16459ada 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -1421,7 +1421,6 @@ def : ProcessorModel<"thunderx3t110", ThunderX3T110Model,
// HiSilicon Processors.
def : ProcessorModel<"tsv110", TSV110Model, ProcessorFeatures.TSV110,
[TuneTSV110]>;
-// TODO: Support hip12 model.
def : ProcessorModel<"hip12", HIP12Model, ProcessorFeatures.HIP12,
[TuneHIP12]>;
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