[llvm] 4f607e3 - AMDGPU: Migrate misc. tests to subarch triples (#213593)
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Sun Aug 2 22:42:32 PDT 2026
Author: Matt Arsenault
Date: 2026-08-03T07:42:27+02:00
New Revision: 4f607e3cd911ccc3d1aab73129aacea97d864663
URL: https://github.com/llvm/llvm-project/commit/4f607e3cd911ccc3d1aab73129aacea97d864663
DIFF: https://github.com/llvm/llvm-project/commit/4f607e3cd911ccc3d1aab73129aacea97d864663.diff
LOG: AMDGPU: Migrate misc. tests to subarch triples (#213593)
Added:
Modified:
llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
llvm/test/MC/ELF/AMDGPU/cfi.s
llvm/test/MC/ELF/cfi-register-pair.s
llvm/test/MC/ELF/cfi-vector-offset.s
llvm/test/MC/ELF/cfi-vector-registers.s
llvm/test/Other/amdgpu-pass-pipeline-parsing.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll b/llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
index a22454f818a4c..f03c9195edbfa 100644
--- a/llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
+++ b/llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+real-true16 | FileCheck -check-prefixes=GFX1250,GFX1250-TRUE16 %s
-; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-real-true16 | FileCheck -check-prefixes=GFX1250,GFX1250-FAKE16 %s
+; RUN: llc < %s -mtriple=amdgpu12.50-amd-amdhsa -mattr=+real-true16 | FileCheck -check-prefixes=GFX1250,GFX1250-TRUE16 %s
+; RUN: llc < %s -mtriple=amdgpu12.50-amd-amdhsa -mattr=-real-true16 | FileCheck -check-prefixes=GFX1250,GFX1250-FAKE16 %s
; llvm.convert.from.arbitrary.fp from FP8/BF8 producing f16 result types,
; lowered via the gfx1250+ unscaled v_cvt_{pk_}f16_{fp8,bf8} instructions.
diff --git a/llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll b/llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
index 86a9e663cfc0c..944f44e41e964 100644
--- a/llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
+++ b/llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 | FileCheck -check-prefix=GFX950 %s
-; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 | FileCheck -check-prefix=GFX1170 %s
-; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 | FileCheck -check-prefix=GFX1250 %s
+; RUN: llc < %s -mtriple=amdgpu9.50-amd-amdhsa | FileCheck -check-prefix=GFX950 %s
+; RUN: llc < %s -mtriple=amdgpu11.70-amd-amdhsa | FileCheck -check-prefix=GFX1170 %s
+; RUN: llc < %s -mtriple=amdgpu12.50-amd-amdhsa | FileCheck -check-prefix=GFX1250 %s
; llvm.convert.from.arbitrary.fp on FP8ConversionInsts targets with OCP FP8.
diff --git a/llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll b/llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
index ce16f1ee3215f..ee07b96fad685 100644
--- a/llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
+++ b/llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
@@ -4,7 +4,7 @@
; __profd_ aliases to allow linker deduplication across TUs.
; Non-weak functions get external linkage (default for aliases).
-target triple = "amdgcn-amd-amdhsa"
+target triple = "amdgpu7-amd-amdhsa"
@__hip_cuid_abc123 = addrspace(1) global i8 0
diff --git a/llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll b/llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
index d17ac79988737..dd88398964b83 100644
--- a/llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
+++ b/llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
@@ -2,7 +2,7 @@
; RUN: opt < %s -passes=instrumentor -instrumentor-read-config-files=%S/load_store_gpu_ind.json -S | FileCheck %s
target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
-target triple = "amdgcn-amd-amdhsa"
+target triple = "amdgpu7-amd-amdhsa"
define noundef zeroext i1 @_Z15store_load_boolPb(ptr captures(none) noundef initializes((0, 1)) %A) {
; CHECK-LABEL: define noundef zeroext i1 @_Z15store_load_boolPb(
diff --git a/llvm/test/MC/ELF/AMDGPU/cfi.s b/llvm/test/MC/ELF/AMDGPU/cfi.s
index 570dcecb71dba..06a7ac3a21f12 100644
--- a/llvm/test/MC/ELF/AMDGPU/cfi.s
+++ b/llvm/test/MC/ELF/AMDGPU/cfi.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -filetype=asm -mcpu=gfx900 -triple amdgcn-amd-amdhsa %s -o - | FileCheck --check-prefix=ASM %s
-# RUN: llvm-mc -filetype=obj -mcpu=gfx900 -triple amdgcn-amd-amdhsa %s -o %t
+# RUN: llvm-mc -filetype=asm -triple amdgpu9.00-amd-amdhsa %s -o - | FileCheck --check-prefix=ASM %s
+# RUN: llvm-mc -filetype=obj -triple amdgpu9.00-amd-amdhsa %s -o %t
# RUN: llvm-readelf -S -r -x .debug_frame %t | FileCheck --check-prefix=READELF %s
f:
@@ -11,7 +11,7 @@ f:
# ASM: f:
# ASM-NEXT: .cfi_sections .debug_frame
# ASM-NEXT: .cfi_startproc
-# ASM-NEXT: .amdgcn_target "amdgcn-amd-amdhsa-unknown-gfx900"
+# ASM-NEXT: .amdgcn_target "amdgpu9.00-amd-amdhsa-unknown-gfx900"
# ASM-NEXT: s_nop 0
# ASM-NEXT: .cfi_endproc
diff --git a/llvm/test/MC/ELF/cfi-register-pair.s b/llvm/test/MC/ELF/cfi-register-pair.s
index 05ef8e9ae2a4d..09debb6ccdd39 100644
--- a/llvm/test/MC/ELF/cfi-register-pair.s
+++ b/llvm/test/MC/ELF/cfi-register-pair.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -triple amdgcn-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
-# RUN: llvm-mc -filetype=obj -triple amdgcn-amd-amdhsa %s | llvm-readobj -S --sr --sd - | FileCheck %s
+# RUN: llvm-mc -triple amdgpu7.00-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
+# RUN: llvm-mc -filetype=obj -triple amdgpu7.00-amd-amdhsa %s | llvm-readobj -S --sr --sd - | FileCheck %s
# REQUIRES: amdgpu-registered-target
diff --git a/llvm/test/MC/ELF/cfi-vector-offset.s b/llvm/test/MC/ELF/cfi-vector-offset.s
index 7817396b8f316..640649763d7c6 100644
--- a/llvm/test/MC/ELF/cfi-vector-offset.s
+++ b/llvm/test/MC/ELF/cfi-vector-offset.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -triple amdgcn-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
-# RUN: llvm-mc -filetype=obj -triple amdgcn-amd-amdhsa %s | llvm-readobj -S --sr --sd - | FileCheck %s
+# RUN: llvm-mc -triple amdgpu7.00-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
+# RUN: llvm-mc -filetype=obj -triple amdgpu7.00-amd-amdhsa %s | llvm-readobj -S --sr --sd - | FileCheck %s
# REQUIRES: amdgpu-registered-target
diff --git a/llvm/test/MC/ELF/cfi-vector-registers.s b/llvm/test/MC/ELF/cfi-vector-registers.s
index 76f001007a272..a1b5ca57a7fdd 100644
--- a/llvm/test/MC/ELF/cfi-vector-registers.s
+++ b/llvm/test/MC/ELF/cfi-vector-registers.s
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -triple amdgcn-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
-# RUN: llvm-mc -filetype=obj -triple amdgcn-amd-amdhsa -mcpu=gfx908 %s | llvm-readobj -S --sr --sd - | FileCheck %s
+# RUN: llvm-mc -triple amdgpu7.00-amd-amdhsa %s | FileCheck %s --check-prefix=ASM
+# RUN: llvm-mc -filetype=obj -triple amdgpu9.08-amd-amdhsa %s | llvm-readobj -S --sr --sd - | FileCheck %s
# REQUIRES: amdgpu-registered-target
diff --git a/llvm/test/Other/amdgpu-pass-pipeline-parsing.ll b/llvm/test/Other/amdgpu-pass-pipeline-parsing.ll
index 032c2b9d297bb..380016ed886f0 100644
--- a/llvm/test/Other/amdgpu-pass-pipeline-parsing.ll
+++ b/llvm/test/Other/amdgpu-pass-pipeline-parsing.ll
@@ -1,6 +1,6 @@
; REQUIRES: amdgpu-registered-target
-; RUN: not opt -S -mtriple=amdgcn-amd-amdhsa -passes='amdgpu-attributor<random>' -disable-output %s 2>&1 | FileCheck %s
+; RUN: not opt -S -mtriple=amdgpu7.00-amd-amdhsa -passes='amdgpu-attributor<random>' -disable-output %s 2>&1 | FileCheck %s
; CHECK: amdgpu-attributor: invalid AMDGPUAttributor pass parameter 'random'
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