[llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #211715)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 2 09:18:06 PDT 2026


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-dev-x86-64` running on `ml-opt-dev-x86-64-b1` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/137/builds/43311

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir' FAILED ********************
Exit Code: 1

Command Output (stdout):
--
# RUN: at line 1
/b/ml-opt-dev-x86-64-b1/build/bin/llc -mtriple=amdgpu7.00-- -run-pass=print-machine-uniformity -o - /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir 2>&1 | /b/ml-opt-dev-x86-64-b1/build/bin/FileCheck /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
# executed command: /b/ml-opt-dev-x86-64-b1/build/bin/llc -mtriple=amdgpu7.00-- -run-pass=print-machine-uniformity -o - /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
# executed command: /b/ml-opt-dev-x86-64-b1/build/bin/FileCheck /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
# .---command stderr------------
# | /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir:7:15: error: CHECK-NEXT: is not on the line after the previous match
# | # CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
# |               ^
# | <stdin>:6:2: note: 'next' match was here
# |  depth=1: entries(bb.3 bb.1) bb.4 bb.2
# |  ^
# | <stdin>:4:28: note: previous match ended here
# | CYCLES WITH DIVERGENT EXIT:
# |                            ^
# | <stdin>:5:1: note: non-matching line after previous match is here
# |  depth=2: entries(bb.4 bb.1) bb.2
# | ^
# | 
# | Input file: <stdin>
# | Check file: /b/ml-opt-dev-x86-64-b1/llvm-project/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
# | 
# | -dump-input=help explains the following input dump.
# | 
# | Input was:
# | <<<<<<
# |           1: MachineUniformityInfo for function: @divergent_cycle_1 
# |           2: CYCLES ASSUMED DIVERGENT: 
# |           3:  depth=1: entries(bb.3 bb.1) bb.4 bb.2 
# |           4: CYCLES WITH DIVERGENT EXIT: 
# | next:7'0                               {   search range start (exclusive)
# |           5:  depth=2: entries(bb.4 bb.1) bb.2 
# |           6:  depth=1: entries(bb.3 bb.1) bb.4 bb.2 
# | next:7'1      !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   error: match on wrong line
# |           7:  
# |           8: BLOCK bb.0 
# |           9: DEFINITIONS 
# |          10:  %0: %0:_(s32) = G_CONSTANT i32 0 
# |          11:  %1: %1:_(s32) = G_CONSTANT i32 1 
# |           .
# |           .
# |           .
# |          55: DEFINITIONS 
# |          56:  %13: %13:_(s32) = G_ADD %3:_, %1:_ 
# |          57: TERMINATORS 
# |          58:  S_ENDPGM 0 
...

```

</details>

https://github.com/llvm/llvm-project/pull/211715


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