[llvm] [AMDGPU] Handle negated f16 and fp conversion DAG combines (PR #213202)

[via llvm-commits]

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@@ -940,6 +942,40 @@ SDValue AMDGPUTargetLowering::getNegatedExpression(
       return SDValue();
     break;
   }
+  case ISD::FP16_TO_FP: {
+    // If the Users of the Op can handle the negation, defer it for that Op
+    // and do not handle the conversion
+    if (allUsesHaveSourceMods(Op.getNode()))
+      return SDValue();
+
+    SDValue Src = Op.getOperand(0);
+    EVT VT = Op.getValueType();
+    EVT SrcVT = Src.getValueType();
+    SDLoc SL(Op);
+    Cost = NegatibleCost::Neutral;
+    SDValue Negated = DAG.getNode(ISD::XOR, SL, SrcVT, Src,
+                                  DAG.getConstant(0x8000, SL, SrcVT));
+    return DAG.getNode(ISD::FP16_TO_FP, SL, VT, Negated);
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HalfBloodPrince010 wrote:

I was able to verify this case for FP16_TO_FP, legalization replaces `FP_EXTEND` with FP16_TO_FP, and a later DAG-combine calls `getNegatedExpression` which hits the `FP16_TO_FP` switch case, and XOR gets folded in the final assembly. I have added a test for this with `fneg and fdiv`.

https://github.com/llvm/llvm-project/pull/213202