[llvm] [WebAssembly] Add v8f16 select instruction patterns (PR #213280)

[Anutosh Bhat via llvm-commits]

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@@ -948,7 +948,7 @@ defm SELECT_V128 :
   I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs, I32:$cond), (outs), (ins), [],
     "v128.select\t$dst, $lhs, $rhs, $cond", "v128.select", 0x1b>;
 
-foreach vec = StdVecs in {
+foreach vec = AllVecs in {
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anutosh491 wrote:

`v8f16` is covered in `AllVecs` and I believe that was missed here.

https://github.com/llvm/llvm-project/pull/213280