[llvm] [AArch64] SVE Shuffleopt: merge reduction reverse into tbl (PR #206047)

[Graham Hunter via llvm-commits]

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@@ -155,10 +155,130 @@ static void evaluateDeinterleave(IntrinsicInst *I, DeinterleaveMap &Candidates,
   Candidates.try_emplace(I, Extends);
 }
 
+/// Evaluate a reverse intrinsic to see what uses it. We want to find a reverse
+/// that pairs with an extract from a deinterleave, so that we can move the
+/// reverse into the tbl as well as deinterleave and extend. We also need to
+/// confirm that it's only used by single-use instructions, or instructions
+/// used by a phi and a reduction intrinsic outside the loop, where the
+/// reduction permits reassociation. Something like the following:
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huntergr-arm wrote:

Pretty much; the check for the reduction is so that we don't care about the order of the lanes within the vector by the time we reach the final reduction, only that we match the correct lanes against each other with the minimum amount of shuffling inside the loop.

Technically we could also handle the case where we didn't reduce the value escaping the loop, and just reverse the lanes after the loop finished. But I'm not sure how common that would be, outside of revectorization?

https://github.com/llvm/llvm-project/pull/206047