[llvm] 5aec353 - [NFC][PowerPC] add more `copysign` tests (#213236)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 31 04:13:21 PDT 2026
Author: Folkert de Vries
Date: 2026-07-31T13:13:17+02:00
New Revision: 5aec353bd686dbca51755e772971c65ee6ae70f6
URL: https://github.com/llvm/llvm-project/commit/5aec353bd686dbca51755e772971c65ee6ae70f6
DIFF: https://github.com/llvm/llvm-project/commit/5aec353bd686dbca51755e772971c65ee6ae70f6.diff
LOG: [NFC][PowerPC] add more `copysign` tests (#213236)
Added:
Modified:
llvm/test/CodeGen/PowerPC/copysignl.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/copysignl.ll b/llvm/test/CodeGen/PowerPC/copysignl.ll
index 9fdfb8fc548d1..e78038ab183c6 100644
--- a/llvm/test/CodeGen/PowerPC/copysignl.ll
+++ b/llvm/test/CodeGen/PowerPC/copysignl.ll
@@ -1,19 +1,41 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=-vsx < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s -check-prefix=CHECK-VSX
-target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
-target triple = "powerpc64-unknown-linux-gnu"
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=LE
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s -check-prefix=BE
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck %s -check-prefix=BE-VSX
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=BE32
define double @foo_d_ll(ppc_fp128 %a, ppc_fp128 %b) #0 {
-; CHECK-LABEL: foo_d_ll:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: fcpsgn 1, 3, 1
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_d_ll:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: xscpsgndp 1, 3, 1
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_d_ll:
+; LE: # %bb.0: # %entry
+; LE-NEXT: xscpsgndp 1, 3, 1
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_d_ll:
+; BE: # %bb.0: # %entry
+; BE-NEXT: fcpsgn 1, 3, 1
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_d_ll:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: xscpsgndp 1, 3, 1
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_d_ll:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: stwu 1, -16(1)
+; BE32-NEXT: stfd 3, 8(1)
+; BE32-NEXT: lbz 3, 8(1)
+; BE32-NEXT: srwi 3, 3, 7
+; BE32-NEXT: andi. 3, 3, 1
+; BE32-NEXT: bc 12, 1, .LBB0_2
+; BE32-NEXT: # %bb.1: # %entry
+; BE32-NEXT: fabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
+; BE32-NEXT: .LBB0_2:
+; BE32-NEXT: fnabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
entry:
%call = tail call ppc_fp128 @copysignl(ppc_fp128 %a, ppc_fp128 %b) #0
%conv = fptrunc ppc_fp128 %call to double
@@ -21,15 +43,37 @@ entry:
}
define double @foo_d_ll_freeze(ppc_fp128 %a, ppc_fp128 %b) #0 {
-; CHECK-LABEL: foo_d_ll_freeze:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: fcpsgn 1, 3, 1
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_d_ll_freeze:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: xscpsgndp 1, 3, 1
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_d_ll_freeze:
+; LE: # %bb.0: # %entry
+; LE-NEXT: xscpsgndp 1, 3, 1
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_d_ll_freeze:
+; BE: # %bb.0: # %entry
+; BE-NEXT: fcpsgn 1, 3, 1
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_d_ll_freeze:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: xscpsgndp 1, 3, 1
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_d_ll_freeze:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: stwu 1, -16(1)
+; BE32-NEXT: stfd 3, 8(1)
+; BE32-NEXT: lbz 3, 8(1)
+; BE32-NEXT: srwi 3, 3, 7
+; BE32-NEXT: andi. 3, 3, 1
+; BE32-NEXT: bc 12, 1, .LBB1_2
+; BE32-NEXT: # %bb.1: # %entry
+; BE32-NEXT: fabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
+; BE32-NEXT: .LBB1_2:
+; BE32-NEXT: fnabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
entry:
%call = tail call ppc_fp128 @copysignl(ppc_fp128 %a, ppc_fp128 %b) #0
%freeze = freeze ppc_fp128 %call
@@ -40,15 +84,37 @@ entry:
declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0
define double @foo_dl(double %a, ppc_fp128 %b) #0 {
-; CHECK-LABEL: foo_dl:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: fcpsgn 1, 2, 1
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_dl:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: xscpsgndp 1, 2, 1
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_dl:
+; LE: # %bb.0: # %entry
+; LE-NEXT: xscpsgndp 1, 2, 1
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_dl:
+; BE: # %bb.0: # %entry
+; BE-NEXT: fcpsgn 1, 2, 1
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_dl:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: xscpsgndp 1, 2, 1
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_dl:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: stwu 1, -16(1)
+; BE32-NEXT: stfd 2, 8(1)
+; BE32-NEXT: lbz 3, 8(1)
+; BE32-NEXT: srwi 3, 3, 7
+; BE32-NEXT: andi. 3, 3, 1
+; BE32-NEXT: bc 12, 1, .LBB2_2
+; BE32-NEXT: # %bb.1: # %entry
+; BE32-NEXT: fabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
+; BE32-NEXT: .LBB2_2:
+; BE32-NEXT: fnabs 1, 1
+; BE32-NEXT: addi 1, 1, 16
+; BE32-NEXT: blr
entry:
%conv = fptrunc ppc_fp128 %b to double
%call = tail call double @copysign(double %a, double %conv) #0
@@ -58,34 +124,88 @@ entry:
declare double @copysign(double, double) #0
define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 {
-; CHECK-LABEL: foo_ll:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: mflr 0
-; CHECK-NEXT: stdu 1, -112(1)
-; CHECK-NEXT: fmr 3, 2
-; CHECK-NEXT: addis 3, 2, .LCPI3_0 at toc@ha
-; CHECK-NEXT: std 0, 128(1)
-; CHECK-NEXT: lfs 2, .LCPI3_0 at toc@l(3)
-; CHECK-NEXT: bl copysignl
-; CHECK-NEXT: nop
-; CHECK-NEXT: addi 1, 1, 112
-; CHECK-NEXT: ld 0, 16(1)
-; CHECK-NEXT: mtlr 0
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_ll:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: mflr 0
-; CHECK-VSX-NEXT: stdu 1, -112(1)
-; CHECK-VSX-NEXT: fmr 3, 2
-; CHECK-VSX-NEXT: xxlxor 2, 2, 2
-; CHECK-VSX-NEXT: std 0, 128(1)
-; CHECK-VSX-NEXT: bl copysignl
-; CHECK-VSX-NEXT: nop
-; CHECK-VSX-NEXT: addi 1, 1, 112
-; CHECK-VSX-NEXT: ld 0, 16(1)
-; CHECK-VSX-NEXT: mtlr 0
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_ll:
+; LE: # %bb.0: # %entry
+; LE-NEXT: mflr 0
+; LE-NEXT: stdu 1, -32(1)
+; LE-NEXT: fmr 3, 2
+; LE-NEXT: xxlxor 2, 2, 2
+; LE-NEXT: std 0, 48(1)
+; LE-NEXT: bl copysignl
+; LE-NEXT: nop
+; LE-NEXT: addi 1, 1, 32
+; LE-NEXT: ld 0, 16(1)
+; LE-NEXT: mtlr 0
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_ll:
+; BE: # %bb.0: # %entry
+; BE-NEXT: mflr 0
+; BE-NEXT: stdu 1, -112(1)
+; BE-NEXT: fmr 3, 2
+; BE-NEXT: addis 3, 2, .LCPI3_0 at toc@ha
+; BE-NEXT: std 0, 128(1)
+; BE-NEXT: lfs 2, .LCPI3_0 at toc@l(3)
+; BE-NEXT: bl copysignl
+; BE-NEXT: nop
+; BE-NEXT: addi 1, 1, 112
+; BE-NEXT: ld 0, 16(1)
+; BE-NEXT: mtlr 0
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_ll:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: mflr 0
+; BE-VSX-NEXT: stdu 1, -112(1)
+; BE-VSX-NEXT: fmr 3, 2
+; BE-VSX-NEXT: xxlxor 2, 2, 2
+; BE-VSX-NEXT: std 0, 128(1)
+; BE-VSX-NEXT: bl copysignl
+; BE-VSX-NEXT: nop
+; BE-VSX-NEXT: addi 1, 1, 112
+; BE-VSX-NEXT: ld 0, 16(1)
+; BE-VSX-NEXT: mtlr 0
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_ll:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: mflr 0
+; BE32-NEXT: stwu 1, -96(1)
+; BE32-NEXT: stw 0, 100(1)
+; BE32-NEXT: li 3, 0
+; BE32-NEXT: stfd 1, 32(1)
+; BE32-NEXT: stw 3, 44(1)
+; BE32-NEXT: stw 3, 40(1)
+; BE32-NEXT: lwz 3, 36(1)
+; BE32-NEXT: stfd 2, 56(1)
+; BE32-NEXT: stw 3, 52(1)
+; BE32-NEXT: lwz 3, 32(1)
+; BE32-NEXT: lfd 4, 64(1)
+; BE32-NEXT: stw 3, 48(1)
+; BE32-NEXT: lwz 3, 60(1)
+; BE32-NEXT: lfd 2, 40(1)
+; BE32-NEXT: stw 3, 76(1)
+; BE32-NEXT: lwz 3, 56(1)
+; BE32-NEXT: lfd 1, 48(1)
+; BE32-NEXT: stw 3, 72(1)
+; BE32-NEXT: lfd 3, 72(1)
+; BE32-NEXT: bl copysignl
+; BE32-NEXT: stfd 1, 16(1)
+; BE32-NEXT: lwz 3, 20(1)
+; BE32-NEXT: stfd 2, 24(1)
+; BE32-NEXT: stw 3, 92(1)
+; BE32-NEXT: lwz 3, 16(1)
+; BE32-NEXT: stw 3, 88(1)
+; BE32-NEXT: lwz 3, 28(1)
+; BE32-NEXT: lfd 1, 88(1)
+; BE32-NEXT: stw 3, 84(1)
+; BE32-NEXT: lwz 3, 24(1)
+; BE32-NEXT: stw 3, 80(1)
+; BE32-NEXT: lfd 2, 80(1)
+; BE32-NEXT: lwz 0, 100(1)
+; BE32-NEXT: addi 1, 1, 96
+; BE32-NEXT: mtlr 0
+; BE32-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
%call = tail call ppc_fp128 @copysignl(ppc_fp128 %conv, ppc_fp128 %b) #0
@@ -93,34 +213,82 @@ entry:
}
define ppc_fp128 @foo_ld(double %a, double %b) #0 {
-; CHECK-LABEL: foo_ld:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: mflr 0
-; CHECK-NEXT: stdu 1, -112(1)
-; CHECK-NEXT: fmr 3, 2
-; CHECK-NEXT: addis 3, 2, .LCPI4_0 at toc@ha
-; CHECK-NEXT: std 0, 128(1)
-; CHECK-NEXT: lfs 2, .LCPI4_0 at toc@l(3)
-; CHECK-NEXT: bl copysignl
-; CHECK-NEXT: nop
-; CHECK-NEXT: addi 1, 1, 112
-; CHECK-NEXT: ld 0, 16(1)
-; CHECK-NEXT: mtlr 0
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_ld:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: mflr 0
-; CHECK-VSX-NEXT: stdu 1, -112(1)
-; CHECK-VSX-NEXT: fmr 3, 2
-; CHECK-VSX-NEXT: xxlxor 2, 2, 2
-; CHECK-VSX-NEXT: std 0, 128(1)
-; CHECK-VSX-NEXT: bl copysignl
-; CHECK-VSX-NEXT: nop
-; CHECK-VSX-NEXT: addi 1, 1, 112
-; CHECK-VSX-NEXT: ld 0, 16(1)
-; CHECK-VSX-NEXT: mtlr 0
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_ld:
+; LE: # %bb.0: # %entry
+; LE-NEXT: mflr 0
+; LE-NEXT: stdu 1, -32(1)
+; LE-NEXT: fmr 3, 2
+; LE-NEXT: xxlxor 2, 2, 2
+; LE-NEXT: std 0, 48(1)
+; LE-NEXT: bl copysignl
+; LE-NEXT: nop
+; LE-NEXT: addi 1, 1, 32
+; LE-NEXT: ld 0, 16(1)
+; LE-NEXT: mtlr 0
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_ld:
+; BE: # %bb.0: # %entry
+; BE-NEXT: mflr 0
+; BE-NEXT: stdu 1, -112(1)
+; BE-NEXT: fmr 3, 2
+; BE-NEXT: addis 3, 2, .LCPI4_0 at toc@ha
+; BE-NEXT: std 0, 128(1)
+; BE-NEXT: lfs 2, .LCPI4_0 at toc@l(3)
+; BE-NEXT: bl copysignl
+; BE-NEXT: nop
+; BE-NEXT: addi 1, 1, 112
+; BE-NEXT: ld 0, 16(1)
+; BE-NEXT: mtlr 0
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_ld:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: mflr 0
+; BE-VSX-NEXT: stdu 1, -112(1)
+; BE-VSX-NEXT: fmr 3, 2
+; BE-VSX-NEXT: xxlxor 2, 2, 2
+; BE-VSX-NEXT: std 0, 128(1)
+; BE-VSX-NEXT: bl copysignl
+; BE-VSX-NEXT: nop
+; BE-VSX-NEXT: addi 1, 1, 112
+; BE-VSX-NEXT: ld 0, 16(1)
+; BE-VSX-NEXT: mtlr 0
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_ld:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: mflr 0
+; BE32-NEXT: stwu 1, -64(1)
+; BE32-NEXT: stw 0, 68(1)
+; BE32-NEXT: li 3, 0
+; BE32-NEXT: stfd 1, 24(1)
+; BE32-NEXT: fmr 3, 2
+; BE32-NEXT: stw 3, 36(1)
+; BE32-NEXT: stw 3, 32(1)
+; BE32-NEXT: lwz 3, 28(1)
+; BE32-NEXT: lfd 2, 32(1)
+; BE32-NEXT: stw 3, 44(1)
+; BE32-NEXT: lwz 3, 24(1)
+; BE32-NEXT: stw 3, 40(1)
+; BE32-NEXT: lfd 1, 40(1)
+; BE32-NEXT: bl copysignl
+; BE32-NEXT: stfd 1, 8(1)
+; BE32-NEXT: lwz 3, 12(1)
+; BE32-NEXT: stfd 2, 16(1)
+; BE32-NEXT: stw 3, 60(1)
+; BE32-NEXT: lwz 3, 8(1)
+; BE32-NEXT: stw 3, 56(1)
+; BE32-NEXT: lwz 3, 20(1)
+; BE32-NEXT: lfd 1, 56(1)
+; BE32-NEXT: stw 3, 52(1)
+; BE32-NEXT: lwz 3, 16(1)
+; BE32-NEXT: stw 3, 48(1)
+; BE32-NEXT: lfd 2, 48(1)
+; BE32-NEXT: lwz 0, 68(1)
+; BE32-NEXT: addi 1, 1, 64
+; BE32-NEXT: mtlr 0
+; BE32-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
%conv1 = fpext double %b to ppc_fp128
@@ -129,34 +297,82 @@ entry:
}
define ppc_fp128 @foo_lf(double %a, float %b) #0 {
-; CHECK-LABEL: foo_lf:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: mflr 0
-; CHECK-NEXT: stdu 1, -112(1)
-; CHECK-NEXT: fmr 3, 2
-; CHECK-NEXT: addis 3, 2, .LCPI5_0 at toc@ha
-; CHECK-NEXT: std 0, 128(1)
-; CHECK-NEXT: lfs 2, .LCPI5_0 at toc@l(3)
-; CHECK-NEXT: bl copysignl
-; CHECK-NEXT: nop
-; CHECK-NEXT: addi 1, 1, 112
-; CHECK-NEXT: ld 0, 16(1)
-; CHECK-NEXT: mtlr 0
-; CHECK-NEXT: blr
-;
-; CHECK-VSX-LABEL: foo_lf:
-; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: mflr 0
-; CHECK-VSX-NEXT: stdu 1, -112(1)
-; CHECK-VSX-NEXT: fmr 3, 2
-; CHECK-VSX-NEXT: xxlxor 2, 2, 2
-; CHECK-VSX-NEXT: std 0, 128(1)
-; CHECK-VSX-NEXT: bl copysignl
-; CHECK-VSX-NEXT: nop
-; CHECK-VSX-NEXT: addi 1, 1, 112
-; CHECK-VSX-NEXT: ld 0, 16(1)
-; CHECK-VSX-NEXT: mtlr 0
-; CHECK-VSX-NEXT: blr
+; LE-LABEL: foo_lf:
+; LE: # %bb.0: # %entry
+; LE-NEXT: mflr 0
+; LE-NEXT: stdu 1, -32(1)
+; LE-NEXT: fmr 3, 2
+; LE-NEXT: xxlxor 2, 2, 2
+; LE-NEXT: std 0, 48(1)
+; LE-NEXT: bl copysignl
+; LE-NEXT: nop
+; LE-NEXT: addi 1, 1, 32
+; LE-NEXT: ld 0, 16(1)
+; LE-NEXT: mtlr 0
+; LE-NEXT: blr
+;
+; BE-LABEL: foo_lf:
+; BE: # %bb.0: # %entry
+; BE-NEXT: mflr 0
+; BE-NEXT: stdu 1, -112(1)
+; BE-NEXT: fmr 3, 2
+; BE-NEXT: addis 3, 2, .LCPI5_0 at toc@ha
+; BE-NEXT: std 0, 128(1)
+; BE-NEXT: lfs 2, .LCPI5_0 at toc@l(3)
+; BE-NEXT: bl copysignl
+; BE-NEXT: nop
+; BE-NEXT: addi 1, 1, 112
+; BE-NEXT: ld 0, 16(1)
+; BE-NEXT: mtlr 0
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: foo_lf:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: mflr 0
+; BE-VSX-NEXT: stdu 1, -112(1)
+; BE-VSX-NEXT: fmr 3, 2
+; BE-VSX-NEXT: xxlxor 2, 2, 2
+; BE-VSX-NEXT: std 0, 128(1)
+; BE-VSX-NEXT: bl copysignl
+; BE-VSX-NEXT: nop
+; BE-VSX-NEXT: addi 1, 1, 112
+; BE-VSX-NEXT: ld 0, 16(1)
+; BE-VSX-NEXT: mtlr 0
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: foo_lf:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: mflr 0
+; BE32-NEXT: stwu 1, -64(1)
+; BE32-NEXT: stw 0, 68(1)
+; BE32-NEXT: li 3, 0
+; BE32-NEXT: stfd 1, 24(1)
+; BE32-NEXT: fmr 3, 2
+; BE32-NEXT: stw 3, 36(1)
+; BE32-NEXT: stw 3, 32(1)
+; BE32-NEXT: lwz 3, 28(1)
+; BE32-NEXT: lfd 2, 32(1)
+; BE32-NEXT: stw 3, 44(1)
+; BE32-NEXT: lwz 3, 24(1)
+; BE32-NEXT: stw 3, 40(1)
+; BE32-NEXT: lfd 1, 40(1)
+; BE32-NEXT: bl copysignl
+; BE32-NEXT: stfd 1, 8(1)
+; BE32-NEXT: lwz 3, 12(1)
+; BE32-NEXT: stfd 2, 16(1)
+; BE32-NEXT: stw 3, 60(1)
+; BE32-NEXT: lwz 3, 8(1)
+; BE32-NEXT: stw 3, 56(1)
+; BE32-NEXT: lwz 3, 20(1)
+; BE32-NEXT: lfd 1, 56(1)
+; BE32-NEXT: stw 3, 52(1)
+; BE32-NEXT: lwz 3, 16(1)
+; BE32-NEXT: stw 3, 48(1)
+; BE32-NEXT: lfd 2, 48(1)
+; BE32-NEXT: lwz 0, 68(1)
+; BE32-NEXT: addi 1, 1, 64
+; BE32-NEXT: mtlr 0
+; BE32-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
%conv1 = fpext float %b to ppc_fp128
@@ -164,5 +380,112 @@ entry:
ret ppc_fp128 %call
}
-attributes #0 = { nounwind readnone }
+define ppc_fp128 @copysign_signmask(ppc_fp128 %x, i1 %s) {
+; LE-LABEL: copysign_signmask:
+; LE: # %bb.0: # %entry
+; LE-NEXT: mflr 0
+; LE-NEXT: stdu 1, -32(1)
+; LE-NEXT: std 0, 48(1)
+; LE-NEXT: .cfi_def_cfa_offset 32
+; LE-NEXT: .cfi_offset lr, 16
+; LE-NEXT: sldi 3, 5, 63
+; LE-NEXT: xxlxor 3, 3, 3
+; LE-NEXT: mtfprd 4, 3
+; LE-NEXT: bl copysignl
+; LE-NEXT: nop
+; LE-NEXT: addi 1, 1, 32
+; LE-NEXT: ld 0, 16(1)
+; LE-NEXT: mtlr 0
+; LE-NEXT: blr
+;
+; BE-LABEL: copysign_signmask:
+; BE: # %bb.0: # %entry
+; BE-NEXT: mflr 0
+; BE-NEXT: stdu 1, -128(1)
+; BE-NEXT: std 0, 144(1)
+; BE-NEXT: .cfi_def_cfa_offset 128
+; BE-NEXT: .cfi_offset lr, 16
+; BE-NEXT: sldi 3, 5, 63
+; BE-NEXT: std 3, 120(1)
+; BE-NEXT: addis 3, 2, .LCPI6_0 at toc@ha
+; BE-NEXT: lfd 3, 120(1)
+; BE-NEXT: lfs 4, .LCPI6_0 at toc@l(3)
+; BE-NEXT: bl copysignl
+; BE-NEXT: nop
+; BE-NEXT: addi 1, 1, 128
+; BE-NEXT: ld 0, 16(1)
+; BE-NEXT: mtlr 0
+; BE-NEXT: blr
+;
+; BE-VSX-LABEL: copysign_signmask:
+; BE-VSX: # %bb.0: # %entry
+; BE-VSX-NEXT: mflr 0
+; BE-VSX-NEXT: stdu 1, -128(1)
+; BE-VSX-NEXT: std 0, 144(1)
+; BE-VSX-NEXT: .cfi_def_cfa_offset 128
+; BE-VSX-NEXT: .cfi_offset lr, 16
+; BE-VSX-NEXT: sldi 3, 5, 63
+; BE-VSX-NEXT: xxlxor 4, 4, 4
+; BE-VSX-NEXT: std 3, 120(1)
+; BE-VSX-NEXT: lfd 3, 120(1)
+; BE-VSX-NEXT: bl copysignl
+; BE-VSX-NEXT: nop
+; BE-VSX-NEXT: addi 1, 1, 128
+; BE-VSX-NEXT: ld 0, 16(1)
+; BE-VSX-NEXT: mtlr 0
+; BE-VSX-NEXT: blr
+;
+; BE32-LABEL: copysign_signmask:
+; BE32: # %bb.0: # %entry
+; BE32-NEXT: mflr 0
+; BE32-NEXT: stwu 1, -96(1)
+; BE32-NEXT: stw 0, 100(1)
+; BE32-NEXT: .cfi_def_cfa_offset 96
+; BE32-NEXT: .cfi_offset lr, 4
+; BE32-NEXT: stfd 1, 40(1)
+; BE32-NEXT: slwi 3, 3, 31
+; BE32-NEXT: stw 3, 64(1)
+; BE32-NEXT: li 4, 0
+; BE32-NEXT: lwz 3, 44(1)
+; BE32-NEXT: stfd 2, 32(1)
+; BE32-NEXT: stw 3, 60(1)
+; BE32-NEXT: lwz 3, 40(1)
+; BE32-NEXT: stw 4, 76(1)
+; BE32-NEXT: stw 3, 56(1)
+; BE32-NEXT: lwz 3, 36(1)
+; BE32-NEXT: stw 4, 72(1)
+; BE32-NEXT: stw 3, 52(1)
+; BE32-NEXT: lwz 3, 32(1)
+; BE32-NEXT: stw 4, 68(1)
+; BE32-NEXT: stw 3, 48(1)
+; BE32-NEXT: lfd 4, 72(1)
+; BE32-NEXT: lfd 3, 64(1)
+; BE32-NEXT: lfd 1, 56(1)
+; BE32-NEXT: lfd 2, 48(1)
+; BE32-NEXT: bl copysignl
+; BE32-NEXT: stfd 1, 8(1)
+; BE32-NEXT: lwz 3, 12(1)
+; BE32-NEXT: stfd 2, 16(1)
+; BE32-NEXT: stw 3, 92(1)
+; BE32-NEXT: lwz 3, 8(1)
+; BE32-NEXT: stw 3, 88(1)
+; BE32-NEXT: lwz 3, 20(1)
+; BE32-NEXT: lfd 1, 88(1)
+; BE32-NEXT: stw 3, 84(1)
+; BE32-NEXT: lwz 3, 16(1)
+; BE32-NEXT: stw 3, 80(1)
+; BE32-NEXT: lfd 2, 80(1)
+; BE32-NEXT: lwz 0, 100(1)
+; BE32-NEXT: addi 1, 1, 96
+; BE32-NEXT: mtlr 0
+; BE32-NEXT: blr
+entry:
+ %a = call ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128 %x)
+ %z = zext i1 %s to i128
+ %sh = shl i128 %z, 127
+ %y = bitcast i128 %sh to ppc_fp128
+ %c = call ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128 %a, ppc_fp128 %y)
+ ret ppc_fp128 %c
+}
+attributes #0 = { nounwind readnone }
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