[llvm] 5b1539c - [AArch64][GlobalISel] Update prelegalize tests with concrete types. NFC (#213199)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 30 21:54:03 PDT 2026
Author: David Green
Date: 2026-07-31T05:53:58+01:00
New Revision: 5b1539c0fca2e3f9362d100848983a3cc4272764
URL: https://github.com/llvm/llvm-project/commit/5b1539c0fca2e3f9362d100848983a3cc4272764
DIFF: https://github.com/llvm/llvm-project/commit/5b1539c0fca2e3f9362d100848983a3cc4272764.diff
LOG: [AArch64][GlobalISel] Update prelegalize tests with concrete types. NFC (#213199)
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-addo-zero.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-binop-reassoc.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-mulo-zero.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-narrow-binop-feeding-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-funnel-shifts-to-rotates.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-simplify-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-addo-zero.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-addo-zero.mir
index 9483cbf06f405..aa782e6aa7405 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-addo-zero.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-addo-zero.mir
@@ -14,18 +14,18 @@ body: |
; CHECK-LABEL: name: uadd_zero
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(s32) = COPY $w0
- ; CHECK-NEXT: %add:_(s32) = COPY %lhs(s32)
- ; CHECK-NEXT: %o:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1)
- ; CHECK-NEXT: $w0 = COPY %add(s32)
- ; CHECK-NEXT: $w1 = COPY %o_wide(s32)
+ ; CHECK-NEXT: %lhs:_(i32) = COPY $w0
+ ; CHECK-NEXT: %add:_(i32) = COPY %lhs(i32)
+ ; CHECK-NEXT: %o:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %o_wide:_(i32) = G_ZEXT %o(i1)
+ ; CHECK-NEXT: $w0 = COPY %add(i32)
+ ; CHECK-NEXT: $w1 = COPY %o_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %add:_(s32), %o:_(s1) = G_UADDO %lhs, %zero
- %o_wide:_(s32) = G_ZEXT %o(s1)
- $w0 = COPY %add(s32)
+ %lhs:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %add:_(i32), %o:_(i1) = G_UADDO %lhs, %zero
+ %o_wide:_(i32) = G_ZEXT %o(i1)
+ $w0 = COPY %add(i32)
$w1 = COPY %o_wide
RET_ReallyLR implicit $w0
...
@@ -38,18 +38,18 @@ body: |
; CHECK-LABEL: name: sadd_zero
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(s32) = COPY $w0
- ; CHECK-NEXT: %add:_(s32) = COPY %lhs(s32)
- ; CHECK-NEXT: %o:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1)
- ; CHECK-NEXT: $w0 = COPY %add(s32)
- ; CHECK-NEXT: $w1 = COPY %o_wide(s32)
+ ; CHECK-NEXT: %lhs:_(i32) = COPY $w0
+ ; CHECK-NEXT: %add:_(i32) = COPY %lhs(i32)
+ ; CHECK-NEXT: %o:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %o_wide:_(i32) = G_ZEXT %o(i1)
+ ; CHECK-NEXT: $w0 = COPY %add(i32)
+ ; CHECK-NEXT: $w1 = COPY %o_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %add:_(s32), %o:_(s1) = G_SADDO %lhs, %zero
- %o_wide:_(s32) = G_ZEXT %o(s1)
- $w0 = COPY %add(s32)
+ %lhs:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %add:_(i32), %o:_(i1) = G_SADDO %lhs, %zero
+ %o_wide:_(i32) = G_ZEXT %o(i1)
+ $w0 = COPY %add(i32)
$w1 = COPY %o_wide
RET_ReallyLR implicit $w0
...
@@ -62,18 +62,18 @@ body: |
; CHECK-LABEL: name: wrong_cst
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(s32) = COPY $w0
- ; CHECK-NEXT: %not_zero:_(s32) = G_CONSTANT i32 3
- ; CHECK-NEXT: %add:_(s32), %o:_(s1) = G_UADDO %lhs, %not_zero
- ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1)
- ; CHECK-NEXT: $w0 = COPY %add(s32)
- ; CHECK-NEXT: $w1 = COPY %o_wide(s32)
+ ; CHECK-NEXT: %lhs:_(i32) = COPY $w0
+ ; CHECK-NEXT: %not_zero:_(i32) = G_CONSTANT i32 3
+ ; CHECK-NEXT: %add:_(i32), %o:_(i1) = G_UADDO %lhs, %not_zero
+ ; CHECK-NEXT: %o_wide:_(i32) = G_ZEXT %o(i1)
+ ; CHECK-NEXT: $w0 = COPY %add(i32)
+ ; CHECK-NEXT: $w1 = COPY %o_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %not_zero:_(s32) = G_CONSTANT i32 3
- %add:_(s32), %o:_(s1) = G_UADDO %lhs, %not_zero
- %o_wide:_(s32) = G_ZEXT %o(s1)
- $w0 = COPY %add(s32)
+ %lhs:_(i32) = COPY $w0
+ %not_zero:_(i32) = G_CONSTANT i32 3
+ %add:_(i32), %o:_(i1) = G_UADDO %lhs, %not_zero
+ %o_wide:_(i32) = G_ZEXT %o(i1)
+ $w0 = COPY %add(i32)
$w1 = COPY %o_wide
RET_ReallyLR implicit $w0
...
@@ -86,23 +86,23 @@ body: |
; CHECK-LABEL: name: uadd_vec_zero
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %add:_(<2 x s64>) = COPY %lhs(<2 x s64>)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %o:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o(<2 x s1>), %zero(s64)
- ; CHECK-NEXT: %o_wide:_(s64) = G_ZEXT %o_elt_0(s1)
- ; CHECK-NEXT: $q0 = COPY %add(<2 x s64>)
- ; CHECK-NEXT: $x0 = COPY %o_wide(s64)
+ ; CHECK-NEXT: %lhs:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: %zero:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %add:_(<2 x i64>) = COPY %lhs(<2 x i64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %o:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %o_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %o(<2 x i1>), %zero(i64)
+ ; CHECK-NEXT: %o_wide:_(i64) = G_ZEXT %o_elt_0(i1)
+ ; CHECK-NEXT: $q0 = COPY %add(<2 x i64>)
+ ; CHECK-NEXT: $x0 = COPY %o_wide(i64)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %lhs:_(<2 x s64>) = COPY $q0
- %zero:_(s64) = G_CONSTANT i64 0
- %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
- %add:_(<2 x s64>), %o:_(<2 x s1>) = G_UADDO %lhs, %zero_vec
- %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x s1>), %zero:_(s64)
- %o_wide:_(s64) = G_ZEXT %o_elt_0
- $q0 = COPY %add(<2 x s64>)
+ %lhs:_(<2 x i64>) = COPY $q0
+ %zero:_(i64) = G_CONSTANT i64 0
+ %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero, %zero
+ %add:_(<2 x i64>), %o:_(<2 x i1>) = G_UADDO %lhs, %zero_vec
+ %o_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x i1>), %zero:_(i64)
+ %o_wide:_(i64) = G_ZEXT %o_elt_0
+ $q0 = COPY %add(<2 x i64>)
$x0 = COPY %o_wide
RET_ReallyLR implicit $q0
...
@@ -115,22 +115,22 @@ body: |
; CHECK-LABEL: name: sadd_vec_zero
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %add:_(<2 x s64>) = COPY %lhs(<2 x s64>)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %o:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o(<2 x s1>), %zero(s64)
- ; CHECK-NEXT: %o_wide:_(s64) = G_ZEXT %o_elt_0(s1)
- ; CHECK-NEXT: $q0 = COPY %add(<2 x s64>)
- ; CHECK-NEXT: $x0 = COPY %o_wide(s64)
+ ; CHECK-NEXT: %lhs:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: %zero:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %add:_(<2 x i64>) = COPY %lhs(<2 x i64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %o:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %o_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %o(<2 x i1>), %zero(i64)
+ ; CHECK-NEXT: %o_wide:_(i64) = G_ZEXT %o_elt_0(i1)
+ ; CHECK-NEXT: $q0 = COPY %add(<2 x i64>)
+ ; CHECK-NEXT: $x0 = COPY %o_wide(i64)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %lhs:_(<2 x s64>) = COPY $q0
- %zero:_(s64) = G_CONSTANT i64 0
- %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
- %add:_(<2 x s64>), %o:_(<2 x s1>) = G_SADDO %lhs, %zero_vec
- %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x s1>), %zero:_(s64)
- %o_wide:_(s64) = G_ZEXT %o_elt_0
- $q0 = COPY %add(<2 x s64>)
+ %lhs:_(<2 x i64>) = COPY $q0
+ %zero:_(i64) = G_CONSTANT i64 0
+ %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero, %zero
+ %add:_(<2 x i64>), %o:_(<2 x i1>) = G_SADDO %lhs, %zero_vec
+ %o_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x i1>), %zero:_(i64)
+ %o_wide:_(i64) = G_ZEXT %o_elt_0
+ $q0 = COPY %add(<2 x i64>)
$x0 = COPY %o_wide
RET_ReallyLR implicit $q0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-binop-reassoc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-binop-reassoc.mir
index f1676e48e5113..23ffa1793a02f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-binop-reassoc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-binop-reassoc.mir
@@ -15,16 +15,16 @@ body: |
; CHECK-LABEL: name: test1_add_move_inner_cst_to_fold
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 88
- ; CHECK-NEXT: %add_outer:_(s64) = G_ADD %x, [[C]]
- ; CHECK-NEXT: $x0 = COPY %add_outer(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 88
+ ; CHECK-NEXT: %add_outer:_(i64) = G_ADD %x, [[C]]
+ ; CHECK-NEXT: $x0 = COPY %add_outer(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %C1:_(s64) = G_CONSTANT i64 64
- %C2:_(s64) = G_CONSTANT i64 24
- %add_inner:_(s64) = G_ADD %x, %C1
- %add_outer:_(s64) = G_ADD %add_inner, %C2
+ %x:_(i64) = COPY $x0
+ %C1:_(i64) = G_CONSTANT i64 64
+ %C2:_(i64) = G_CONSTANT i64 24
+ %add_inner:_(i64) = G_ADD %x, %C1
+ %add_outer:_(i64) = G_ADD %add_inner, %C2
$x0 = COPY %add_outer
RET_ReallyLR implicit $x0
@@ -44,18 +44,18 @@ body: |
; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD %x, %y
- ; CHECK-NEXT: %add_outer:_(s64) = G_ADD [[ADD]], %C1
- ; CHECK-NEXT: $x0 = COPY %add_outer(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %C1:_(i64) = G_CONSTANT i64 64
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i64) = G_ADD %x, %y
+ ; CHECK-NEXT: %add_outer:_(i64) = G_ADD [[ADD]], %C1
+ ; CHECK-NEXT: $x0 = COPY %add_outer(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %C1:_(s64) = G_CONSTANT i64 64
- %y:_(s64) = COPY $x1
- %add_inner:_(s64) = G_ADD %x, %C1
- %add_outer:_(s64) = G_ADD %add_inner, %y
+ %x:_(i64) = COPY $x0
+ %C1:_(i64) = G_CONSTANT i64 64
+ %y:_(i64) = COPY $x1
+ %add_inner:_(i64) = G_ADD %x, %C1
+ %add_outer:_(i64) = G_ADD %add_inner, %y
$x0 = COPY %add_outer
RET_ReallyLR implicit $x0
@@ -73,19 +73,19 @@ body: |
; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs_multiuse
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %add_inner:_(s64) = G_ADD %x, %C1
- ; CHECK-NEXT: %add_outer:_(s64) = G_ADD %add_inner, %y
- ; CHECK-NEXT: $x0 = COPY %add_outer(s64)
- ; CHECK-NEXT: $x1 = COPY %add_inner(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %C1:_(i64) = G_CONSTANT i64 64
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %add_inner:_(i64) = G_ADD %x, %C1
+ ; CHECK-NEXT: %add_outer:_(i64) = G_ADD %add_inner, %y
+ ; CHECK-NEXT: $x0 = COPY %add_outer(i64)
+ ; CHECK-NEXT: $x1 = COPY %add_inner(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %C1:_(s64) = G_CONSTANT i64 64
- %y:_(s64) = COPY $x1
- %add_inner:_(s64) = G_ADD %x, %C1
- %add_outer:_(s64) = G_ADD %add_inner, %y
+ %x:_(i64) = COPY $x0
+ %C1:_(i64) = G_CONSTANT i64 64
+ %y:_(i64) = COPY $x1
+ %add_inner:_(i64) = G_ADD %x, %C1
+ %add_outer:_(i64) = G_ADD %add_inner, %y
$x0 = COPY %add_outer
$x1 = COPY %add_inner
RET_ReallyLR implicit $x0
@@ -104,20 +104,20 @@ body: |
; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs_vector
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: %VEC_C1:_(<2 x s64>) = G_BUILD_VECTOR %C1(s64), %C1(s64)
- ; CHECK-NEXT: %y:_(<2 x s64>) = COPY $q1
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s64>) = G_ADD %x, %y
- ; CHECK-NEXT: %add_outer:_(<2 x s64>) = G_ADD [[ADD]], %VEC_C1
- ; CHECK-NEXT: $q0 = COPY %add_outer(<2 x s64>)
+ ; CHECK-NEXT: %x:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: %C1:_(i64) = G_CONSTANT i64 64
+ ; CHECK-NEXT: %VEC_C1:_(<2 x i64>) = G_BUILD_VECTOR %C1(i64), %C1(i64)
+ ; CHECK-NEXT: %y:_(<2 x i64>) = COPY $q1
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x i64>) = G_ADD %x, %y
+ ; CHECK-NEXT: %add_outer:_(<2 x i64>) = G_ADD [[ADD]], %VEC_C1
+ ; CHECK-NEXT: $q0 = COPY %add_outer(<2 x i64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %x:_(<2 x s64>) = COPY $q0
- %C1:_(s64) = G_CONSTANT i64 64
- %VEC_C1:_(<2 x s64>) = G_BUILD_VECTOR %C1, %C1
- %y:_(<2 x s64>) = COPY $q1
- %add_inner:_(<2 x s64>) = G_ADD %x, %VEC_C1
- %add_outer:_(<2 x s64>) = G_ADD %add_inner, %y
+ %x:_(<2 x i64>) = COPY $q0
+ %C1:_(i64) = G_CONSTANT i64 64
+ %VEC_C1:_(<2 x i64>) = G_BUILD_VECTOR %C1, %C1
+ %y:_(<2 x i64>) = COPY $q1
+ %add_inner:_(<2 x i64>) = G_ADD %x, %VEC_C1
+ %add_outer:_(<2 x i64>) = G_ADD %add_inner, %y
$q0 = COPY %add_outer
RET_ReallyLR implicit $q0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
index a87ff305d1535..35901659ccb95 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
@@ -8,25 +8,25 @@ tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: test
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s16) = G_CONSTANT i16 0
- %2:_(s1) = G_CONSTANT i1 true
- %1:_(s1) = G_ICMP intpred(sge), %0(s16), %0
- %3:_(s8) = G_SEXT %2(s1)
- %4:_(s32) = G_SEXT %3(s8)
- %5:_(s32) = G_SEXT %1(s1)
- %6:_(s32) = G_UDIV %4, %5
- %7:_(s32) = COPY %5(s32)
- %8:_(s32) = G_SEXT %2(s1)
- %9:_(s32) = G_UREM %7, %8
- %10:_(s8) = G_TRUNC %9(s32)
- %11:_(s64) = G_ZEXT %6(s32)
- %12:_(s64) = G_SEXT %10(s8)
- %13:_(s64) = G_OR %11, %12
- %14:_(s32) = G_TRUNC %13(s64)
- $w0 = COPY %14(s32)
+ %0:_(i16) = G_CONSTANT i16 0
+ %2:_(i1) = G_CONSTANT i1 true
+ %1:_(i1) = G_ICMP intpred(sge), %0(i16), %0
+ %3:_(i8) = G_SEXT %2(i1)
+ %4:_(i32) = G_SEXT %3(i8)
+ %5:_(i32) = G_SEXT %1(i1)
+ %6:_(i32) = G_UDIV %4, %5
+ %7:_(i32) = COPY %5(i32)
+ %8:_(i32) = G_SEXT %2(i1)
+ %9:_(i32) = G_UREM %7, %8
+ %10:_(i8) = G_TRUNC %9(i32)
+ %11:_(i64) = G_ZEXT %6(i32)
+ %12:_(i64) = G_SEXT %10(i8)
+ %13:_(i64) = G_OR %11, %12
+ %14:_(i32) = G_TRUNC %13(i64)
+ $w0 = COPY %14(i32)
RET_ReallyLR implicit $w0
...
@@ -39,25 +39,25 @@ tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: test_inverted_div_rem
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s16) = G_CONSTANT i16 0
- %2:_(s1) = G_CONSTANT i1 true
- %1:_(s1) = G_ICMP intpred(sge), %0(s16), %0
- %3:_(s8) = G_SEXT %2(s1)
- %4:_(s32) = G_SEXT %3(s8)
- %5:_(s32) = G_SEXT %1(s1)
- %6:_(s32) = G_UREM %4, %5
- %7:_(s32) = COPY %5(s32)
- %8:_(s32) = G_SEXT %2(s1)
- %9:_(s32) = G_UDIV %7, %8
- %10:_(s8) = G_TRUNC %9(s32)
- %11:_(s64) = G_ZEXT %6(s32)
- %12:_(s64) = G_SEXT %10(s8)
- %13:_(s64) = G_OR %11, %12
- %14:_(s32) = G_TRUNC %13(s64)
- $w0 = COPY %14(s32)
+ %0:_(i16) = G_CONSTANT i16 0
+ %2:_(i1) = G_CONSTANT i1 true
+ %1:_(i1) = G_ICMP intpred(sge), %0(i16), %0
+ %3:_(i8) = G_SEXT %2(i1)
+ %4:_(i32) = G_SEXT %3(i8)
+ %5:_(i32) = G_SEXT %1(i1)
+ %6:_(i32) = G_UREM %4, %5
+ %7:_(i32) = COPY %5(i32)
+ %8:_(i32) = G_SEXT %2(i1)
+ %9:_(i32) = G_UDIV %7, %8
+ %10:_(i8) = G_TRUNC %9(i32)
+ %11:_(i64) = G_ZEXT %6(i32)
+ %12:_(i64) = G_SEXT %10(i8)
+ %13:_(i64) = G_OR %11, %12
+ %14:_(i32) = G_TRUNC %13(i64)
+ $w0 = COPY %14(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
index 767ece62b8731..c9e8adfeaa94a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
@@ -15,46 +15,46 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s1) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: G_BRCOND [[DEF]](s1), %bb.2
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(i1) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: G_BRCOND [[DEF]](i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
- ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[C1]], [[C]]
- ; CHECK-NEXT: G_STORE [[UDIV]](s64), [[COPY]](p0) :: (store (s64))
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 -1
+ ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(i64) = G_UDIV [[C1]], [[C]]
+ ; CHECK-NEXT: G_STORE [[UDIV]](i64), [[COPY]](p0) :: (store (i64))
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
bb.1:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s1) = G_IMPLICIT_DEF
- %2:_(s64) = G_IMPLICIT_DEF
- %4:_(s64) = G_CONSTANT i64 0
- %12:_(s64) = G_CONSTANT i64 32
- G_BRCOND %1(s1), %bb.3
+ %1:_(i1) = G_IMPLICIT_DEF
+ %2:_(i64) = G_IMPLICIT_DEF
+ %4:_(i64) = G_CONSTANT i64 0
+ %12:_(i64) = G_CONSTANT i64 32
+ G_BRCOND %1(i1), %bb.3
G_BR %bb.2
bb.2:
- %3:_(s32) = G_TRUNC %2(s64)
- %5:_(s32) = G_TRUNC %4(s64)
- %6:_(s32) = G_UDIV %3, %5
- %7:_(s64) = G_ZEXT %6(s32)
- %8:_(s32) = COPY %3(s32)
- %9:_(s32) = COPY %5(s32)
- %10:_(s32) = G_UREM %8, %9
- %11:_(s64) = G_ZEXT %10(s32)
- %13:_(s64) = nuw G_SHL %11, %12(s64)
- %14:_(s64) = G_OR %2, %13
- %15:_(s64) = G_FREEZE %14
- %16:_(s64) = G_UDIV %15, %4
- %17:_(s64) = G_SHL %7, %12(s64)
- %18:_(s64) = G_ADD %17, %16
- G_STORE %18(s64), %0(p0) :: (store (s64))
+ %3:_(i32) = G_TRUNC %2(i64)
+ %5:_(i32) = G_TRUNC %4(i64)
+ %6:_(i32) = G_UDIV %3, %5
+ %7:_(i64) = G_ZEXT %6(i32)
+ %8:_(i32) = COPY %3(i32)
+ %9:_(i32) = COPY %5(i32)
+ %10:_(i32) = G_UREM %8, %9
+ %11:_(i64) = G_ZEXT %10(i32)
+ %13:_(i64) = nuw G_SHL %11, %12(i64)
+ %14:_(i64) = G_OR %2, %13
+ %15:_(i64) = G_FREEZE %14
+ %16:_(i64) = G_UDIV %15, %4
+ %17:_(i64) = G_SHL %7, %12(i64)
+ %18:_(i64) = G_ADD %17, %16
+ G_STORE %18(i64), %0(p0) :: (store (i64))
bb.3:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir
index 199da9bee6aae..d2778b899dee0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir
@@ -45,15 +45,15 @@ body: |
; CHECK-LABEL: name: eq_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %cmp:_(s1) = G_ICMP intpred(eq), %cst(s32), %cst
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %cmp:_(i1) = G_ICMP intpred(eq), %cst(i32), %cst
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -67,16 +67,16 @@ body: |
; CHECK-LABEL: name: ne_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(ne), %cst_1(s32), %cst_2
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst_1:_(i32) = G_CONSTANT i32 1
+ %cst_2:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(ne), %cst_1(i32), %cst_2
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -90,16 +90,16 @@ body: |
; CHECK-LABEL: name: sge_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 2
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sge), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 2
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sge), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -113,16 +113,16 @@ body: |
; CHECK-LABEL: name: sgt_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 3
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sgt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 3
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sgt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -136,16 +136,16 @@ body: |
; CHECK-LABEL: name: sle_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sle), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sle), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
@@ -160,16 +160,16 @@ body: |
; CHECK-LABEL: name: slt_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 -1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(slt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 -1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(slt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -183,16 +183,16 @@ body: |
; CHECK-LABEL: name: uge_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 2
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(uge), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 2
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(uge), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -206,16 +206,16 @@ body: |
; CHECK-LABEL: name: ugt_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 -1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ugt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 -1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ugt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -229,16 +229,16 @@ body: |
; CHECK-LABEL: name: ule_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ule), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ule), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -252,16 +252,16 @@ body: |
; CHECK-LABEL: name: ult_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 0
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ule), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 0
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ule), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -275,16 +275,16 @@ body: |
; CHECK-LABEL: name: eq_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 0
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(eq), %load_eq_1(s32), %cst
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 0
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(eq), %load_eq_1(i32), %cst
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -298,16 +298,16 @@ body: |
; CHECK-LABEL: name: ne_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 1
- %cmp:_(s1) = G_ICMP intpred(ne), %cst_1(s32), %cst_2
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst_1:_(i32) = G_CONSTANT i32 1
+ %cst_2:_(i32) = G_CONSTANT i32 1
+ %cmp:_(i1) = G_ICMP intpred(ne), %cst_1(i32), %cst_2
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -321,16 +321,16 @@ body: |
; CHECK-LABEL: name: sge_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 -1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sge), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 -1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sge), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -344,16 +344,16 @@ body: |
; CHECK-LABEL: name: sgt_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sgt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sgt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -367,16 +367,16 @@ body: |
; CHECK-LABEL: name: sle_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 3
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(sle), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 3
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(sle), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
@@ -391,16 +391,16 @@ body: |
; CHECK-LABEL: name: slt_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 2
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(slt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 2
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(slt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -414,16 +414,16 @@ body: |
; CHECK-LABEL: name: uge_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 0
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(uge), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 0
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(uge), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -437,16 +437,16 @@ body: |
; CHECK-LABEL: name: ugt_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ugt), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ugt), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -460,16 +460,16 @@ body: |
; CHECK-LABEL: name: ule_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 -1
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ule), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 -1
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ule), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -483,16 +483,16 @@ body: |
; CHECK-LABEL: name: ult_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cmp:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cmp:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 2
- %load_eq_1:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !0)
- %cmp:_(s1) = G_ICMP intpred(ule), %cst, %load_eq_1(s32)
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 2
+ %load_eq_1:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !0)
+ %cmp:_(i1) = G_ICMP intpred(ule), %cst, %load_eq_1(i32)
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -507,18 +507,18 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: %load_between_1_2:_(s32) = G_LOAD %ptr(p0) :: (load (s32),
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %load_between_1_2(s32), %cst
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: %load_between_1_2:_(i32) = G_LOAD %ptr(p0) :: (load (i32),
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(eq), %load_between_1_2(i32), %cst
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_between_1_2:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !1)
- %cmp:_(s1) = G_ICMP intpred(eq), %load_between_1_2(s32), %cst
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_between_1_2:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !1)
+ %cmp:_(i1) = G_ICMP intpred(eq), %load_between_1_2(i32), %cst
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -533,18 +533,18 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: %load_between_1_2:_(s32) = G_LOAD %ptr(p0) :: (load (s32),
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %load_between_1_2(s32), %cst
- ; CHECK-NEXT: %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY %cmp_ext(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: %load_between_1_2:_(i32) = G_LOAD %ptr(p0) :: (load (i32),
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(ne), %load_between_1_2(i32), %cst
+ ; CHECK-NEXT: %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY %cmp_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %load_between_1_2:_(s32) = G_LOAD %ptr(p0) :: (load (s32), !range !1)
- %cmp:_(s1) = G_ICMP intpred(ne), %load_between_1_2(s32), %cst
- %cmp_ext:_(s32) = G_ZEXT %cmp(s1)
- $w0 = COPY %cmp_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %load_between_1_2:_(i32) = G_LOAD %ptr(p0) :: (load (i32), !range !1)
+ %cmp:_(i1) = G_ICMP intpred(ne), %load_between_1_2(i32), %cst
+ %cmp_ext:_(i32) = G_ZEXT %cmp(i1)
+ $w0 = COPY %cmp_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -557,21 +557,21 @@ body: |
; CHECK-LABEL: name: vector_true
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst64:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: %cmp:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %extract:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %cst64(s64)
- ; CHECK-NEXT: %extract_ext:_(s32) = G_ZEXT %extract(s1)
- ; CHECK-NEXT: $w0 = COPY %extract_ext(s32)
+ ; CHECK-NEXT: %cst64:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: %cmp:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %extract:_(i1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x i1>), %cst64(i64)
+ ; CHECK-NEXT: %extract_ext:_(i32) = G_ZEXT %extract(i1)
+ ; CHECK-NEXT: $w0 = COPY %extract_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %cst64:_(s64) = G_CONSTANT i64 1
- %bv:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
- %cmp:_(<2 x s1>) = G_ICMP intpred(eq), %bv(<2 x s32>), %bv
- %extract:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %cst64(s64)
- %extract_ext:_(s32) = G_ZEXT %extract(s1)
- $w0 = COPY %extract_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %cst64:_(i64) = G_CONSTANT i64 1
+ %bv:_(<2 x i32>) = G_BUILD_VECTOR %cst, %cst
+ %cmp:_(<2 x i1>) = G_ICMP intpred(eq), %bv(<2 x i32>), %bv
+ %extract:_(i1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x i1>), %cst64(i64)
+ %extract_ext:_(i32) = G_ZEXT %extract(i1)
+ $w0 = COPY %extract_ext(i32)
RET_ReallyLR implicit $w0
...
@@ -584,19 +584,19 @@ body: |
; CHECK-LABEL: name: vector_false
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst64:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %cmp:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %extract:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %cst64(s64)
- ; CHECK-NEXT: %extract_ext:_(s32) = G_ZEXT %extract(s1)
- ; CHECK-NEXT: $w0 = COPY %extract_ext(s32)
+ ; CHECK-NEXT: %cst64:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %cmp:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %extract:_(i1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x i1>), %cst64(i64)
+ ; CHECK-NEXT: %extract_ext:_(i32) = G_ZEXT %extract(i1)
+ ; CHECK-NEXT: $w0 = COPY %extract_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%ptr:_(p0) = COPY $x0
- %cst:_(s32) = G_CONSTANT i32 1
- %cst64:_(s64) = G_CONSTANT i64 1
- %bv:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
- %cmp:_(<2 x s1>) = G_ICMP intpred(ne), %bv(<2 x s32>), %bv
- %extract:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %cst64(s64)
- %extract_ext:_(s32) = G_ZEXT %extract(s1)
- $w0 = COPY %extract_ext(s32)
+ %cst:_(i32) = G_CONSTANT i32 1
+ %cst64:_(i64) = G_CONSTANT i64 1
+ %bv:_(<2 x i32>) = G_BUILD_VECTOR %cst, %cst
+ %cmp:_(<2 x i1>) = G_ICMP intpred(ne), %bv(<2 x i32>), %bv
+ %extract:_(i1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x i1>), %cst64(i64)
+ %extract_ext:_(i32) = G_ZEXT %extract(i1)
+ $w0 = COPY %extract_ext(i32)
RET_ReallyLR implicit $w0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir
index 15cefc50faa29..4e669ab23f9f3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir
@@ -15,16 +15,16 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 1
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i8) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i8) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[AND]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_CONSTANT i8 1
- %2:_(s8) = G_LOAD %0 :: (load (s8))
- %3:_(s8) = G_AND %2, %1
- %4:_(s32) = G_ANYEXT %3
+ %1:_(i8) = G_CONSTANT i8 1
+ %2:_(i8) = G_LOAD %0 :: (load (i8))
+ %3:_(i8) = G_AND %2, %1
+ %4:_(i32) = G_ANYEXT %3
$w0 = COPY %4
...
@@ -38,14 +38,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s16) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ZEXTLOAD]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i16) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[ZEXTLOAD]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
%0:_(p0) = COPY $x0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(s16) = G_LOAD %0 :: (load (s8))
- %3:_(s16) = G_AND %2, %1
- %4:_(s32) = G_ANYEXT %3
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(i16) = G_LOAD %0 :: (load (i8))
+ %3:_(i16) = G_AND %2, %1
+ %4:_(i32) = G_ANYEXT %3
$w0 = COPY %4
...
@@ -59,12 +59,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (load (s8))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (load (i8))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -78,12 +78,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 4)
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 4)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (load (s32))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (load (i32))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -97,14 +97,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load seq_cst (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load seq_cst (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (load seq_cst (s32))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (load seq_cst (i32))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -119,12 +119,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load seq_cst (s16))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load seq_cst (i16))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 65535
- %2:_(s32) = G_LOAD %0 :: (load seq_cst (s16))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 65535
+ %2:_(i32) = G_LOAD %0 :: (load seq_cst (i16))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -140,14 +140,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load seq_cst (s16))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load seq_cst (i16))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (load seq_cst (s16))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (load seq_cst (i16))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -165,14 +165,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 4294967295
- %2:_(s32) = G_LOAD %0 :: (load (s32))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 4294967295
+ %2:_(i32) = G_LOAD %0 :: (load (i32))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -186,12 +186,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_ZEXTLOAD %0 :: (load (s16))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_ZEXTLOAD %0 :: (load (i16))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -209,14 +209,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ZEXTLOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[ZEXTLOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 65535
- %2:_(s32) = G_ZEXTLOAD %0 :: (load (s8))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 65535
+ %2:_(i32) = G_ZEXTLOAD %0 :: (load (i8))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -230,12 +230,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_SEXTLOAD %0 :: (load (s16))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_SEXTLOAD %0 :: (load (i16))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -249,14 +249,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SEXTLOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[SEXTLOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 65535
- %2:_(s32) = G_SEXTLOAD %0 :: (load (s8))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 65535
+ %2:_(i32) = G_SEXTLOAD %0 :: (load (i8))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -270,16 +270,16 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s24) = G_CONSTANT i24 7
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s24) = G_LOAD [[COPY]](p0) :: (load (s24), align 4)
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s24) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s24)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i24) = G_CONSTANT i24 7
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i24) = G_LOAD [[COPY]](p0) :: (load (i24), align 4)
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i24) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[AND]](i24)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
%0:_(p0) = COPY $x0
- %1:_(s24) = G_CONSTANT i24 7
- %2:_(s24) = G_LOAD %0 :: (load (s24))
- %3:_(s24) = G_AND %2, %1
- %4:_(s32) = G_ANYEXT %3
+ %1:_(i24) = G_CONSTANT i24 7
+ %2:_(i24) = G_LOAD %0 :: (load (i24))
+ %3:_(i24) = G_AND %2, %1
+ %4:_(i32) = G_ANYEXT %3
$w0 = COPY %4
...
@@ -294,14 +294,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 510
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 510
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 510
- %2:_(s32) = G_LOAD %0 :: (load (s8))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 510
+ %2:_(i32) = G_LOAD %0 :: (load (i8))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -315,12 +315,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (volatile load (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (volatile load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (volatile load (s8))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (volatile load (i8))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
@@ -334,14 +334,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (volatile load (s16))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (volatile load (i16))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (volatile load (s16))
- %3:_(s32) = G_AND %2, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (volatile load (i16))
+ %3:_(i32) = G_AND %2, %1
$w0 = COPY %3
...
---
@@ -354,17 +354,17 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
- ; CHECK-NEXT: %v:_(s32) = G_ASSERT_ZEXT [[LOAD]], 16
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %v, [[C]]
- ; CHECK-NEXT: $w1 = COPY %v(s32)
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i16))
+ ; CHECK-NEXT: %v:_(i32) = G_ASSERT_ZEXT [[LOAD]], 16
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND %v, [[C]]
+ ; CHECK-NEXT: $w1 = COPY %v(i32)
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_CONSTANT i32 255
- %2:_(s32) = G_LOAD %0 :: (load (s16))
- %v:_(s32) = G_ASSERT_ZEXT %2, 16
- %3:_(s32) = G_AND %v, %1
+ %1:_(i32) = G_CONSTANT i32 255
+ %2:_(i32) = G_LOAD %0 :: (load (i16))
+ %v:_(i32) = G_ASSERT_ZEXT %2, 16
+ %3:_(i32) = G_AND %v, %1
$w1 = COPY %v
$w0 = COPY %3
...
@@ -376,15 +376,15 @@ body: |
; CHECK-LABEL: name: test_multi_use_load
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[ZEXTLOAD]](s32), [[COPY1]](p0) :: (store (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: G_STORE [[ZEXTLOAD]](i32), [[COPY1]](p0) :: (store (i8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 255
- %3:_(s32) = G_LOAD %0 :: (load (s8))
- G_STORE %3, %1 :: (store (s8))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 255
+ %3:_(i32) = G_LOAD %0 :: (load (i8))
+ G_STORE %3, %1 :: (store (i8))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
@@ -395,15 +395,15 @@ body: |
; CHECK-LABEL: name: test_multi_use_zextload
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[ZEXTLOAD]](s32), [[COPY1]](p0) :: (store (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: G_STORE [[ZEXTLOAD]](i32), [[COPY1]](p0) :: (store (i8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 255
- %3:_(s32) = G_ZEXTLOAD %0 :: (load (s8))
- G_STORE %3, %1 :: (store (s8))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 255
+ %3:_(i32) = G_ZEXTLOAD %0 :: (load (i8))
+ G_STORE %3, %1 :: (store (i8))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
@@ -414,17 +414,17 @@ body: |
; CHECK-LABEL: name: test_multi_use_sextload
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[SEXTLOAD]](s32), [[COPY1]](p0) :: (store (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SEXTLOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: G_STORE [[SEXTLOAD]](i32), [[COPY1]](p0) :: (store (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[SEXTLOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 255
- %3:_(s32) = G_SEXTLOAD %0 :: (load (s8))
- G_STORE %3, %1 :: (store (s32))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 255
+ %3:_(i32) = G_SEXTLOAD %0 :: (load (i8))
+ G_STORE %3, %1 :: (store (i32))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
@@ -435,17 +435,17 @@ body: |
; CHECK-LABEL: name: test_multi_use_load_large_mask
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: G_STORE [[LOAD]](i32), [[COPY1]](p0) :: (store (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 65535
- %3:_(s32) = G_LOAD %0 :: (load (s8))
- G_STORE %3, %1 :: (store (s32))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 65535
+ %3:_(i32) = G_LOAD %0 :: (load (i8))
+ G_STORE %3, %1 :: (store (i32))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
@@ -456,17 +456,17 @@ body: |
; CHECK-LABEL: name: test_multi_use_sextload_large_mask
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[SEXTLOAD]](s32), [[COPY1]](p0) :: (store (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SEXTLOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: G_STORE [[SEXTLOAD]](i32), [[COPY1]](p0) :: (store (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[SEXTLOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 65535
- %3:_(s32) = G_SEXTLOAD %0 :: (load (s8))
- G_STORE %3, %1 :: (store (s32))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 65535
+ %3:_(i32) = G_SEXTLOAD %0 :: (load (i8))
+ G_STORE %3, %1 :: (store (i32))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
@@ -477,16 +477,16 @@ body: |
; CHECK-LABEL: name: test_multi_use_load_small_mask
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
- ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s32))
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
- ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i16))
+ ; CHECK-NEXT: G_STORE [[LOAD]](i32), [[COPY1]](p0) :: (store (i32))
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[LOAD]], [[C]]
+ ; CHECK-NEXT: $w0 = COPY [[AND]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 255
- %3:_(s32) = G_LOAD %0 :: (load (s16))
- G_STORE %3, %1 :: (store (s32))
- %4:_(s32) = G_AND %3, %2
+ %2:_(i32) = G_CONSTANT i32 255
+ %3:_(i32) = G_LOAD %0 :: (load (i16))
+ G_STORE %3, %1 :: (store (i32))
+ %4:_(i32) = G_AND %3, %2
$w0 = COPY %4
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir
index 3dd681c2d21fb..b2f9f006ea5bf 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir
@@ -16,35 +16,35 @@ body: |
; NOT_STRICT: liveins: $x0, $x1
; NOT_STRICT-NEXT: {{ $}}
; NOT_STRICT-NEXT: %ptr:_(p0) = COPY $x1
- ; NOT_STRICT-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; NOT_STRICT-NEXT: $w1 = COPY %full_load(s32)
+ ; NOT_STRICT-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; NOT_STRICT-NEXT: $w1 = COPY %full_load(i32)
; NOT_STRICT-NEXT: RET_ReallyLR implicit $w1
;
; STRICT-LABEL: name: misaligned
; STRICT: liveins: $x0, $x1
; STRICT-NEXT: {{ $}}
- ; STRICT-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; STRICT-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; STRICT-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; STRICT-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; STRICT-NEXT: %ptr:_(p0) = COPY $x1
- ; STRICT-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; STRICT-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; STRICT-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; STRICT-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; STRICT-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; STRICT-NEXT: $w1 = COPY %full_load(s32)
+ ; STRICT-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; STRICT-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; STRICT-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; STRICT-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; STRICT-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; STRICT-NEXT: $w1 = COPY %full_load(i32)
; STRICT-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16), align 2)
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16), align 2)
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16), align 2)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16), align 2)
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -59,27 +59,27 @@ body: |
; NOT_STRICT: liveins: $x0, $x1
; NOT_STRICT-NEXT: {{ $}}
; NOT_STRICT-NEXT: %ptr:_(p0) = COPY $x1
- ; NOT_STRICT-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- ; NOT_STRICT-NEXT: $w1 = COPY %full_load(s32)
+ ; NOT_STRICT-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ ; NOT_STRICT-NEXT: $w1 = COPY %full_load(i32)
; NOT_STRICT-NEXT: RET_ReallyLR implicit $w1
;
; STRICT-LABEL: name: aligned
; STRICT: liveins: $x0, $x1
; STRICT-NEXT: {{ $}}
; STRICT-NEXT: %ptr:_(p0) = COPY $x1
- ; STRICT-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- ; STRICT-NEXT: $w1 = COPY %full_load(s32)
+ ; STRICT-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ ; STRICT-NEXT: $w1 = COPY %full_load(i32)
; STRICT-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16), align 4)
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16), align 4)
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16), align 4)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16), align 4)
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
index 131dcbf9906b4..0d69f3d0e723f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
@@ -28,40 +28,40 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: s8_loads_to_s32_little_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
- %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
+ %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
; Note the shape of the tree:
; byte byte byte byte
@@ -71,11 +71,11 @@ body: |
; \ /
; OR
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -95,45 +95,45 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: s8_loads_to_s32_big_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %elt0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
+ %elt0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
- %byte0:_(s32) = nuw G_SHL %elt0, %cst_24(s32)
- %byte1:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_8(s32)
- %byte3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %byte0:_(i32) = nuw G_SHL %elt0, %cst_24(i32)
+ %byte1:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_8(i32)
+ %byte3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -154,40 +154,40 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name:
diff erent_or_pattern
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
- %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
+ %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
; Note the shape of the tree:
; byte byte
@@ -198,11 +198,11 @@ body: |
; \
; ...
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %or1, %byte2
- %full_load:_(s32) = G_OR %or2, %byte3
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %or1, %byte2
+ %full_load:_(i32) = G_OR %or2, %byte3
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -222,30 +222,30 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: s16_loads_to_s32_little_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -265,30 +265,30 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; LITTLE-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: s16_loads_to_s32_big_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %elt0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt0, %cst_16(s32)
- %low_half:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
+ %elt0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt0, %cst_16(i32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -308,46 +308,46 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %full_load:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
- ; LITTLE-NEXT: $x1 = COPY %full_load(s64)
+ ; LITTLE-NEXT: %full_load:_(i64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
+ ; LITTLE-NEXT: $x1 = COPY %full_load(i64)
; LITTLE-NEXT: RET_ReallyLR implicit $x1
;
; BIG-LABEL: name: s16_loads_to_s64_little_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
- ; BIG-NEXT: %full_load:_(s64) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $x1 = COPY %full_load(s64)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
+ ; BIG-NEXT: %full_load:_(i64) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $x1 = COPY %full_load(i64)
; BIG-NEXT: RET_ReallyLR implicit $x1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_16:_(s64) = G_CONSTANT i64 16
- %cst_32:_(s64) = G_CONSTANT i64 32
- %cst_48:_(s64) = G_CONSTANT i64 48
+ %cst_16:_(i64) = G_CONSTANT i64 16
+ %cst_32:_(i64) = G_CONSTANT i64 32
+ %cst_48:_(i64) = G_CONSTANT i64 48
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %byte0_byte1:_(s64) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ %byte0_byte1:_(i64) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
- %elt1:_(s64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %elt2:_(s64) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s16))
- %elt3:_(s64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s16))
+ %elt1:_(i64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %elt2:_(i64) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i16))
+ %elt3:_(i64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i16))
- %byte2_byte3:_(s64) = nuw G_SHL %elt1, %cst_16(s64)
- %byte4_byte5:_(s64) = nuw G_SHL %elt2, %cst_32(s64)
- %byte6_byte7:_(s64) = nuw G_SHL %elt3, %cst_48(s64)
+ %byte2_byte3:_(i64) = nuw G_SHL %elt1, %cst_16(i64)
+ %byte4_byte5:_(i64) = nuw G_SHL %elt2, %cst_32(i64)
+ %byte6_byte7:_(i64) = nuw G_SHL %elt3, %cst_48(i64)
- %or1:_(s64) = G_OR %byte0_byte1, %byte2_byte3
- %or2:_(s64) = G_OR %byte4_byte5, %byte6_byte7
- %full_load:_(s64) = G_OR %or1, %or2
+ %or1:_(i64) = G_OR %byte0_byte1, %byte2_byte3
+ %or2:_(i64) = G_OR %byte4_byte5, %byte6_byte7
+ %full_load:_(i64) = G_OR %or1, %or2
- $x1 = COPY %full_load(s64)
+ $x1 = COPY %full_load(i64)
RET_ReallyLR implicit $x1
...
@@ -367,45 +367,45 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
- ; LITTLE-NEXT: %full_load:_(s64) = G_BSWAP [[LOAD]]
- ; LITTLE-NEXT: $x1 = COPY %full_load(s64)
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
+ ; LITTLE-NEXT: %full_load:_(i64) = G_BSWAP [[LOAD]]
+ ; LITTLE-NEXT: $x1 = COPY %full_load(i64)
; LITTLE-NEXT: RET_ReallyLR implicit $x1
;
; BIG-LABEL: name: s16_loads_to_s64_big_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %full_load:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
- ; BIG-NEXT: $x1 = COPY %full_load(s64)
+ ; BIG-NEXT: %full_load:_(i64) = G_LOAD %ptr(p0) :: (load (s64), align 2)
+ ; BIG-NEXT: $x1 = COPY %full_load(i64)
; BIG-NEXT: RET_ReallyLR implicit $x1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_16:_(s64) = G_CONSTANT i64 16
- %cst_32:_(s64) = G_CONSTANT i64 32
- %cst_48:_(s64) = G_CONSTANT i64 48
+ %cst_16:_(i64) = G_CONSTANT i64 16
+ %cst_32:_(i64) = G_CONSTANT i64 32
+ %cst_48:_(i64) = G_CONSTANT i64 48
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %elt0:_(s64) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %elt2:_(s64) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s16))
+ %elt0:_(i64) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %elt2:_(i64) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i16))
- %byte0_byte1:_(s64) = nuw G_SHL %elt0, %cst_48(s64)
- %byte2_byte3:_(s64) = nuw G_SHL %elt1, %cst_32(s64)
- %byte4_byte5:_(s64) = nuw G_SHL %elt2, %cst_16(s64)
- %byte6_byte7:_(s64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s16))
+ %byte0_byte1:_(i64) = nuw G_SHL %elt0, %cst_48(i64)
+ %byte2_byte3:_(i64) = nuw G_SHL %elt1, %cst_32(i64)
+ %byte4_byte5:_(i64) = nuw G_SHL %elt2, %cst_16(i64)
+ %byte6_byte7:_(i64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i16))
- %or1:_(s64) = G_OR %byte0_byte1, %byte2_byte3
- %or2:_(s64) = G_OR %byte4_byte5, %byte6_byte7
- %full_load:_(s64) = G_OR %or1, %or2
+ %or1:_(i64) = G_OR %byte0_byte1, %byte2_byte3
+ %or2:_(i64) = G_OR %byte4_byte5, %byte6_byte7
+ %full_load:_(i64) = G_OR %or1, %or2
- $x1 = COPY %full_load(s64)
+ $x1 = COPY %full_load(i64)
RET_ReallyLR implicit $x1
@@ -425,52 +425,52 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_positive_little_endian_pat
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
; LITTLE-NEXT: %ptr:_(p0) = COPY $x0
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: nonzero_start_idx_positive_little_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
; BIG-NEXT: %ptr:_(p0) = COPY $x0
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
- %cst_4:_(s64) = G_CONSTANT i64 4
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
+ %cst_4:_(i64) = G_CONSTANT i64 4
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(i64)
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
- %elt4:_(s32) = G_ZEXTLOAD %ptr_elt_4(p0) :: (load (s8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
+ %elt4:_(i32) = G_ZEXTLOAD %ptr_elt_4(p0) :: (load (i8))
- %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %byte1:_(s32) = nuw G_SHL %elt2, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt3, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt4, %cst_24(s32)
+ %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %byte1:_(i32) = nuw G_SHL %elt2, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt3, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt4, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -489,52 +489,52 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_positive_big_endian_pat
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
; LITTLE-NEXT: %ptr:_(p0) = COPY $x0
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: nonzero_start_idx_positive_big_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
; BIG-NEXT: %ptr:_(p0) = COPY $x0
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %full_load:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %full_load:_(i32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
- %cst_4:_(s64) = G_CONSTANT i64 4
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
+ %cst_4:_(i64) = G_CONSTANT i64 4
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(i64)
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
- %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_4(p0) :: (load (s8))
- %byte1:_(s32) = nuw G_SHL %elt3, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt1, %cst_24(s32)
+ %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_4(p0) :: (load (i8))
+ %byte1:_(i32) = nuw G_SHL %elt3, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt1, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -553,50 +553,50 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_negative_little_endian_pat
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ ; LITTLE-NEXT: %cst_neg_3:_(i64) = G_CONSTANT i64 -3
; LITTLE-NEXT: %ptr:_(p0) = COPY $x0
- ; LITTLE-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: nonzero_start_idx_negative_little_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ ; BIG-NEXT: %cst_neg_3:_(i64) = G_CONSTANT i64 -3
; BIG-NEXT: %ptr:_(p0) = COPY $x0
- ; BIG-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_neg_1:_(s64) = G_CONSTANT i64 -1
- %cst_neg_2:_(s64) = G_CONSTANT i64 -2
- %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ %cst_neg_1:_(i64) = G_CONSTANT i64 -1
+ %cst_neg_2:_(i64) = G_CONSTANT i64 -2
+ %cst_neg_3:_(i64) = G_CONSTANT i64 -3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s64)
- %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s64)
+ %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(i64)
+ %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(i64)
- %elt_neg_2:_(s32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (s8))
- %elt_neg_1:_(s32) = G_ZEXTLOAD %ptr_elt_neg_1(p0) :: (load (s8))
- %elt_0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %elt_neg_2:_(i32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (i8))
+ %elt_neg_1:_(i32) = G_ZEXTLOAD %ptr_elt_neg_1(p0) :: (load (i8))
+ %elt_0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_neg_3(p0) :: (load (s8))
- %byte1:_(s32) = nuw G_SHL %elt_neg_2, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt_neg_1, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt_0, %cst_24(s32)
+ %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_neg_3(p0) :: (load (i8))
+ %byte1:_(i32) = nuw G_SHL %elt_neg_2, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt_neg_1, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt_0, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -615,51 +615,51 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_negative_big_endian_pat
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ ; LITTLE-NEXT: %cst_neg_3:_(i64) = G_CONSTANT i64 -3
; LITTLE-NEXT: %ptr:_(p0) = COPY $x0
- ; LITTLE-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: nonzero_start_idx_negative_big_endian_pat
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ ; BIG-NEXT: %cst_neg_3:_(i64) = G_CONSTANT i64 -3
; BIG-NEXT: %ptr:_(p0) = COPY $x0
- ; BIG-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- ; BIG-NEXT: %full_load:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ ; BIG-NEXT: %full_load:_(i32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_neg_1:_(s64) = G_CONSTANT i64 -1
- %cst_neg_2:_(s64) = G_CONSTANT i64 -2
- %cst_neg_3:_(s64) = G_CONSTANT i64 -3
+ %cst_neg_1:_(i64) = G_CONSTANT i64 -1
+ %cst_neg_2:_(i64) = G_CONSTANT i64 -2
+ %cst_neg_3:_(i64) = G_CONSTANT i64 -3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
- %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s64)
- %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s64)
+ %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(i64)
+ %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(i64)
+ %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(i64)
- %elt_neg_3:_(s32) = G_ZEXTLOAD %ptr_elt_neg_3(p0) :: (load (s8))
- %elt_neg_2:_(s32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (s8))
- %elt_neg_1:_(s32) = G_ZEXTLOAD %ptr_elt_neg_1(p0) :: (load (s8))
- %elt_0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %elt_neg_3:_(i32) = G_ZEXTLOAD %ptr_elt_neg_3(p0) :: (load (i8))
+ %elt_neg_2:_(i32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (i8))
+ %elt_neg_1:_(i32) = G_ZEXTLOAD %ptr_elt_neg_1(p0) :: (load (i8))
+ %elt_0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- %byte1:_(s32) = nuw G_SHL %elt_neg_1, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt_neg_2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt_neg_3, %cst_24(s32)
+ %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ %byte1:_(i32) = nuw G_SHL %elt_neg_1, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt_neg_2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt_neg_3, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -675,42 +675,42 @@ body: |
; LITTLE-LABEL: name: dont_combine_volatile
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_volatile
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (volatile load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -726,42 +726,42 @@ body: |
; LITTLE-LABEL: name: dont_wrong_memop_size
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %wrong_size_load:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %wrong_size_load, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %wrong_size_load:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %wrong_size_load, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_wrong_memop_size
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %wrong_size_load:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %wrong_size_load, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %wrong_size_load:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %wrong_size_load, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %wrong_size_load:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %high_half:_(s32) = nuw G_SHL %wrong_size_load, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %wrong_size_load:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %high_half:_(i32) = nuw G_SHL %wrong_size_load, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -779,42 +779,42 @@ body: |
; LITTLE-LABEL: name: dont_combine_wrong_offset
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_24(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_24(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_wrong_offset
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_24(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_24(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_24(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_24(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -832,42 +832,42 @@ body: |
; LITTLE-LABEL: name: dont_combine_wrong_offset_2
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_wrong_offset_2
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_8:_(s32) = G_CONSTANT i32 8
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_8:_(i32) = G_CONSTANT i32 8
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -885,64 +885,64 @@ body: |
; LITTLE-LABEL: name: dont_combine_missing_load
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; LITTLE-NEXT: %cst_16:_(s64) = G_CONSTANT i64 16
- ; LITTLE-NEXT: %cst_48:_(s64) = G_CONSTANT i64 48
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; LITTLE-NEXT: %cst_16:_(i64) = G_CONSTANT i64 16
+ ; LITTLE-NEXT: %cst_48:_(i64) = G_CONSTANT i64 48
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; LITTLE-NEXT: %byte0_byte1:_(s64) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt3:_(s64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s16))
- ; LITTLE-NEXT: %byte2_byte3:_(s64) = nuw G_SHL %elt1, %cst_16(s64)
- ; LITTLE-NEXT: %byte6_byte7:_(s64) = nuw G_SHL %elt3, %cst_48(s64)
- ; LITTLE-NEXT: %or1:_(s64) = G_OR %byte0_byte1, %byte2_byte3
- ; LITTLE-NEXT: %full_load:_(s64) = G_OR %or1, %byte6_byte7
- ; LITTLE-NEXT: $x1 = COPY %full_load(s64)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; LITTLE-NEXT: %byte0_byte1:_(i64) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt3:_(i64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i16))
+ ; LITTLE-NEXT: %byte2_byte3:_(i64) = nuw G_SHL %elt1, %cst_16(i64)
+ ; LITTLE-NEXT: %byte6_byte7:_(i64) = nuw G_SHL %elt3, %cst_48(i64)
+ ; LITTLE-NEXT: %or1:_(i64) = G_OR %byte0_byte1, %byte2_byte3
+ ; LITTLE-NEXT: %full_load:_(i64) = G_OR %or1, %byte6_byte7
+ ; LITTLE-NEXT: $x1 = COPY %full_load(i64)
; LITTLE-NEXT: RET_ReallyLR implicit $x1
;
; BIG-LABEL: name: dont_combine_missing_load
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; BIG-NEXT: %cst_16:_(s64) = G_CONSTANT i64 16
- ; BIG-NEXT: %cst_48:_(s64) = G_CONSTANT i64 48
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; BIG-NEXT: %cst_16:_(i64) = G_CONSTANT i64 16
+ ; BIG-NEXT: %cst_48:_(i64) = G_CONSTANT i64 48
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; BIG-NEXT: %byte0_byte1:_(s64) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %elt3:_(s64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s16))
- ; BIG-NEXT: %byte2_byte3:_(s64) = nuw G_SHL %elt1, %cst_16(s64)
- ; BIG-NEXT: %byte6_byte7:_(s64) = nuw G_SHL %elt3, %cst_48(s64)
- ; BIG-NEXT: %or1:_(s64) = G_OR %byte0_byte1, %byte2_byte3
- ; BIG-NEXT: %full_load:_(s64) = G_OR %or1, %byte6_byte7
- ; BIG-NEXT: $x1 = COPY %full_load(s64)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; BIG-NEXT: %byte0_byte1:_(i64) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %elt3:_(i64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i16))
+ ; BIG-NEXT: %byte2_byte3:_(i64) = nuw G_SHL %elt1, %cst_16(i64)
+ ; BIG-NEXT: %byte6_byte7:_(i64) = nuw G_SHL %elt3, %cst_48(i64)
+ ; BIG-NEXT: %or1:_(i64) = G_OR %byte0_byte1, %byte2_byte3
+ ; BIG-NEXT: %full_load:_(i64) = G_OR %or1, %byte6_byte7
+ ; BIG-NEXT: $x1 = COPY %full_load(i64)
; BIG-NEXT: RET_ReallyLR implicit $x1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_16:_(s64) = G_CONSTANT i64 16
- %cst_48:_(s64) = G_CONSTANT i64 48
+ %cst_16:_(i64) = G_CONSTANT i64 16
+ %cst_48:_(i64) = G_CONSTANT i64 48
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %byte0_byte1:_(s64) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ %byte0_byte1:_(i64) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
- %elt1:_(s64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %elt3:_(s64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s16))
+ %elt1:_(i64) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %elt3:_(i64) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i16))
- %byte2_byte3:_(s64) = nuw G_SHL %elt1, %cst_16(s64)
- %byte6_byte7:_(s64) = nuw G_SHL %elt3, %cst_48(s64)
+ %byte2_byte3:_(i64) = nuw G_SHL %elt1, %cst_16(i64)
+ %byte6_byte7:_(i64) = nuw G_SHL %elt3, %cst_48(i64)
- %or1:_(s64) = G_OR %byte0_byte1, %byte2_byte3
- %full_load:_(s64) = G_OR %or1, %byte6_byte7
+ %or1:_(i64) = G_OR %byte0_byte1, %byte2_byte3
+ %full_load:_(i64) = G_OR %or1, %byte6_byte7
- $x1 = COPY %full_load(s64)
+ $x1 = COPY %full_load(i64)
RET_ReallyLR implicit $x1
...
@@ -958,42 +958,42 @@ body: |
; LITTLE-LABEL: name: dont_combine_
diff erent_addr_spaces
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16), addrspace 1)
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16), addrspace 1)
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_
diff erent_addr_spaces
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16), addrspace 1)
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16), addrspace 1)
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16), addrspace 0)
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16), addrspace 1)
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16), addrspace 0)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16), addrspace 1)
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1011,79 +1011,79 @@ body: |
; LITTLE-LABEL: name: dont_combine_duplicate_idx
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %reused_idx:_(s64) = G_CONSTANT i64 2
- ; LITTLE-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
- ; LITTLE-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %reused_idx:_(i64) = G_CONSTANT i64 2
+ ; LITTLE-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
- ; LITTLE-NEXT: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
- ; LITTLE-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt2:_(s32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt3:_(s32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (s8))
- ; LITTLE-NEXT: %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; LITTLE-NEXT: %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- ; LITTLE-NEXT: %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
- ; LITTLE-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; LITTLE-NEXT: %or2:_(s32) = G_OR %byte2, %byte3
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
+ ; LITTLE-NEXT: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
+ ; LITTLE-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt2:_(i32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt3:_(i32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (i8))
+ ; LITTLE-NEXT: %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; LITTLE-NEXT: %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ ; LITTLE-NEXT: %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
+ ; LITTLE-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; LITTLE-NEXT: %or2:_(i32) = G_OR %byte2, %byte3
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_duplicate_idx
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %reused_idx:_(s64) = G_CONSTANT i64 2
- ; BIG-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
- ; BIG-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %reused_idx:_(i64) = G_CONSTANT i64 2
+ ; BIG-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
- ; BIG-NEXT: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
- ; BIG-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; BIG-NEXT: %elt2:_(s32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (s8))
- ; BIG-NEXT: %elt3:_(s32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (s8))
- ; BIG-NEXT: %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; BIG-NEXT: %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- ; BIG-NEXT: %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
- ; BIG-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; BIG-NEXT: %or2:_(s32) = G_OR %byte2, %byte3
- ; BIG-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
+ ; BIG-NEXT: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
+ ; BIG-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; BIG-NEXT: %elt2:_(i32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (i8))
+ ; BIG-NEXT: %elt3:_(i32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (i8))
+ ; BIG-NEXT: %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; BIG-NEXT: %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ ; BIG-NEXT: %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
+ ; BIG-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; BIG-NEXT: %or2:_(i32) = G_OR %byte2, %byte3
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %reused_idx:_(s64) = G_CONSTANT i64 2
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %reused_idx:_(i64) = G_CONSTANT i64 2
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
- %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
+ %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(i64)
- %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (s8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %also_uses_idx_2(p0) :: (load (i8))
- %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
+ %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
---
@@ -1100,79 +1100,79 @@ body: |
; LITTLE-LABEL: name: dont_combine_duplicate_offset
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_2:_(s64) = G_CONSTANT i64 2
- ; LITTLE-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; LITTLE-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; LITTLE-NEXT: %duplicate_shl_cst:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_2:_(i64) = G_CONSTANT i64 2
+ ; LITTLE-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; LITTLE-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; LITTLE-NEXT: %duplicate_shl_cst:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; LITTLE-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
- ; LITTLE-NEXT: %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; LITTLE-NEXT: %duplicate_shl_1:_(s32) = nuw G_SHL %elt2, %duplicate_shl_cst(s32)
- ; LITTLE-NEXT: %duplicate_shl_2:_(s32) = nuw G_SHL %elt3, %duplicate_shl_cst(s32)
- ; LITTLE-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; LITTLE-NEXT: %or2:_(s32) = G_OR %duplicate_shl_1, %duplicate_shl_2
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; LITTLE-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
+ ; LITTLE-NEXT: %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; LITTLE-NEXT: %duplicate_shl_1:_(i32) = nuw G_SHL %elt2, %duplicate_shl_cst(i32)
+ ; LITTLE-NEXT: %duplicate_shl_2:_(i32) = nuw G_SHL %elt3, %duplicate_shl_cst(i32)
+ ; LITTLE-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; LITTLE-NEXT: %or2:_(i32) = G_OR %duplicate_shl_1, %duplicate_shl_2
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_duplicate_offset
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_2:_(s64) = G_CONSTANT i64 2
- ; BIG-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; BIG-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; BIG-NEXT: %duplicate_shl_cst:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_2:_(i64) = G_CONSTANT i64 2
+ ; BIG-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; BIG-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; BIG-NEXT: %duplicate_shl_cst:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; BIG-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; BIG-NEXT: %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- ; BIG-NEXT: %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
- ; BIG-NEXT: %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- ; BIG-NEXT: %duplicate_shl_1:_(s32) = nuw G_SHL %elt2, %duplicate_shl_cst(s32)
- ; BIG-NEXT: %duplicate_shl_2:_(s32) = nuw G_SHL %elt3, %duplicate_shl_cst(s32)
- ; BIG-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; BIG-NEXT: %or2:_(s32) = G_OR %duplicate_shl_1, %duplicate_shl_2
- ; BIG-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; BIG-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; BIG-NEXT: %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ ; BIG-NEXT: %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
+ ; BIG-NEXT: %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ ; BIG-NEXT: %duplicate_shl_1:_(i32) = nuw G_SHL %elt2, %duplicate_shl_cst(i32)
+ ; BIG-NEXT: %duplicate_shl_2:_(i32) = nuw G_SHL %elt3, %duplicate_shl_cst(i32)
+ ; BIG-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; BIG-NEXT: %or2:_(i32) = G_OR %duplicate_shl_1, %duplicate_shl_2
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %duplicate_shl_cst:_(s32) = G_CONSTANT i32 16
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %duplicate_shl_cst:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
- %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
+ %byte0:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
- %byte1:_(s32) = nuw G_SHL %elt1, %cst_8(s32)
- %duplicate_shl_1:_(s32) = nuw G_SHL %elt2, %duplicate_shl_cst(s32)
- %duplicate_shl_2:_(s32) = nuw G_SHL %elt3, %duplicate_shl_cst(s32)
+ %byte1:_(i32) = nuw G_SHL %elt1, %cst_8(i32)
+ %duplicate_shl_1:_(i32) = nuw G_SHL %elt2, %duplicate_shl_cst(i32)
+ %duplicate_shl_2:_(i32) = nuw G_SHL %elt3, %duplicate_shl_cst(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %duplicate_shl_1, %duplicate_shl_2
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %duplicate_shl_1, %duplicate_shl_2
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1191,83 +1191,83 @@ body: |
; LITTLE-LABEL: name: dont_combine_lowest_index_not_zero_offset
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_2:_(s64) = G_CONSTANT i64 2
- ; LITTLE-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; LITTLE-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
- ; LITTLE-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_2:_(i64) = G_CONSTANT i64 2
+ ; LITTLE-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; LITTLE-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; LITTLE-NEXT: %lowest_idx_load:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; LITTLE-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- ; LITTLE-NEXT: %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
- ; LITTLE-NEXT: %byte1:_(s32) = nuw G_SHL %lowest_idx_load, %cst_8(s32)
- ; LITTLE-NEXT: %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- ; LITTLE-NEXT: %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
- ; LITTLE-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; LITTLE-NEXT: %or2:_(s32) = G_OR %byte2, %byte3
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ ; LITTLE-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; LITTLE-NEXT: %lowest_idx_load:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; LITTLE-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ ; LITTLE-NEXT: %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
+ ; LITTLE-NEXT: %byte1:_(i32) = nuw G_SHL %lowest_idx_load, %cst_8(i32)
+ ; LITTLE-NEXT: %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ ; LITTLE-NEXT: %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
+ ; LITTLE-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; LITTLE-NEXT: %or2:_(i32) = G_OR %byte2, %byte3
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_lowest_index_not_zero_offset
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_2:_(s64) = G_CONSTANT i64 2
- ; BIG-NEXT: %cst_3:_(s64) = G_CONSTANT i64 3
- ; BIG-NEXT: %cst_8:_(s32) = G_CONSTANT i32 8
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
- ; BIG-NEXT: %cst_24:_(s32) = G_CONSTANT i32 24
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_2:_(i64) = G_CONSTANT i64 2
+ ; BIG-NEXT: %cst_3:_(i64) = G_CONSTANT i64 3
+ ; BIG-NEXT: %cst_8:_(i32) = G_CONSTANT i32 8
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_24:_(i32) = G_CONSTANT i32 24
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
- ; BIG-NEXT: %lowest_idx_load:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- ; BIG-NEXT: %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- ; BIG-NEXT: %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- ; BIG-NEXT: %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
- ; BIG-NEXT: %byte1:_(s32) = nuw G_SHL %lowest_idx_load, %cst_8(s32)
- ; BIG-NEXT: %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- ; BIG-NEXT: %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
- ; BIG-NEXT: %or1:_(s32) = G_OR %byte0, %byte1
- ; BIG-NEXT: %or2:_(s32) = G_OR %byte2, %byte3
- ; BIG-NEXT: %full_load:_(s32) = G_OR %or1, %or2
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ ; BIG-NEXT: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
+ ; BIG-NEXT: %lowest_idx_load:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ ; BIG-NEXT: %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ ; BIG-NEXT: %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ ; BIG-NEXT: %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
+ ; BIG-NEXT: %byte1:_(i32) = nuw G_SHL %lowest_idx_load, %cst_8(i32)
+ ; BIG-NEXT: %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ ; BIG-NEXT: %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
+ ; BIG-NEXT: %or1:_(i32) = G_OR %byte0, %byte1
+ ; BIG-NEXT: %or2:_(i32) = G_OR %byte2, %byte3
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %or1, %or2
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_2:_(s64) = G_CONSTANT i64 2
- %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_2:_(i64) = G_CONSTANT i64 2
+ %cst_3:_(i64) = G_CONSTANT i64 3
- %cst_8:_(s32) = G_CONSTANT i32 8
- %cst_16:_(s32) = G_CONSTANT i32 16
- %cst_24:_(s32) = G_CONSTANT i32 24
+ %cst_8:_(i32) = G_CONSTANT i32 8
+ %cst_16:_(i32) = G_CONSTANT i32 16
+ %cst_24:_(i32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(i64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(i64)
; This load is index 0
- %lowest_idx_load:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
- %byte0:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
- %elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
- %elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
+ %lowest_idx_load:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i8))
+ %byte0:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i8))
+ %elt2:_(i32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (i8))
+ %elt3:_(i32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (i8))
; ... But it ends up being shifted, so we shouldn't combine.
- %byte1:_(s32) = nuw G_SHL %lowest_idx_load, %cst_8(s32)
- %byte2:_(s32) = nuw G_SHL %elt2, %cst_16(s32)
- %byte3:_(s32) = nuw G_SHL %elt3, %cst_24(s32)
+ %byte1:_(i32) = nuw G_SHL %lowest_idx_load, %cst_8(i32)
+ %byte2:_(i32) = nuw G_SHL %elt2, %cst_16(i32)
+ %byte3:_(i32) = nuw G_SHL %elt3, %cst_24(i32)
- %or1:_(s32) = G_OR %byte0, %byte1
- %or2:_(s32) = G_OR %byte2, %byte3
- %full_load:_(s32) = G_OR %or1, %or2
+ %or1:_(i32) = G_OR %byte0, %byte1
+ %or2:_(i32) = G_OR %byte2, %byte3
+ %full_load:_(i32) = G_OR %or1, %or2
- $w1 = COPY %full_load(s32)
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1284,45 +1284,45 @@ body: |
; LITTLE-LABEL: name: dont_combine_more_than_one_use_load
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: %extra_use:_(s32) = G_AND %full_load, %low_half
- ; LITTLE-NEXT: $w1 = COPY %extra_use(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: %extra_use:_(i32) = G_AND %full_load, %low_half
+ ; LITTLE-NEXT: $w1 = COPY %extra_use(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_more_than_one_use_load
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: %extra_use:_(s32) = G_AND %full_load, %low_half
- ; BIG-NEXT: $w1 = COPY %extra_use(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: %extra_use:_(i32) = G_AND %full_load, %low_half
+ ; BIG-NEXT: $w1 = COPY %extra_use(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- %extra_use:_(s32) = G_AND %full_load, %low_half
- $w1 = COPY %extra_use(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ %extra_use:_(i32) = G_AND %full_load, %low_half
+ $w1 = COPY %extra_use(i32)
RET_ReallyLR implicit $w1
...
@@ -1339,45 +1339,45 @@ body: |
; LITTLE-LABEL: name: dont_combine_more_than_one_use_shl
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: %extra_use:_(s32) = G_AND %full_load, %high_half
- ; LITTLE-NEXT: $w1 = COPY %extra_use(s32)
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: %extra_use:_(i32) = G_AND %full_load, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %extra_use(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_more_than_one_use_shl
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: %extra_use:_(s32) = G_AND %full_load, %high_half
- ; BIG-NEXT: $w1 = COPY %extra_use(s32)
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: %extra_use:_(i32) = G_AND %full_load, %high_half
+ ; BIG-NEXT: $w1 = COPY %extra_use(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- %extra_use:_(s32) = G_AND %full_load, %high_half
- $w1 = COPY %extra_use(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ %extra_use:_(i32) = G_AND %full_load, %high_half
+ $w1 = COPY %extra_use(i32)
RET_ReallyLR implicit $w1
...
@@ -1392,53 +1392,53 @@ body: |
; LITTLE-LABEL: name: dont_combine_store_between_same_mbb
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; LITTLE-NEXT: %other_ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %some_val:_(s32) = G_CONSTANT i32 12
- ; LITTLE-NEXT: G_STORE %some_val(s32), %other_ptr(p0) :: (store (s16))
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %some_val:_(i32) = G_CONSTANT i32 12
+ ; LITTLE-NEXT: G_STORE %some_val(i32), %other_ptr(p0) :: (store (i16))
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_store_between_same_mbb
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; BIG-NEXT: %other_ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %some_val:_(s32) = G_CONSTANT i32 12
- ; BIG-NEXT: G_STORE %some_val(s32), %other_ptr(p0) :: (store (s16))
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %some_val:_(i32) = G_CONSTANT i32 12
+ ; BIG-NEXT: G_STORE %some_val(i32), %other_ptr(p0) :: (store (i16))
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; Memory could be modified here, so don't combine!
%other_ptr:_(p0) = COPY $x1
- %some_val:_(s32) = G_CONSTANT i32 12
- G_STORE %some_val, %other_ptr :: (store (s16))
+ %some_val:_(i32) = G_CONSTANT i32 12
+ G_STORE %some_val, %other_ptr :: (store (i16))
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1451,27 +1451,27 @@ body: |
; LITTLE-NEXT: successors: %bb.1(0x80000000)
; LITTLE-NEXT: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: bb.1:
; LITTLE-NEXT: successors: %bb.2(0x80000000)
; LITTLE-NEXT: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %other_ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %some_val:_(s32) = G_CONSTANT i32 12
- ; LITTLE-NEXT: G_STORE %some_val(s32), %other_ptr(p0) :: (store (s16))
+ ; LITTLE-NEXT: %some_val:_(i32) = G_CONSTANT i32 12
+ ; LITTLE-NEXT: G_STORE %some_val(i32), %other_ptr(p0) :: (store (i16))
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: bb.2:
; LITTLE-NEXT: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: dont_combine_store_between_
diff erent_mbb
@@ -1479,27 +1479,27 @@ body: |
; BIG-NEXT: successors: %bb.1(0x80000000)
; BIG-NEXT: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; BIG-NEXT: {{ $}}
; BIG-NEXT: bb.1:
; BIG-NEXT: successors: %bb.2(0x80000000)
; BIG-NEXT: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %other_ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %some_val:_(s32) = G_CONSTANT i32 12
- ; BIG-NEXT: G_STORE %some_val(s32), %other_ptr(p0) :: (store (s16))
+ ; BIG-NEXT: %some_val:_(i32) = G_CONSTANT i32 12
+ ; BIG-NEXT: G_STORE %some_val(i32), %other_ptr(p0) :: (store (i16))
; BIG-NEXT: {{ $}}
; BIG-NEXT: bb.2:
; BIG-NEXT: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
; There is a store between the two loads, hidden away in a
diff erent MBB.
; We should not combine here.
@@ -1510,28 +1510,28 @@ body: |
liveins: $x0, $x1
; If there is a store between any of the loads, then do not combine.
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
bb.1:
liveins: $x0, $x1
successors: %bb.2(0x80000000)
; Memory could be modified here, so don't combine!
%other_ptr:_(p0) = COPY $x1
- %some_val:_(s32) = G_CONSTANT i32 12
- G_STORE %some_val, %other_ptr :: (store (s16))
+ %some_val:_(i32) = G_CONSTANT i32 12
+ G_STORE %some_val, %other_ptr :: (store (i16))
bb.2:
liveins: $x0, $x1
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1544,19 +1544,19 @@ body: |
; LITTLE-NEXT: successors: %bb.1(0x80000000)
; LITTLE-NEXT: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; LITTLE-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; LITTLE-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; LITTLE-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; LITTLE-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; LITTLE-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; LITTLE-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: bb.1:
; LITTLE-NEXT: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
- ; LITTLE-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; LITTLE-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; LITTLE-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; LITTLE-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name:
diff erent_mbb
@@ -1564,19 +1564,19 @@ body: |
; BIG-NEXT: successors: %bb.1(0x80000000)
; BIG-NEXT: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %cst_1:_(s64) = G_CONSTANT i64 1
- ; BIG-NEXT: %cst_16:_(s32) = G_CONSTANT i32 16
+ ; BIG-NEXT: %cst_1:_(i64) = G_CONSTANT i64 1
+ ; BIG-NEXT: %cst_16:_(i32) = G_CONSTANT i32 16
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- ; BIG-NEXT: %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ ; BIG-NEXT: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ ; BIG-NEXT: %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
; BIG-NEXT: {{ $}}
; BIG-NEXT: bb.1:
; BIG-NEXT: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
- ; BIG-NEXT: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- ; BIG-NEXT: %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
- ; BIG-NEXT: %full_load:_(s32) = G_OR %low_half, %high_half
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ ; BIG-NEXT: %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
+ ; BIG-NEXT: %full_load:_(i32) = G_OR %low_half, %high_half
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
; It should be possible to combine here, but it's not supported right now.
@@ -1585,20 +1585,20 @@ body: |
successors: %bb.1(0x80000000)
liveins: $x0, $x1
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
bb.1:
liveins: $x0, $x1
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1614,30 +1614,30 @@ body: |
; LITTLE: liveins: $x0, $x1
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: %ptr:_(p0) = COPY $x1
- ; LITTLE-NEXT: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; LITTLE-NEXT: $w1 = COPY %full_load(s32)
+ ; LITTLE-NEXT: %full_load:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; LITTLE-NEXT: $w1 = COPY %full_load(i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w1
;
; BIG-LABEL: name: load_first
; BIG: liveins: $x0, $x1
; BIG-NEXT: {{ $}}
; BIG-NEXT: %ptr:_(p0) = COPY $x1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
- ; BIG-NEXT: %full_load:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: $w1 = COPY %full_load(s32)
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD %ptr(p0) :: (load (s32), align 2)
+ ; BIG-NEXT: %full_load:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: $w1 = COPY %full_load(i32)
; BIG-NEXT: RET_ReallyLR implicit $w1
- %low_half:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s16))
- %cst_1:_(s64) = G_CONSTANT i64 1
- %cst_16:_(s32) = G_CONSTANT i32 16
+ %low_half:_(i32) = G_ZEXTLOAD %ptr(p0) :: (load (i16))
+ %cst_1:_(i64) = G_CONSTANT i64 1
+ %cst_16:_(i32) = G_CONSTANT i32 16
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(i64)
- %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s16))
- %high_half:_(s32) = nuw G_SHL %elt1, %cst_16(s32)
+ %elt1:_(i32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (i16))
+ %high_half:_(i32) = nuw G_SHL %elt1, %cst_16(i32)
- %full_load:_(s32) = G_OR %low_half, %high_half
- $w1 = COPY %full_load(s32)
+ %full_load:_(i32) = G_OR %low_half, %high_half
+ $w1 = COPY %full_load(i32)
RET_ReallyLR implicit $w1
...
@@ -1662,10 +1662,10 @@ body: |
; LITTLE-NEXT: {{ $}}
; LITTLE-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; LITTLE-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; LITTLE-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
- ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32), align 1)
- ; LITTLE-NEXT: G_STORE [[C]](s8), [[COPY1]](p0) :: (store (s8))
- ; LITTLE-NEXT: $w0 = COPY [[LOAD]](s32)
+ ; LITTLE-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 1
+ ; LITTLE-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (s32), align 1)
+ ; LITTLE-NEXT: G_STORE [[C]](i8), [[COPY1]](p0) :: (store (i8))
+ ; LITTLE-NEXT: $w0 = COPY [[LOAD]](i32)
; LITTLE-NEXT: RET_ReallyLR implicit $w0
;
; BIG-LABEL: name: store_between_loads_and_or
@@ -1673,36 +1673,36 @@ body: |
; BIG-NEXT: {{ $}}
; BIG-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; BIG-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; BIG-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
- ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32), align 1)
- ; BIG-NEXT: [[BSWAP:%[0-9]+]]:_(s32) = G_BSWAP [[LOAD]]
- ; BIG-NEXT: G_STORE [[C]](s8), [[COPY1]](p0) :: (store (s8))
- ; BIG-NEXT: $w0 = COPY [[BSWAP]](s32)
+ ; BIG-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 1
+ ; BIG-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (s32), align 1)
+ ; BIG-NEXT: [[BSWAP:%[0-9]+]]:_(i32) = G_BSWAP [[LOAD]]
+ ; BIG-NEXT: G_STORE [[C]](i8), [[COPY1]](p0) :: (store (i8))
+ ; BIG-NEXT: $w0 = COPY [[BSWAP]](i32)
; BIG-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %12:_(s8) = G_CONSTANT i8 1
- %15:_(s32) = G_CONSTANT i32 8
- %19:_(s32) = G_CONSTANT i32 16
- %23:_(s32) = G_CONSTANT i32 24
- %13:_(s32) = G_ZEXTLOAD %0:_(p0) :: (load (s8))
- %3:_(s64) = G_CONSTANT i64 1
- %4:_(p0) = G_PTR_ADD %0:_, %3:_(s64)
- %14:_(s32) = G_ZEXTLOAD %4:_(p0) :: (load (s8))
- %6:_(s64) = G_CONSTANT i64 2
- %7:_(p0) = G_PTR_ADD %0:_, %6:_(s64)
- %18:_(s32) = G_ZEXTLOAD %7:_(p0) :: (load (s8))
- %9:_(s64) = G_CONSTANT i64 3
- %10:_(p0) = G_PTR_ADD %0:_, %9:_(s64)
- %22:_(s32) = G_ZEXTLOAD %10:_(p0) :: (load (s8))
- G_STORE %12:_(s8), %1:_(p0) :: (store (s8))
- %16:_(s32) = nuw nsw G_SHL %14:_, %15:_(s32)
- %17:_(s32) = G_OR %16:_, %13:_
- %20:_(s32) = nuw nsw G_SHL %18:_, %19:_(s32)
- %21:_(s32) = G_OR %17:_, %20:_
- %24:_(s32) = nuw G_SHL %22:_, %23:_(s32)
- %25:_(s32) = G_OR %21:_, %24:_
- $w0 = COPY %25:_(s32)
+ %12:_(i8) = G_CONSTANT i8 1
+ %15:_(i32) = G_CONSTANT i32 8
+ %19:_(i32) = G_CONSTANT i32 16
+ %23:_(i32) = G_CONSTANT i32 24
+ %13:_(i32) = G_ZEXTLOAD %0:_(p0) :: (load (i8))
+ %3:_(i64) = G_CONSTANT i64 1
+ %4:_(p0) = G_PTR_ADD %0:_, %3:_(i64)
+ %14:_(i32) = G_ZEXTLOAD %4:_(p0) :: (load (i8))
+ %6:_(i64) = G_CONSTANT i64 2
+ %7:_(p0) = G_PTR_ADD %0:_, %6:_(i64)
+ %18:_(i32) = G_ZEXTLOAD %7:_(p0) :: (load (i8))
+ %9:_(i64) = G_CONSTANT i64 3
+ %10:_(p0) = G_PTR_ADD %0:_, %9:_(i64)
+ %22:_(i32) = G_ZEXTLOAD %10:_(p0) :: (load (i8))
+ G_STORE %12:_(i8), %1:_(p0) :: (store (i8))
+ %16:_(i32) = nuw nsw G_SHL %14:_, %15:_(i32)
+ %17:_(i32) = G_OR %16:_, %13:_
+ %20:_(i32) = nuw nsw G_SHL %18:_, %19:_(i32)
+ %21:_(i32) = G_OR %17:_, %20:_
+ %24:_(i32) = nuw G_SHL %22:_, %23:_(i32)
+ %25:_(i32) = G_OR %21:_, %24:_
+ $w0 = COPY %25:_(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-mulo-zero.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-mulo-zero.mir
index 34219c374f6ed..d6e6e4c365357 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-mulo-zero.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-mulo-zero.mir
@@ -14,18 +14,18 @@ body: |
; CHECK-LABEL: name: umulo_zero
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: %mulo:_(s32) = COPY %zero(s32)
- ; CHECK-NEXT: %carry:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %carry_wide:_(s32) = G_ZEXT %carry(s1)
- ; CHECK-NEXT: $w0 = COPY %mulo(s32)
- ; CHECK-NEXT: $w1 = COPY %carry_wide(s32)
+ ; CHECK-NEXT: %zero:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %mulo:_(i32) = COPY %zero(i32)
+ ; CHECK-NEXT: %carry:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ ; CHECK-NEXT: $w0 = COPY %mulo(i32)
+ ; CHECK-NEXT: $w1 = COPY %carry_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %mulo:_(s32), %carry:_(s1) = G_UMULO %lhs, %zero
- %carry_wide:_(s32) = G_ZEXT %carry(s1)
- $w0 = COPY %mulo(s32)
+ %lhs:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %mulo:_(i32), %carry:_(i1) = G_UMULO %lhs, %zero
+ %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ $w0 = COPY %mulo(i32)
$w1 = COPY %carry_wide
RET_ReallyLR implicit $w0
...
@@ -38,18 +38,18 @@ body: |
; CHECK-LABEL: name: smulo_zero
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: %mulo:_(s32) = COPY %zero(s32)
- ; CHECK-NEXT: %carry:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %carry_wide:_(s32) = G_ZEXT %carry(s1)
- ; CHECK-NEXT: $w0 = COPY %mulo(s32)
- ; CHECK-NEXT: $w1 = COPY %carry_wide(s32)
+ ; CHECK-NEXT: %zero:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %mulo:_(i32) = COPY %zero(i32)
+ ; CHECK-NEXT: %carry:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ ; CHECK-NEXT: $w0 = COPY %mulo(i32)
+ ; CHECK-NEXT: $w1 = COPY %carry_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %mulo:_(s32), %carry:_(s1) = G_SMULO %lhs, %zero
- %carry_wide:_(s32) = G_ZEXT %carry(s1)
- $w0 = COPY %mulo(s32)
+ %lhs:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %mulo:_(i32), %carry:_(i1) = G_SMULO %lhs, %zero
+ %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ $w0 = COPY %mulo(i32)
$w1 = COPY %carry_wide
RET_ReallyLR implicit $w0
...
@@ -62,18 +62,18 @@ body: |
; CHECK-LABEL: name: wrong_cst
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %lhs:_(s32) = COPY $w0
- ; CHECK-NEXT: %not_zero:_(s32) = G_CONSTANT i32 3
- ; CHECK-NEXT: %mulo:_(s32), %carry:_(s1) = G_UMULO %lhs, %not_zero
- ; CHECK-NEXT: %carry_wide:_(s32) = G_ZEXT %carry(s1)
- ; CHECK-NEXT: $w0 = COPY %mulo(s32)
- ; CHECK-NEXT: $w1 = COPY %carry_wide(s32)
+ ; CHECK-NEXT: %lhs:_(i32) = COPY $w0
+ ; CHECK-NEXT: %not_zero:_(i32) = G_CONSTANT i32 3
+ ; CHECK-NEXT: %mulo:_(i32), %carry:_(i1) = G_UMULO %lhs, %not_zero
+ ; CHECK-NEXT: %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ ; CHECK-NEXT: $w0 = COPY %mulo(i32)
+ ; CHECK-NEXT: $w1 = COPY %carry_wide(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %lhs:_(s32) = COPY $w0
- %not_zero:_(s32) = G_CONSTANT i32 3
- %mulo:_(s32), %carry:_(s1) = G_UMULO %lhs, %not_zero
- %carry_wide:_(s32) = G_ZEXT %carry(s1)
- $w0 = COPY %mulo(s32)
+ %lhs:_(i32) = COPY $w0
+ %not_zero:_(i32) = G_CONSTANT i32 3
+ %mulo:_(i32), %carry:_(i1) = G_UMULO %lhs, %not_zero
+ %carry_wide:_(i32) = G_ZEXT %carry(i1)
+ $w0 = COPY %mulo(i32)
$w1 = COPY %carry_wide
RET_ReallyLR implicit $w0
...
@@ -86,23 +86,23 @@ body: |
; CHECK-LABEL: name: umulo_vec_zero
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
- ; CHECK-NEXT: %mulo:_(<2 x s64>) = COPY %zero_vec(<2 x s64>)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %carry:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %carry_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %carry(<2 x s1>), %zero(s64)
- ; CHECK-NEXT: %carry_wide:_(s64) = G_ZEXT %carry_elt_0(s1)
- ; CHECK-NEXT: $q0 = COPY %mulo(<2 x s64>)
- ; CHECK-NEXT: $x0 = COPY %carry_wide(s64)
+ ; CHECK-NEXT: %zero:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero(i64), %zero(i64)
+ ; CHECK-NEXT: %mulo:_(<2 x i64>) = COPY %zero_vec(<2 x i64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %carry:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %carry_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %carry(<2 x i1>), %zero(i64)
+ ; CHECK-NEXT: %carry_wide:_(i64) = G_ZEXT %carry_elt_0(i1)
+ ; CHECK-NEXT: $q0 = COPY %mulo(<2 x i64>)
+ ; CHECK-NEXT: $x0 = COPY %carry_wide(i64)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %lhs:_(<2 x s64>) = COPY $q0
- %zero:_(s64) = G_CONSTANT i64 0
- %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
- %mulo:_(<2 x s64>), %carry:_(<2 x s1>) = G_UMULO %lhs, %zero_vec
- %carry_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %carry:_(<2 x s1>), %zero:_(s64)
- %carry_wide:_(s64) = G_ZEXT %carry_elt_0
- $q0 = COPY %mulo(<2 x s64>)
+ %lhs:_(<2 x i64>) = COPY $q0
+ %zero:_(i64) = G_CONSTANT i64 0
+ %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero, %zero
+ %mulo:_(<2 x i64>), %carry:_(<2 x i1>) = G_UMULO %lhs, %zero_vec
+ %carry_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %carry:_(<2 x i1>), %zero:_(i64)
+ %carry_wide:_(i64) = G_ZEXT %carry_elt_0
+ $q0 = COPY %mulo(<2 x i64>)
$x0 = COPY %carry_wide
RET_ReallyLR implicit $q0
...
@@ -115,22 +115,22 @@ body: |
; CHECK-LABEL: name: smulo_vec_zero
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
- ; CHECK-NEXT: %mulo:_(<2 x s64>) = COPY %zero_vec(<2 x s64>)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: %carry:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1)
- ; CHECK-NEXT: %carry_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %carry(<2 x s1>), %zero(s64)
- ; CHECK-NEXT: %carry_wide:_(s64) = G_ZEXT %carry_elt_0(s1)
- ; CHECK-NEXT: $q0 = COPY %mulo(<2 x s64>)
- ; CHECK-NEXT: $x0 = COPY %carry_wide(s64)
+ ; CHECK-NEXT: %zero:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero(i64), %zero(i64)
+ ; CHECK-NEXT: %mulo:_(<2 x i64>) = COPY %zero_vec(<2 x i64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: %carry:_(<2 x i1>) = G_BUILD_VECTOR [[C]](i1), [[C]](i1)
+ ; CHECK-NEXT: %carry_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %carry(<2 x i1>), %zero(i64)
+ ; CHECK-NEXT: %carry_wide:_(i64) = G_ZEXT %carry_elt_0(i1)
+ ; CHECK-NEXT: $q0 = COPY %mulo(<2 x i64>)
+ ; CHECK-NEXT: $x0 = COPY %carry_wide(i64)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %lhs:_(<2 x s64>) = COPY $q0
- %zero:_(s64) = G_CONSTANT i64 0
- %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
- %mulo:_(<2 x s64>), %carry:_(<2 x s1>) = G_SMULO %lhs, %zero_vec
- %carry_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %carry:_(<2 x s1>), %zero:_(s64)
- %carry_wide:_(s64) = G_ZEXT %carry_elt_0
- $q0 = COPY %mulo(<2 x s64>)
+ %lhs:_(<2 x i64>) = COPY $q0
+ %zero:_(i64) = G_CONSTANT i64 0
+ %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %zero, %zero
+ %mulo:_(<2 x i64>), %carry:_(<2 x i1>) = G_SMULO %lhs, %zero_vec
+ %carry_elt_0:_(i1) = G_EXTRACT_VECTOR_ELT %carry:_(<2 x i1>), %zero:_(i64)
+ %carry_wide:_(i64) = G_ZEXT %carry_elt_0
+ $q0 = COPY %mulo(<2 x i64>)
$x0 = COPY %carry_wide
RET_ReallyLR implicit $q0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-narrow-binop-feeding-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-narrow-binop-feeding-add.mir
index e59d308fbafa6..1f33824a605c3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-narrow-binop-feeding-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-narrow-binop-feeding-add.mir
@@ -11,20 +11,20 @@ body: |
; CHECK-LABEL: name: add_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ADD]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[ADD]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -36,20 +36,20 @@ body: |
; CHECK-LABEL: name: sub_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(i32) = G_SUB [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[SUB]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[SUB]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_SUB %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -61,20 +61,20 @@ body: |
; CHECK-LABEL: name: mul_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i32) = G_MUL [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[MUL]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[MUL]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_MUL %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_MUL %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -86,20 +86,20 @@ body: |
; CHECK-LABEL: name: and_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[AND]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[AND]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_AND %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_AND %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -111,19 +111,19 @@ body: |
; CHECK-LABEL: name: or_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %mask_32:_(s64) = G_CONSTANT i64 4294967295
- ; CHECK-NEXT: %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
- ; CHECK-NEXT: %and:_(s64) = G_OR %binop, %mask_32
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ ; CHECK-NEXT: %binop:_(i64) = G_SUB %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: %and:_(i64) = G_OR %binop, %mask_32
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
- %and:_(s64) = G_OR %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_SUB %binop_lhs, %binop_rhs
+ %and:_(i64) = G_OR %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -135,20 +135,20 @@ body: |
; CHECK-LABEL: name: xor_64_mask_32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[XOR]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[XOR]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_XOR %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_XOR %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -160,21 +160,21 @@ body: |
; CHECK-LABEL: name: walk_thru_copy
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(s64)
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i32) = G_TRUNC %binop_lhs(i64)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i32) = G_TRUNC %binop_rhs(i64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[TRUNC]], [[TRUNC1]]
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ADD]](i32)
- ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[ADD]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %copy:_(s64) = COPY %binop
- %and:_(s64) = G_AND %copy, %mask_32
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %copy:_(i64) = COPY %binop
+ %and:_(i64) = G_AND %copy, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -186,19 +186,19 @@ body: |
; CHECK-LABEL: name: dont_combine_zext_not_free_add_64_mask_16
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %mask_16:_(s64) = G_CONSTANT i64 65535
- ; CHECK-NEXT: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: %and:_(s64) = G_AND %binop, %mask_16
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %mask_16:_(i64) = G_CONSTANT i64 65535
+ ; CHECK-NEXT: %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: %and:_(i64) = G_AND %binop, %mask_16
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_16:_(s64) = G_CONSTANT i64 65535
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_16
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_16:_(i64) = G_CONSTANT i64 65535
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_16
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -210,19 +210,19 @@ body: |
; CHECK-LABEL: name: dont_combine_zext_not_free_add_64_mask_8
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %mask_8:_(s64) = G_CONSTANT i64 255
- ; CHECK-NEXT: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: %and:_(s64) = G_AND %binop, %mask_8
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %mask_8:_(i64) = G_CONSTANT i64 255
+ ; CHECK-NEXT: %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: %and:_(i64) = G_AND %binop, %mask_8
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_8:_(s64) = G_CONSTANT i64 255
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_8
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_8:_(i64) = G_CONSTANT i64 255
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_8
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -234,19 +234,19 @@ body: |
; CHECK-LABEL: name: dont_combine_not_a_mask
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %not_a_mask:_(s64) = G_CONSTANT i64 26
- ; CHECK-NEXT: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: %and:_(s64) = G_AND %binop, %not_a_mask
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %not_a_mask:_(i64) = G_CONSTANT i64 26
+ ; CHECK-NEXT: %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: %and:_(i64) = G_AND %binop, %not_a_mask
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %not_a_mask:_(s64) = G_CONSTANT i64 26
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %not_a_mask
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %not_a_mask:_(i64) = G_CONSTANT i64 26
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %not_a_mask
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -258,18 +258,18 @@ body: |
; CHECK-LABEL: name: dont_combine_more_than_one_use
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: $x0 = COPY %binop(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: $x0 = COPY %binop(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %not_a_mask:_(s64) = G_CONSTANT i64 26
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %not_a_mask
- %or:_(s64) = G_OR %and, %binop
- $x0 = COPY %or(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %not_a_mask:_(i64) = G_CONSTANT i64 26
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %not_a_mask
+ %or:_(i64) = G_OR %and, %binop
+ $x0 = COPY %or(i64)
RET_ReallyLR implicit $x0
...
---
@@ -281,21 +281,21 @@ body: |
; CHECK-LABEL: name: dont_combine_vector
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: %binop_rhs:_(<2 x s64>) = COPY $q1
- ; CHECK-NEXT: %mask_elt:_(s64) = G_CONSTANT i64 4294967295
- ; CHECK-NEXT: %mask:_(<2 x s64>) = G_BUILD_VECTOR %mask_elt(s64), %mask_elt(s64)
- ; CHECK-NEXT: %binop:_(<2 x s64>) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: %and:_(<2 x s64>) = G_AND %binop, %mask
- ; CHECK-NEXT: $q0 = COPY %and(<2 x s64>)
+ ; CHECK-NEXT: %binop_lhs:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: %binop_rhs:_(<2 x i64>) = COPY $q1
+ ; CHECK-NEXT: %mask_elt:_(i64) = G_CONSTANT i64 4294967295
+ ; CHECK-NEXT: %mask:_(<2 x i64>) = G_BUILD_VECTOR %mask_elt(i64), %mask_elt(i64)
+ ; CHECK-NEXT: %binop:_(<2 x i64>) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: %and:_(<2 x i64>) = G_AND %binop, %mask
+ ; CHECK-NEXT: $q0 = COPY %and(<2 x i64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %binop_lhs:_(<2 x s64>) = COPY $q0
- %binop_rhs:_(<2 x s64>) = COPY $q1
- %mask_elt:_(s64) = G_CONSTANT i64 4294967295
- %mask:_(<2 x s64>) = G_BUILD_VECTOR %mask_elt, %mask_elt
- %binop:_(<2 x s64>) = G_ADD %binop_lhs, %binop_rhs
- %and:_(<2 x s64>) = G_AND %binop, %mask
- $q0 = COPY %and(<2 x s64>)
+ %binop_lhs:_(<2 x i64>) = COPY $q0
+ %binop_rhs:_(<2 x i64>) = COPY $q1
+ %mask_elt:_(i64) = G_CONSTANT i64 4294967295
+ %mask:_(<2 x i64>) = G_BUILD_VECTOR %mask_elt, %mask_elt
+ %binop:_(<2 x i64>) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(<2 x i64>) = G_AND %binop, %mask
+ $q0 = COPY %and(<2 x i64>)
RET_ReallyLR implicit $q0
...
---
@@ -307,17 +307,17 @@ body: |
; CHECK-LABEL: name: dont_combine_add_64_mask_64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %binop_lhs:_(s64) = COPY $x0
- ; CHECK-NEXT: %binop_rhs:_(s64) = COPY $x1
- ; CHECK-NEXT: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- ; CHECK-NEXT: $x0 = COPY %binop(s64)
+ ; CHECK-NEXT: %binop_lhs:_(i64) = COPY $x0
+ ; CHECK-NEXT: %binop_rhs:_(i64) = COPY $x1
+ ; CHECK-NEXT: %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ ; CHECK-NEXT: $x0 = COPY %binop(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %binop_lhs:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_64:_(s64) = G_CONSTANT i64 18446744073709551615
- %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
- %and:_(s64) = G_AND %binop, %mask_64
- $x0 = COPY %and(s64)
+ %binop_lhs:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_64:_(i64) = G_CONSTANT i64 18446744073709551615
+ %binop:_(i64) = G_ADD %binop_lhs, %binop_rhs
+ %and:_(i64) = G_AND %binop, %mask_64
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
---
@@ -329,15 +329,15 @@ body: |
; CHECK-LABEL: name: dont_combine_copy_from_physreg
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy_from_physreg:_(s64) = COPY $x0
- ; CHECK-NEXT: %mask_32:_(s64) = G_CONSTANT i64 4294967295
- ; CHECK-NEXT: %and:_(s64) = G_AND %copy_from_physreg, %mask_32
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %copy_from_physreg:_(i64) = COPY $x0
+ ; CHECK-NEXT: %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ ; CHECK-NEXT: %and:_(i64) = G_AND %copy_from_physreg, %mask_32
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %copy_from_physreg:_(s64) = COPY $x0
- %binop_rhs:_(s64) = COPY $x1
- %mask_32:_(s64) = G_CONSTANT i64 4294967295
- %copy:_(s64) = COPY %copy_from_physreg
- %and:_(s64) = G_AND %copy, %mask_32
- $x0 = COPY %and(s64)
+ %copy_from_physreg:_(i64) = COPY $x0
+ %binop_rhs:_(i64) = COPY $x1
+ %mask_32:_(i64) = G_CONSTANT i64 4294967295
+ %copy:_(i64) = COPY %copy_from_physreg
+ %and:_(i64) = G_AND %copy, %mask_32
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
index f9ae94805842c..1e1e94e9c5b95 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
@@ -9,16 +9,16 @@ body: |
; CHECK-LABEL: name: test_s16
; CHECK: liveins: $h0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0.000000e+00
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(s16) = G_FMAXIMUM [[COPY]], [[C]]
- ; CHECK-NEXT: $h0 = COPY [[FMAXIMUM]](s16)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f16) = COPY $h0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0.000000e+00
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(f16) = G_FMAXIMUM [[COPY]], [[C]]
+ ; CHECK-NEXT: $h0 = COPY [[FMAXIMUM]](f16)
; CHECK-NEXT: RET_ReallyLR implicit $h0
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_FCONSTANT half 0xH0000
- %2:_(s1) = G_FCMP floatpred(olt), %0(s16), %1
- %3:_(s16) = G_SELECT %2(s1), %1, %0
- $h0 = COPY %3(s16)
+ %0:_(f16) = COPY $h0
+ %1:_(f16) = G_FCONSTANT half 0xH0000
+ %2:_(i1) = G_FCMP floatpred(olt), %0(f16), %1
+ %3:_(f16) = G_SELECT %2(i1), %1, %0
+ $h0 = COPY %3(f16)
RET_ReallyLR implicit $h0
...
@@ -31,16 +31,16 @@ body: |
; CHECK-LABEL: name: test_s32
; CHECK: liveins: $s0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(s32) = G_FMAXIMUM [[COPY]], [[C]]
- ; CHECK-NEXT: $s0 = COPY [[FMAXIMUM]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f32) = COPY $s0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(f32) = G_FMAXIMUM [[COPY]], [[C]]
+ ; CHECK-NEXT: $s0 = COPY [[FMAXIMUM]](f32)
; CHECK-NEXT: RET_ReallyLR implicit $s0
- %0:_(s32) = COPY $s0
- %1:_(s32) = G_FCONSTANT float 0.000000e+00
- %2:_(s1) = G_FCMP floatpred(olt), %0(s32), %1
- %3:_(s32) = G_SELECT %2(s1), %1, %0
- $s0 = COPY %3(s32)
+ %0:_(f32) = COPY $s0
+ %1:_(f32) = G_FCONSTANT float 0.000000e+00
+ %2:_(i1) = G_FCMP floatpred(olt), %0(f32), %1
+ %3:_(f32) = G_SELECT %2(i1), %1, %0
+ $s0 = COPY %3(f32)
RET_ReallyLR implicit $s0
...
@@ -53,16 +53,16 @@ body: |
; CHECK-LABEL: name: test_s64
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(s64) = G_FMAXIMUM [[COPY]], [[C]]
- ; CHECK-NEXT: $d0 = COPY [[FMAXIMUM]](s64)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f64) = COPY $d0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(f64) = G_FMAXIMUM [[COPY]], [[C]]
+ ; CHECK-NEXT: $d0 = COPY [[FMAXIMUM]](f64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %0:_(s64) = COPY $d0
- %1:_(s64) = G_FCONSTANT double 0.000000e+00
- %2:_(s1) = G_FCMP floatpred(olt), %0(s64), %1
- %3:_(s64) = G_SELECT %2(s1), %1, %0
- $d0 = COPY %3(s64)
+ %0:_(f64) = COPY $d0
+ %1:_(f64) = G_FCONSTANT double 0.000000e+00
+ %2:_(i1) = G_FCMP floatpred(olt), %0(f64), %1
+ %3:_(f64) = G_SELECT %2(i1), %1, %0
+ $d0 = COPY %3(f64)
RET_ReallyLR implicit $d0
...
@@ -75,16 +75,16 @@ body: |
; CHECK-LABEL: name: test_s64_fmin
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: [[FMINIMUM:%[0-9]+]]:_(s64) = G_FMINIMUM [[COPY]], [[C]]
- ; CHECK-NEXT: $d0 = COPY [[FMINIMUM]](s64)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f64) = COPY $d0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[FMINIMUM:%[0-9]+]]:_(f64) = G_FMINIMUM [[COPY]], [[C]]
+ ; CHECK-NEXT: $d0 = COPY [[FMINIMUM]](f64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %0:_(s64) = COPY $d0
- %1:_(s64) = G_FCONSTANT double 0.000000e+00
- %2:_(s1) = G_FCMP floatpred(ogt), %0(s64), %1
- %3:_(s64) = G_SELECT %2(s1), %1, %0
- $d0 = COPY %3(s64)
+ %0:_(f64) = COPY $d0
+ %1:_(f64) = G_FCONSTANT double 0.000000e+00
+ %2:_(i1) = G_FCMP floatpred(ogt), %0(f64), %1
+ %3:_(f64) = G_SELECT %2(i1), %1, %0
+ $d0 = COPY %3(f64)
RET_ReallyLR implicit $d0
...
@@ -97,18 +97,18 @@ body: |
; CHECK-LABEL: name: test_v8s16
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16), [[C]](s16)
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<8 x s16>) = G_FMAXIMUM [[COPY]], [[BUILD_VECTOR]]
- ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<8 x s16>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x f16>) = COPY $q0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x f16>) = G_BUILD_VECTOR [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16), [[C]](f16)
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<8 x f16>) = G_FMAXIMUM [[COPY]], [[BUILD_VECTOR]]
+ ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<8 x f16>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<8 x s16>) = COPY $q0
- %2:_(s16) = G_FCONSTANT half 0xH0000
- %1:_(<8 x s16>) = G_BUILD_VECTOR %2(s16), %2(s16), %2(s16), %2(s16), %2(s16), %2(s16), %2(s16), %2(s16)
- %3:_(<8 x s1>) = G_FCMP floatpred(olt), %0(<8 x s16>), %1
- %4:_(<8 x s16>) = G_SELECT %3(<8 x s1>), %1, %0
- $q0 = COPY %4(<8 x s16>)
+ %0:_(<8 x f16>) = COPY $q0
+ %2:_(f16) = G_FCONSTANT half 0xH0000
+ %1:_(<8 x f16>) = G_BUILD_VECTOR %2(f16), %2(f16), %2(f16), %2(f16), %2(f16), %2(f16), %2(f16), %2(f16)
+ %3:_(<8 x i1>) = G_FCMP floatpred(olt), %0(<8 x f16>), %1
+ %4:_(<8 x f16>) = G_SELECT %3(<8 x i1>), %1, %0
+ $q0 = COPY %4(<8 x f16>)
RET_ReallyLR implicit $q0
...
@@ -121,20 +121,20 @@ body: |
; CHECK-LABEL: name: test_v4s32
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s32>) = G_BITCAST [[COPY]](<2 x s64>)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<4 x s32>) = G_FMAXIMUM [[BITCAST]], [[BUILD_VECTOR]]
- ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<4 x s32>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x f32>) = G_BITCAST [[COPY]](<2 x i64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x f32>) = G_BUILD_VECTOR [[C]](f32), [[C]](f32), [[C]](f32), [[C]](f32)
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<4 x f32>) = G_FMAXIMUM [[BITCAST]], [[BUILD_VECTOR]]
+ ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<4 x f32>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %1:_(<2 x s64>) = COPY $q0
- %0:_(<4 x s32>) = G_BITCAST %1(<2 x s64>)
- %3:_(s32) = G_FCONSTANT float 0.000000e+00
- %2:_(<4 x s32>) = G_BUILD_VECTOR %3(s32), %3(s32), %3(s32), %3(s32)
- %4:_(<4 x s1>) = G_FCMP floatpred(olt), %0(<4 x s32>), %2
- %5:_(<4 x s32>) = G_SELECT %4(<4 x s1>), %2, %0
- $q0 = COPY %5(<4 x s32>)
+ %1:_(<2 x i64>) = COPY $q0
+ %0:_(<4 x f32>) = G_BITCAST %1(<2 x i64>)
+ %3:_(f32) = G_FCONSTANT float 0.000000e+00
+ %2:_(<4 x f32>) = G_BUILD_VECTOR %3(f32), %3(f32), %3(f32), %3(f32)
+ %4:_(<4 x i1>) = G_FCMP floatpred(olt), %0(<4 x f32>), %2
+ %5:_(<4 x f32>) = G_SELECT %4(<4 x i1>), %2, %0
+ $q0 = COPY %5(<4 x f32>)
RET_ReallyLR implicit $q0
...
@@ -147,18 +147,18 @@ body: |
; CHECK-LABEL: name: test_v2s64
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
- ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<2 x s64>) = G_FMAXIMUM [[COPY]], [[BUILD_VECTOR]]
- ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<2 x s64>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x f64>) = COPY $q0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[C]](f64), [[C]](f64)
+ ; CHECK-NEXT: [[FMAXIMUM:%[0-9]+]]:_(<2 x f64>) = G_FMAXIMUM [[COPY]], [[BUILD_VECTOR]]
+ ; CHECK-NEXT: $q0 = COPY [[FMAXIMUM]](<2 x f64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<2 x s64>) = COPY $q0
- %2:_(s64) = G_FCONSTANT double 0.000000e+00
- %1:_(<2 x s64>) = G_BUILD_VECTOR %2(s64), %2(s64)
- %3:_(<2 x s1>) = G_FCMP floatpred(olt), %0(<2 x s64>), %1
- %4:_(<2 x s64>) = G_SELECT %3(<2 x s1>), %1, %0
- $q0 = COPY %4(<2 x s64>)
+ %0:_(<2 x f64>) = COPY $q0
+ %2:_(f64) = G_FCONSTANT double 0.000000e+00
+ %1:_(<2 x f64>) = G_BUILD_VECTOR %2(f64), %2(f64)
+ %3:_(<2 x i1>) = G_FCMP floatpred(olt), %0(<2 x f64>), %1
+ %4:_(<2 x f64>) = G_SELECT %3(<2 x i1>), %1, %0
+ $q0 = COPY %4(<2 x f64>)
RET_ReallyLR implicit $q0
...
@@ -171,18 +171,18 @@ body: |
; CHECK-LABEL: name: test_v2s64_fmin
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
- ; CHECK-NEXT: [[FMINIMUM:%[0-9]+]]:_(<2 x s64>) = G_FMINIMUM [[COPY]], [[BUILD_VECTOR]]
- ; CHECK-NEXT: $q0 = COPY [[FMINIMUM]](<2 x s64>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x f64>) = COPY $q0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_FCONSTANT double 0.000000e+00
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[C]](f64), [[C]](f64)
+ ; CHECK-NEXT: [[FMINIMUM:%[0-9]+]]:_(<2 x f64>) = G_FMINIMUM [[COPY]], [[BUILD_VECTOR]]
+ ; CHECK-NEXT: $q0 = COPY [[FMINIMUM]](<2 x f64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<2 x s64>) = COPY $q0
- %2:_(s64) = G_FCONSTANT double 0.000000e+00
- %1:_(<2 x s64>) = G_BUILD_VECTOR %2(s64), %2(s64)
- %3:_(<2 x s1>) = G_FCMP floatpred(ogt), %0(<2 x s64>), %1
- %4:_(<2 x s64>) = G_SELECT %3(<2 x s1>), %1, %0
- $q0 = COPY %4(<2 x s64>)
+ %0:_(<2 x f64>) = COPY $q0
+ %2:_(f64) = G_FCONSTANT double 0.000000e+00
+ %1:_(<2 x f64>) = G_BUILD_VECTOR %2(f64), %2(f64)
+ %3:_(<2 x i1>) = G_FCMP floatpred(ogt), %0(<2 x f64>), %1
+ %4:_(<2 x f64>) = G_SELECT %3(<2 x i1>), %1, %0
+ $q0 = COPY %4(<2 x f64>)
RET_ReallyLR implicit $q0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
index 3d0d591bccc17..9ec6305b3792c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
@@ -9,18 +9,18 @@ body: |
; CHECK-LABEL: name: test_foldable_s32
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[SRC:%src]]:_(<2 x s32>) = COPY $x1
- ; CHECK-NEXT: [[UNDEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[MID:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[SRC]](<2 x s32>), [[UNDEF]](<2 x s32>)
- ; CHECK-NEXT: [[DST:%dst]]:_(<4 x s16>) = G_TRUNC [[MID]]
+ ; CHECK-NEXT: [[SRC:%src]]:_(<2 x i32>) = COPY $x1
+ ; CHECK-NEXT: [[UNDEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[MID:%[0-9]+]]:_(<4 x i32>) = G_CONCAT_VECTORS [[SRC]](<2 x i32>), [[UNDEF]](<2 x i32>)
+ ; CHECK-NEXT: [[DST:%dst]]:_(<4 x i16>) = G_TRUNC [[MID]]
; CHECK-NEXT: $x0 = COPY [[DST]]
- %src:_(<2 x s32>) = COPY $x1
- %a:_(s32), %b:_(s32) = G_UNMERGE_VALUES %src:_(<2 x s32>)
- %T_a:_(s16) = G_TRUNC %a:_(s32)
- %T_b:_(s16) = G_TRUNC %b:_(s32)
- %Undef:_(s16) = G_IMPLICIT_DEF
- %dst:_(<4 x s16>) = G_BUILD_VECTOR %T_a:_(s16), %T_b:_(s16), %Undef:_(s16), %Undef:_(s16)
+ %src:_(<2 x i32>) = COPY $x1
+ %a:_(i32), %b:_(i32) = G_UNMERGE_VALUES %src:_(<2 x i32>)
+ %T_a:_(i16) = G_TRUNC %a:_(i32)
+ %T_b:_(i16) = G_TRUNC %b:_(i32)
+ %Undef:_(i16) = G_IMPLICIT_DEF
+ %dst:_(<4 x i16>) = G_BUILD_VECTOR %T_a:_(i16), %T_b:_(i16), %Undef:_(i16), %Undef:_(i16)
$x0 = COPY %dst
...
---
@@ -32,21 +32,21 @@ body: |
; CHECK-LABEL: name: test_unfoldable_s32
; CHECK: liveins: $w0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[SRC:%src]]:_(<2 x s32>) = COPY $x1
- ; CHECK-NEXT: [[A:%a]]:_(s16), [[B:%b]]:_(s16), [[C:%c]]:_(s16), %d:_(s16) = G_UNMERGE_VALUES [[SRC]](<2 x s32>)
- ; CHECK-NEXT: [[T_A:%T_a]]:_(s8) = G_TRUNC [[A]](s16)
- ; CHECK-NEXT: [[T_B:%T_b]]:_(s8) = G_TRUNC [[B]](s16)
- ; CHECK-NEXT: [[T_C:%T_c]]:_(s8) = G_TRUNC [[C]](s16)
- ; CHECK-NEXT: [[UNDEF:%Undef]]:_(s8) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[DST:%dst]]:_(<4 x s8>) = G_BUILD_VECTOR [[T_A]](s8), [[T_B]](s8), [[T_C]](s8), [[UNDEF]](s8)
- ; CHECK-NEXT: $w0 = COPY [[DST]](<4 x s8>)
- %src:_(<2 x s32>) = COPY $x1
- %a:_(s16), %b:_(s16), %c:_(s16), %d:_(s16) = G_UNMERGE_VALUES %src:_(<2 x s32>)
- %T_a:_(s8) = G_TRUNC %a:_(s16)
- %T_b:_(s8) = G_TRUNC %b:_(s16)
- %T_c:_(s8) = G_TRUNC %c:_(s16)
- %Undef:_(s8) = G_IMPLICIT_DEF
- %dst:_(<4 x s8>) = G_BUILD_VECTOR %T_a:_(s8), %T_b:_(s8), %T_c:_(s8), %Undef:_(s8)
+ ; CHECK-NEXT: [[SRC:%src]]:_(<2 x i32>) = COPY $x1
+ ; CHECK-NEXT: [[A:%a]]:_(i16), [[B:%b]]:_(i16), [[C:%c]]:_(i16), %d:_(i16) = G_UNMERGE_VALUES [[SRC]](<2 x i32>)
+ ; CHECK-NEXT: [[T_A:%T_a]]:_(i8) = G_TRUNC [[A]](i16)
+ ; CHECK-NEXT: [[T_B:%T_b]]:_(i8) = G_TRUNC [[B]](i16)
+ ; CHECK-NEXT: [[T_C:%T_c]]:_(i8) = G_TRUNC [[C]](i16)
+ ; CHECK-NEXT: [[UNDEF:%Undef]]:_(i8) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[DST:%dst]]:_(<4 x i8>) = G_BUILD_VECTOR [[T_A]](i8), [[T_B]](i8), [[T_C]](i8), [[UNDEF]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[DST]](<4 x i8>)
+ %src:_(<2 x i32>) = COPY $x1
+ %a:_(i16), %b:_(i16), %c:_(i16), %d:_(i16) = G_UNMERGE_VALUES %src:_(<2 x i32>)
+ %T_a:_(i8) = G_TRUNC %a:_(i16)
+ %T_b:_(i8) = G_TRUNC %b:_(i16)
+ %T_c:_(i8) = G_TRUNC %c:_(i16)
+ %Undef:_(i8) = G_IMPLICIT_DEF
+ %dst:_(<4 x i8>) = G_BUILD_VECTOR %T_a:_(i8), %T_b:_(i8), %T_c:_(i8), %Undef:_(i8)
$w0 = COPY %dst
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir
index 9e540390dd37f..f4a54079e9fe0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir
@@ -13,19 +13,19 @@ body: |
; CHECK-LABEL: name: ashr_shl_to_sext_inreg
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s16) = G_SEXT_INREG [[TRUNC]], 8
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXT_INREG]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i16) = G_SEXT_INREG [[TRUNC]], 8
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[SEXT_INREG]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %1:_(s32) = COPY $w0
- %0:_(s16) = G_TRUNC %1(s32)
- %2:_(s16) = G_CONSTANT i16 8
- %3:_(s16) = G_SHL %0, %2(s16)
- %4:_(s16) = exact G_ASHR %3, %2(s16)
- %5:_(s32) = G_ANYEXT %4(s16)
- $w0 = COPY %5(s32)
+ %1:_(i32) = COPY $w0
+ %0:_(i16) = G_TRUNC %1(i32)
+ %2:_(i16) = G_CONSTANT i16 8
+ %3:_(i16) = G_SHL %0, %2(i16)
+ %4:_(i16) = exact G_ASHR %3, %2(i16)
+ %5:_(i32) = G_ANYEXT %4(i16)
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
@@ -42,23 +42,23 @@ body: |
; CHECK-LABEL: name:
diff erent_shift_amts
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 12
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[TRUNC]], [[C]](s16)
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s16) = exact G_ASHR [[SHL]], [[C1]](s16)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ASHR]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i16) = G_CONSTANT i16 12
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i16) = G_CONSTANT i16 8
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i16) = G_SHL [[TRUNC]], [[C]](i16)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(i16) = exact G_ASHR [[SHL]], [[C1]](i16)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[ASHR]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %1:_(s32) = COPY $w0
- %0:_(s16) = G_TRUNC %1(s32)
- %2:_(s16) = G_CONSTANT i16 12
- %4:_(s16) = G_CONSTANT i16 8
- %3:_(s16) = G_SHL %0, %2(s16)
- %5:_(s16) = exact G_ASHR %3, %4(s16)
- %6:_(s32) = G_ANYEXT %5(s16)
- $w0 = COPY %6(s32)
+ %1:_(i32) = COPY $w0
+ %0:_(i16) = G_TRUNC %1(i32)
+ %2:_(i16) = G_CONSTANT i16 12
+ %4:_(i16) = G_CONSTANT i16 8
+ %3:_(i16) = G_SHL %0, %2(i16)
+ %5:_(i16) = exact G_ASHR %3, %4(i16)
+ %6:_(i32) = G_ANYEXT %5(i16)
+ $w0 = COPY %6(i32)
RET_ReallyLR implicit $w0
...
@@ -74,15 +74,15 @@ body: |
; CHECK-LABEL: name: ashr_shl_to_sext_inreg_vector
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<4 x s16>) = G_SEXT_INREG [[COPY]], 8
- ; CHECK-NEXT: $d0 = COPY [[SEXT_INREG]](<4 x s16>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i16>) = COPY $d0
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(<4 x i16>) = G_SEXT_INREG [[COPY]], 8
+ ; CHECK-NEXT: $d0 = COPY [[SEXT_INREG]](<4 x i16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %0:_(<4 x s16>) = COPY $d0
- %2:_(s16) = G_CONSTANT i16 8
- %1:_(<4 x s16>) = G_BUILD_VECTOR %2(s16), %2(s16), %2(s16), %2(s16)
- %3:_(<4 x s16>) = G_SHL %0, %1(<4 x s16>)
- %4:_(<4 x s16>) = exact G_ASHR %3, %1(<4 x s16>)
- $d0 = COPY %4(<4 x s16>)
+ %0:_(<4 x i16>) = COPY $d0
+ %2:_(i16) = G_CONSTANT i16 8
+ %1:_(<4 x i16>) = G_BUILD_VECTOR %2(i16), %2(i16), %2(i16), %2(i16)
+ %3:_(<4 x i16>) = G_SHL %0, %1(<4 x i16>)
+ %4:_(<4 x i16>) = exact G_ASHR %3, %1(<4 x i16>)
+ $d0 = COPY %4(<4 x i16>)
RET_ReallyLR implicit $d0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir
index a3d5294a99c5d..84b42b03fa38a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir
@@ -10,12 +10,12 @@ body: |
; Fold: x or x -> x
; CHECK-LABEL: name: or_same
; CHECK: liveins: $x0
- ; CHECK: %copy:_(s64) = COPY $x0
- ; CHECK: $x0 = COPY %copy(s64)
+ ; CHECK: %copy:_(i64) = COPY $x0
+ ; CHECK: $x0 = COPY %copy(i64)
; CHECK: RET_ReallyLR implicit $x0
- %copy:_(s64) = COPY $x0
- %or:_(s64) = G_OR %copy, %copy
- $x0 = COPY %or(s64)
+ %copy:_(i64) = COPY $x0
+ %or:_(i64) = G_OR %copy, %copy
+ $x0 = COPY %or(i64)
RET_ReallyLR implicit $x0
...
@@ -31,12 +31,12 @@ body: |
; CHECK-LABEL: name: and_same
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy:_(s64) = COPY $x0
- ; CHECK-NEXT: $x0 = COPY %copy(s64)
+ ; CHECK-NEXT: %copy:_(i64) = COPY $x0
+ ; CHECK-NEXT: $x0 = COPY %copy(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %copy:_(s64) = COPY $x0
- %and:_(s64) = G_AND %copy, %copy
- $x0 = COPY %and(s64)
+ %copy:_(i64) = COPY $x0
+ %and:_(i64) = G_AND %copy, %copy
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
@@ -52,17 +52,17 @@ body: |
; CHECK-LABEL: name: and_same2
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy1:_(s64) = COPY $x0
- ; CHECK-NEXT: %copy2:_(s64) = COPY $x1
- ; CHECK-NEXT: %or:_(s64) = G_OR %copy1, %copy2
- ; CHECK-NEXT: $x0 = COPY %or(s64)
+ ; CHECK-NEXT: %copy1:_(i64) = COPY $x0
+ ; CHECK-NEXT: %copy2:_(i64) = COPY $x1
+ ; CHECK-NEXT: %or:_(i64) = G_OR %copy1, %copy2
+ ; CHECK-NEXT: $x0 = COPY %or(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %copy1:_(s64) = COPY $x0
- %copy2:_(s64) = COPY $x1
- %or:_(s64) = G_OR %copy1, %copy2
- %same_as_or:_(s64) = COPY %or(s64)
- %and:_(s64) = G_AND %or, %same_as_or
- $x0 = COPY %and(s64)
+ %copy1:_(i64) = COPY $x0
+ %copy2:_(i64) = COPY $x1
+ %or:_(i64) = G_OR %copy1, %copy2
+ %same_as_or:_(i64) = COPY %or(i64)
+ %and:_(i64) = G_AND %or, %same_as_or
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
@@ -79,21 +79,21 @@ body: |
; CHECK-LABEL: name: or_and_not_same
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy1:_(s64) = COPY $x0
- ; CHECK-NEXT: %copy2:_(s64) = COPY $x1
- ; CHECK-NEXT: %copy3:_(s64) = COPY $x2
- ; CHECK-NEXT: %or1:_(s64) = G_OR %copy1, %copy2
- ; CHECK-NEXT: %or2:_(s64) = G_OR %copy1, %copy3
- ; CHECK-NEXT: %and:_(s64) = G_AND %or1, %or2
- ; CHECK-NEXT: $x0 = COPY %and(s64)
+ ; CHECK-NEXT: %copy1:_(i64) = COPY $x0
+ ; CHECK-NEXT: %copy2:_(i64) = COPY $x1
+ ; CHECK-NEXT: %copy3:_(i64) = COPY $x2
+ ; CHECK-NEXT: %or1:_(i64) = G_OR %copy1, %copy2
+ ; CHECK-NEXT: %or2:_(i64) = G_OR %copy1, %copy3
+ ; CHECK-NEXT: %and:_(i64) = G_AND %or1, %or2
+ ; CHECK-NEXT: $x0 = COPY %and(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %copy1:_(s64) = COPY $x0
- %copy2:_(s64) = COPY $x1
- %copy3:_(s64) = COPY $x2
- %or1:_(s64) = G_OR %copy1, %copy2
- %or2:_(s64) = G_OR %copy1, %copy3
- %and:_(s64) = G_AND %or1, %or2
- $x0 = COPY %and(s64)
+ %copy1:_(i64) = COPY $x0
+ %copy2:_(i64) = COPY $x1
+ %copy3:_(i64) = COPY $x2
+ %or1:_(i64) = G_OR %copy1, %copy2
+ %or2:_(i64) = G_OR %copy1, %copy3
+ %and:_(i64) = G_AND %or1, %or2
+ $x0 = COPY %and(i64)
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
index fd49f7ffc15eb..0eced1144b0b0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
@@ -41,56 +41,56 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
- ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[C2]]
- ; CHECK-NEXT: G_BRCOND [[XOR]](s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sgt), [[COPY]](i32), [[C]]
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i1) = G_XOR [[ICMP]], [[C2]]
+ ; CHECK-NEXT: G_BRCOND [[XOR]](i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.if.then:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = nsw G_ADD [[COPY1]], [[COPY]]
- ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = nsw G_ADD [[ADD]], [[COPY1]]
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = nsw G_ADD [[COPY1]], [[COPY]]
+ ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(i32) = nsw G_ADD [[ADD]], [[COPY1]]
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.if.end:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = nsw G_MUL [[COPY1]], [[COPY1]]
- ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = nuw nsw G_ADD [[MUL]], [[C1]]
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i32) = nsw G_MUL [[COPY1]], [[COPY1]]
+ ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(i32) = nuw nsw G_ADD [[MUL]], [[C1]]
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3.return:
- ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[ADD1]](s32), %bb.1, [[ADD2]](s32), %bb.2
- ; CHECK-NEXT: $w0 = COPY [[PHI]](s32)
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(i32) = G_PHI [[ADD1]](i32), %bb.1, [[ADD2]](i32), %bb.2
+ ; CHECK-NEXT: $w0 = COPY [[PHI]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_CONSTANT i32 0
- %5:_(s32) = G_CONSTANT i32 2
- %3:_(s1) = G_ICMP intpred(sgt), %0(s32), %2
- G_BRCOND %3(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_CONSTANT i32 0
+ %5:_(i32) = G_CONSTANT i32 2
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i32), %2
+ G_BRCOND %3(i1), %bb.2
G_BR %bb.3
bb.2.if.then:
- %7:_(s32) = nsw G_ADD %1, %0
- %8:_(s32) = nsw G_ADD %7, %1
+ %7:_(i32) = nsw G_ADD %1, %0
+ %8:_(i32) = nsw G_ADD %7, %1
G_BR %bb.4
bb.3.if.end:
- %4:_(s32) = nsw G_MUL %1, %1
- %6:_(s32) = nuw nsw G_ADD %4, %5
+ %4:_(i32) = nsw G_MUL %1, %1
+ %6:_(i32) = nuw nsw G_ADD %4, %5
bb.4.return:
- %10:_(s32) = G_PHI %8(s32), %bb.2, %6(s32), %bb.3
- $w0 = COPY %10(s32)
+ %10:_(i32) = G_PHI %8(i32), %bb.2, %6(i32), %bb.3
+ $w0 = COPY %10(i32)
RET_ReallyLR implicit $w0
...
@@ -103,17 +103,17 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cond:_(s1) = G_IMPLICIT_DEF
- ; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
+ ; CHECK-NEXT: %cond:_(i1) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: G_BRCOND %cond(i1), %bb.1
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: RET_ReallyLR
bb.0:
liveins: $w0, $w1
- %cond:_(s1) = G_IMPLICIT_DEF
+ %cond:_(i1) = G_IMPLICIT_DEF
- G_BRCOND %cond(s1), %bb.1
+ G_BRCOND %cond(i1), %bb.1
G_BR %bb.1
bb.1:
RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir
index a152b3fdf1119..892d63f45d02b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir
@@ -24,22 +24,22 @@ body: |
; DARWIN: liveins: $x0, $x1
; DARWIN-NEXT: {{ $}}
; DARWIN-NEXT: %ptr:_(p0) = COPY $x0
- ; DARWIN-NEXT: %width:_(s64) = COPY $x1
- ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(s64), 0 :: (store (s32))
+ ; DARWIN-NEXT: %width:_(i64) = COPY $x1
+ ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(i64), 0 :: (store (i32))
; DARWIN-NEXT: RET_ReallyLR
;
; UNKNOWN-LABEL: name: bzero_unknown_width
; UNKNOWN: liveins: $x0, $x1
; UNKNOWN-NEXT: {{ $}}
; UNKNOWN-NEXT: %ptr:_(p0) = COPY $x0
- ; UNKNOWN-NEXT: %zero:_(s8) = G_CONSTANT i8 0
- ; UNKNOWN-NEXT: %width:_(s64) = COPY $x1
- ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ ; UNKNOWN-NEXT: %zero:_(i8) = G_CONSTANT i8 0
+ ; UNKNOWN-NEXT: %width:_(i64) = COPY $x1
+ ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
; UNKNOWN-NEXT: RET_ReallyLR
%ptr:_(p0) = COPY $x0
- %zero:_(s8) = G_CONSTANT i8 0
- %width:_(s64) = COPY $x1
- G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ %zero:_(i8) = G_CONSTANT i8 0
+ %width:_(i64) = COPY $x1
+ G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
RET_ReallyLR
...
---
@@ -52,22 +52,22 @@ body: |
; DARWIN: liveins: $x0, $x1
; DARWIN-NEXT: {{ $}}
; DARWIN-NEXT: %ptr:_(p0) = COPY $x0
- ; DARWIN-NEXT: %width:_(s64) = COPY $x1
- ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(s64), 1 :: (store (s32))
+ ; DARWIN-NEXT: %width:_(i64) = COPY $x1
+ ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(i64), 1 :: (store (i32))
; DARWIN-NEXT: RET_ReallyLR
;
; UNKNOWN-LABEL: name: bzero_tail_unknown_width
; UNKNOWN: liveins: $x0, $x1
; UNKNOWN-NEXT: {{ $}}
; UNKNOWN-NEXT: %ptr:_(p0) = COPY $x0
- ; UNKNOWN-NEXT: %zero:_(s8) = G_CONSTANT i8 0
- ; UNKNOWN-NEXT: %width:_(s64) = COPY $x1
- ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(s8), %width(s64), 1 :: (store (s32))
+ ; UNKNOWN-NEXT: %zero:_(i8) = G_CONSTANT i8 0
+ ; UNKNOWN-NEXT: %width:_(i64) = COPY $x1
+ ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(i8), %width(i64), 1 :: (store (i32))
; UNKNOWN-NEXT: RET_ReallyLR
%ptr:_(p0) = COPY $x0
- %zero:_(s8) = G_CONSTANT i8 0
- %width:_(s64) = COPY $x1
- G_MEMSET %ptr(p0), %zero(s8), %width(s64), 1 :: (store (s32))
+ %zero:_(i8) = G_CONSTANT i8 0
+ %width:_(i64) = COPY $x1
+ G_MEMSET %ptr(p0), %zero(i8), %width(i64), 1 :: (store (i32))
RET_ReallyLR
...
---
@@ -82,22 +82,22 @@ body: |
; DARWIN: liveins: $x0, $x1
; DARWIN-NEXT: {{ $}}
; DARWIN-NEXT: %ptr:_(p0) = COPY $x0
- ; DARWIN-NEXT: %width:_(s64) = G_CONSTANT i64 1024
- ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(s64), 0 :: (store (s32))
+ ; DARWIN-NEXT: %width:_(i64) = G_CONSTANT i64 1024
+ ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(i64), 0 :: (store (i32))
; DARWIN-NEXT: RET_ReallyLR
;
; UNKNOWN-LABEL: name: bzero_constant_width
; UNKNOWN: liveins: $x0, $x1
; UNKNOWN-NEXT: {{ $}}
; UNKNOWN-NEXT: %ptr:_(p0) = COPY $x0
- ; UNKNOWN-NEXT: %zero:_(s8) = G_CONSTANT i8 0
- ; UNKNOWN-NEXT: %width:_(s64) = G_CONSTANT i64 1024
- ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ ; UNKNOWN-NEXT: %zero:_(i8) = G_CONSTANT i8 0
+ ; UNKNOWN-NEXT: %width:_(i64) = G_CONSTANT i64 1024
+ ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
; UNKNOWN-NEXT: RET_ReallyLR
%ptr:_(p0) = COPY $x0
- %zero:_(s8) = G_CONSTANT i8 0
- %width:_(s64) = G_CONSTANT i64 1024
- G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ %zero:_(i8) = G_CONSTANT i8 0
+ %width:_(i64) = G_CONSTANT i64 1024
+ G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
RET_ReallyLR
...
---
@@ -112,22 +112,22 @@ body: |
; DARWIN: liveins: $x0, $x1
; DARWIN-NEXT: {{ $}}
; DARWIN-NEXT: %ptr:_(p0) = COPY $x0
- ; DARWIN-NEXT: %width:_(s64) = G_CONSTANT i64 256
- ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(s64), 0 :: (store (s32))
+ ; DARWIN-NEXT: %width:_(i64) = G_CONSTANT i64 256
+ ; DARWIN-NEXT: G_BZERO %ptr(p0), %width(i64), 0 :: (store (i32))
; DARWIN-NEXT: RET_ReallyLR
;
; UNKNOWN-LABEL: name: bzero_constant_width_minsize
; UNKNOWN: liveins: $x0, $x1
; UNKNOWN-NEXT: {{ $}}
; UNKNOWN-NEXT: %ptr:_(p0) = COPY $x0
- ; UNKNOWN-NEXT: %zero:_(s8) = G_CONSTANT i8 0
- ; UNKNOWN-NEXT: %width:_(s64) = G_CONSTANT i64 256
- ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ ; UNKNOWN-NEXT: %zero:_(i8) = G_CONSTANT i8 0
+ ; UNKNOWN-NEXT: %width:_(i64) = G_CONSTANT i64 256
+ ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
; UNKNOWN-NEXT: RET_ReallyLR
%ptr:_(p0) = COPY $x0
- %zero:_(s8) = G_CONSTANT i8 0
- %width:_(s64) = G_CONSTANT i64 256
- G_MEMSET %ptr(p0), %zero(s8), %width(s64), 0 :: (store (s32))
+ %zero:_(i8) = G_CONSTANT i8 0
+ %width:_(i64) = G_CONSTANT i64 256
+ G_MEMSET %ptr(p0), %zero(i8), %width(i64), 0 :: (store (i32))
RET_ReallyLR
...
---
@@ -142,21 +142,21 @@ body: |
; DARWIN: liveins: $x0, $x1
; DARWIN-NEXT: {{ $}}
; DARWIN-NEXT: %ptr:_(p0) = COPY $x0
- ; DARWIN-NEXT: %not_zero:_(s8) = G_CONSTANT i8 1
- ; DARWIN-NEXT: %width:_(s64) = G_CONSTANT i64 256
- ; DARWIN-NEXT: G_MEMSET %ptr(p0), %not_zero(s8), %width(s64), 0 :: (store (s32))
+ ; DARWIN-NEXT: %not_zero:_(i8) = G_CONSTANT i8 1
+ ; DARWIN-NEXT: %width:_(i64) = G_CONSTANT i64 256
+ ; DARWIN-NEXT: G_MEMSET %ptr(p0), %not_zero(i8), %width(i64), 0 :: (store (i32))
; DARWIN-NEXT: RET_ReallyLR
;
; UNKNOWN-LABEL: name: not_zero
; UNKNOWN: liveins: $x0, $x1
; UNKNOWN-NEXT: {{ $}}
; UNKNOWN-NEXT: %ptr:_(p0) = COPY $x0
- ; UNKNOWN-NEXT: %not_zero:_(s8) = G_CONSTANT i8 1
- ; UNKNOWN-NEXT: %width:_(s64) = G_CONSTANT i64 256
- ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %not_zero(s8), %width(s64), 0 :: (store (s32))
+ ; UNKNOWN-NEXT: %not_zero:_(i8) = G_CONSTANT i8 1
+ ; UNKNOWN-NEXT: %width:_(i64) = G_CONSTANT i64 256
+ ; UNKNOWN-NEXT: G_MEMSET %ptr(p0), %not_zero(i8), %width(i64), 0 :: (store (i32))
; UNKNOWN-NEXT: RET_ReallyLR
%ptr:_(p0) = COPY $x0
- %not_zero:_(s8) = G_CONSTANT i8 1
- %width:_(s64) = G_CONSTANT i64 256
- G_MEMSET %ptr(p0), %not_zero(s8), %width(s64), 0 :: (store (s32))
+ %not_zero:_(i8) = G_CONSTANT i8 1
+ %width:_(i64) = G_CONSTANT i64 256
+ G_MEMSET %ptr(p0), %not_zero(i8), %width(i64), 0 :: (store (i32))
RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
index d4800748374e0..8f78c1dacaf2a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
@@ -12,20 +12,20 @@ body: |
; CHECK: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SHL]], [[C1]]
- ; CHECK-NEXT: G_STORE [[ADD]](s32), [[COPY]](p0) :: (store (s32))
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i32) = G_SHL [[COPY1]], [[C]](i32)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SHL]], [[C1]]
+ ; CHECK-NEXT: G_STORE [[ADD]](i32), [[COPY]](p0) :: (store (i32))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_CONSTANT i32 1
- %4:_(s32) = G_CONSTANT i32 2
- %3:_(s32) = G_ADD %1, %2
- %5:_(s32) = G_SHL %3, %4(s32)
- G_STORE %5(s32), %0(p0) :: (store (s32))
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_CONSTANT i32 1
+ %4:_(i32) = G_CONSTANT i32 2
+ %3:_(i32) = G_ADD %1, %2
+ %5:_(i32) = G_SHL %3, %4(i32)
+ G_STORE %5(i32), %0(p0) :: (store (i32))
RET_ReallyLR
...
@@ -41,20 +41,20 @@ body: |
; CHECK: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[C1]]
- ; CHECK-NEXT: G_STORE [[OR]](s32), [[COPY]](p0) :: (store (s32))
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i32) = G_SHL [[COPY1]], [[C]](i32)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR [[SHL]], [[C1]]
+ ; CHECK-NEXT: G_STORE [[OR]](i32), [[COPY]](p0) :: (store (i32))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_CONSTANT i32 1
- %4:_(s32) = G_CONSTANT i32 2
- %3:_(s32) = G_OR %1, %2
- %5:_(s32) = G_SHL %3, %4(s32)
- G_STORE %5(s32), %0(p0) :: (store (s32))
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_CONSTANT i32 1
+ %4:_(i32) = G_CONSTANT i32 2
+ %3:_(i32) = G_OR %1, %2
+ %5:_(i32) = G_SHL %3, %4(i32)
+ G_STORE %5(i32), %0(p0) :: (store (i32))
RET_ReallyLR
...
@@ -71,23 +71,23 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %ptr:_(p0) = COPY $x1
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[C]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[OR]], [[C1]](s32)
- ; CHECK-NEXT: G_STORE [[SHL]](s32), [[COPY]](p0) :: (store (s32))
- ; CHECK-NEXT: G_STORE [[OR]](s32), %ptr(p0) :: (store (s32))
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR [[COPY1]], [[C]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i32) = G_SHL [[OR]], [[C1]](i32)
+ ; CHECK-NEXT: G_STORE [[SHL]](i32), [[COPY]](p0) :: (store (i32))
+ ; CHECK-NEXT: G_STORE [[OR]](i32), %ptr(p0) :: (store (i32))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%ptr:_(p0) = COPY $x1
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_CONSTANT i32 1
- %4:_(s32) = G_CONSTANT i32 2
- %3:_(s32) = G_OR %1, %2
- %5:_(s32) = G_SHL %3, %4(s32)
- G_STORE %5(s32), %0(p0) :: (store (s32))
- G_STORE %3(s32), %ptr(p0) :: (store (s32))
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_CONSTANT i32 1
+ %4:_(i32) = G_CONSTANT i32 2
+ %3:_(i32) = G_OR %1, %2
+ %5:_(i32) = G_SHL %3, %4(i32)
+ G_STORE %5(i32), %0(p0) :: (store (i32))
+ G_STORE %3(i32), %ptr(p0) :: (store (i32))
RET_ReallyLR
...
@@ -103,26 +103,26 @@ body: |
; CHECK: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: %xvec:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY1]](s32), [[COPY1]](s32), [[COPY1]](s32)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %veccst2:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<4 x s32>) = G_SHL %xvec, %veccst2(<4 x s32>)
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)
- ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<4 x s32>) = G_ADD [[SHL]], [[BUILD_VECTOR]]
- ; CHECK-NEXT: G_STORE [[ADD]](<4 x s32>), [[COPY]](p0) :: (store (<4 x s32>))
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: %xvec:_(<4 x i32>) = G_BUILD_VECTOR [[COPY1]](i32), [[COPY1]](i32), [[COPY1]](i32), [[COPY1]](i32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %veccst2:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<4 x i32>) = G_SHL %xvec, %veccst2(<4 x i32>)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[C1]](i32), [[C1]](i32), [[C1]](i32), [[C1]](i32)
+ ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<4 x i32>) = G_ADD [[SHL]], [[BUILD_VECTOR]]
+ ; CHECK-NEXT: G_STORE [[ADD]](<4 x i32>), [[COPY]](p0) :: (store (<4 x i32>))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %xvec:_(<4 x s32>) = G_BUILD_VECTOR %1, %1, %1, %1
- %2:_(s32) = G_CONSTANT i32 1
- %veccst:_(<4 x s32>) = G_BUILD_VECTOR %2, %2, %2, %2
- %4:_(s32) = G_CONSTANT i32 2
- %veccst2:_(<4 x s32>) = G_BUILD_VECTOR %4, %4, %4, %4
- %3:_(<4 x s32>) = G_ADD %xvec, %veccst2
- %5:_(<4 x s32>) = G_SHL %3, %veccst2
- G_STORE %5(<4 x s32>), %0(p0) :: (store (<4 x s32>))
+ %1:_(i32) = COPY $w1
+ %xvec:_(<4 x i32>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %2:_(i32) = G_CONSTANT i32 1
+ %veccst:_(<4 x i32>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %4:_(i32) = G_CONSTANT i32 2
+ %veccst2:_(<4 x i32>) = G_BUILD_VECTOR %4, %4, %4, %4
+ %3:_(<4 x i32>) = G_ADD %xvec, %veccst2
+ %5:_(<4 x i32>) = G_SHL %3, %veccst2
+ G_STORE %5(<4 x i32>), %0(p0) :: (store (<4 x i32>))
RET_ReallyLR
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
index 30cb7b724059e..2ff2f0699820f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
@@ -13,19 +13,19 @@ body: |
; CHECK-LABEL: name: concat_to_build_vector
; CHECK: liveins: $x0, $x1, $x2, $x3
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
- ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64)
- ; CHECK-NEXT: RET_ReallyLR implicit [[BUILD_VECTOR]](<4 x s64>)
- %0:_(s64) = COPY $x0
- %1:_(s64) = COPY $x1
- %2:_(s64) = COPY $x2
- %3:_(s64) = COPY $x3
- %4:_(<2 x s64>) = G_BUILD_VECTOR %0(s64), %1
- %5:_(<2 x s64>) = G_BUILD_VECTOR %2(s64), %3
- %6:_(<4 x s64>) = G_CONCAT_VECTORS %4(<2 x s64>), %5
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(i64) = COPY $x3
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i64>) = G_BUILD_VECTOR [[COPY]](i64), [[COPY1]](i64), [[COPY2]](i64), [[COPY3]](i64)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[BUILD_VECTOR]](<4 x i64>)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = COPY $x1
+ %2:_(i64) = COPY $x2
+ %3:_(i64) = COPY $x3
+ %4:_(<2 x i64>) = G_BUILD_VECTOR %0(i64), %1
+ %5:_(<2 x i64>) = G_BUILD_VECTOR %2(i64), %3
+ %6:_(<4 x i64>) = G_CONCAT_VECTORS %4(<2 x i64>), %5
RET_ReallyLR implicit %6
...
# Same test as concat_to_build_vector but with pointer types.
@@ -61,11 +61,11 @@ tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: concat_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: RET_ReallyLR implicit [[DEF]](<4 x s64>)
- %4:_(<2 x s64>) = G_IMPLICIT_DEF
- %5:_(<2 x s64>) = G_IMPLICIT_DEF
- %6:_(<4 x s64>) = G_CONCAT_VECTORS %4(<2 x s64>), %5
+ ; CHECK: [[DEF:%[0-9]+]]:_(<4 x i64>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: RET_ReallyLR implicit [[DEF]](<4 x i64>)
+ %4:_(<2 x i64>) = G_IMPLICIT_DEF
+ %5:_(<2 x i64>) = G_IMPLICIT_DEF
+ %6:_(<4 x i64>) = G_CONCAT_VECTORS %4(<2 x i64>), %5
RET_ReallyLR implicit %6
...
# Check that when combining concat_vectors(build_vector, undef) into
@@ -81,16 +81,16 @@ body: |
; CHECK-LABEL: name: concat_to_build_vector_with_undef
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[DEF]](s64), [[DEF]](s64)
- ; CHECK-NEXT: RET_ReallyLR implicit [[BUILD_VECTOR]](<4 x s64>)
- %0:_(s64) = COPY $x0
- %1:_(s64) = COPY $x1
- %4:_(<2 x s64>) = G_BUILD_VECTOR %0(s64), %1
- %5:_(<2 x s64>) = G_IMPLICIT_DEF
- %6:_(<4 x s64>) = G_CONCAT_VECTORS %4(<2 x s64>), %5
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i64>) = G_BUILD_VECTOR [[COPY]](i64), [[COPY1]](i64), [[DEF]](i64), [[DEF]](i64)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[BUILD_VECTOR]](<4 x i64>)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = COPY $x1
+ %4:_(<2 x i64>) = G_BUILD_VECTOR %0(i64), %1
+ %5:_(<2 x i64>) = G_IMPLICIT_DEF
+ %6:_(<4 x i64>) = G_CONCAT_VECTORS %4(<2 x i64>), %5
RET_ReallyLR implicit %6
...
# Same as concat_to_build_vector_with_undef but with pointer types.
@@ -128,12 +128,12 @@ body: |
; CHECK-LABEL: name: concat_to_build_vector_negative_test
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[COPY]](<2 x s64>), [[DEF]](<2 x s64>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<4 x s64>)
- %4:_(<2 x s64>) = COPY $q0
- %5:_(<2 x s64>) = G_IMPLICIT_DEF
- %6:_(<4 x s64>) = G_CONCAT_VECTORS %4(<2 x s64>), %5
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i64>) = COPY $q0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i64>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x i64>) = G_CONCAT_VECTORS [[COPY]](<2 x i64>), [[DEF]](<2 x i64>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<4 x i64>)
+ %4:_(<2 x i64>) = COPY $q0
+ %5:_(<2 x i64>) = G_IMPLICIT_DEF
+ %6:_(<4 x i64>) = G_CONCAT_VECTORS %4(<2 x i64>), %5
RET_ReallyLR implicit %6
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
index 591b6a17928cb..49a99187b80fa 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
@@ -72,39 +72,39 @@ body: |
bb.0.entry:
liveins: $x0, $w1
successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
- ; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
+ ; CHECK: [[T0:%[0-9]+]]:_(i32) = G_SEXTLOAD
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- %3:_(s32) = G_SEXT %2
- %4:_(s32) = G_CONSTANT i32 1
- %5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
- G_BRCOND %5:_(s1), %bb.1
+ %1:_(i32) = COPY $w1
+ %2:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ %3:_(i32) = G_SEXT %2
+ %4:_(i32) = G_CONSTANT i32 1
+ %5:_(i1) = G_ICMP intpred(ne), %1:_(i32), %4:_
+ G_BRCOND %5:_(i1), %bb.1
G_BR %bb.2.else
bb.1.if:
; CHECK: bb.1.if:
successors: %bb.3(0x80000000)
- %10:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %6:_(s8) = G_ADD %2, %10
- ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
+ %10:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T1:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %6:_(i8) = G_ADD %2, %10
+ ; CHECK: [[T2:%[0-9]+]]:_(i8) = G_ADD [[T1]], {{.*}}
G_BR %bb.3.exit
bb.2.else:
; CHECK: bb.2.else:
successors: %bb.3(0x80000000)
- %11:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T3:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %7:_(s8) = G_SUB %2, %11
- ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_ADD [[T3]], {{.*}}
+ %11:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T3:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %7:_(i8) = G_SUB %2, %11
+ ; CHECK: [[T4:%[0-9]+]]:_(i8) = G_ADD [[T3]], {{.*}}
G_BR %bb.3.exit
bb.3.exit:
; CHECK: bb.3.exit:
- %8:_(s8) = G_PHI %6:_(s8), %bb.1, %7:_(s8), %bb.2
- ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
- %9:_(s32) = G_ZEXT %8
- ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
- ; CHECK: $w0 = COPY [[T0]](s32)
- ; CHECK: $w1 = COPY [[T6]](s32)
+ %8:_(i8) = G_PHI %6:_(i8), %bb.1, %7:_(i8), %bb.2
+ ; CHECK: [[T5:%[0-9]+]]:_(i8) = G_PHI [[T2]](i8), %bb.1, [[T4]](i8)
+ %9:_(i32) = G_ZEXT %8
+ ; CHECK: [[T6:%[0-9]+]]:_(i32) = G_ZEXT [[T5]](i8)
+ ; CHECK: $w0 = COPY [[T0]](i32)
+ ; CHECK: $w1 = COPY [[T6]](i32)
$w0 = COPY %3
$w1 = COPY %9
@@ -112,17 +112,17 @@ body: |
# a test of the debug output and a test.
#
# CHECK-WORKLIST-LABEL: Generic MI Combiner for: multiple_copies
-# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
-# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
-# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
-# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(s8) = G_ADD [[NEW1:%[0-9]+]]:_, [[IN4]]:_
-# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
-# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(s8) = G_SUB [[NEW2:%[0-9]+]]:_, [[IN6]]:_
-# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
-# CHECK-WORKLIST-DAG: Created: [[NEW1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
-# CHECK-WORKLIST-DAG: Created: [[NEW2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
+# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(i8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
+# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(i32) = G_SEXT [[IN0]]:_(i8)
+# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(i8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
+# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(i8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
+# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(i8) = G_ADD [[NEW1:%[0-9]+]]:_, [[IN4]]:_
+# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(i8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
+# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(i8) = G_SUB [[NEW2:%[0-9]+]]:_, [[IN6]]:_
+# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(i32) = G_SEXT [[IN0]]:_(i8)
+# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(i32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
+# CHECK-WORKLIST-DAG: Created: [[NEW1]]:_(i8) = G_TRUNC [[IN2]]:_(i32)
+# CHECK-WORKLIST-DAG: Created: [[NEW2]]:_(i8) = G_TRUNC [[IN2]]:_(i32)
# CHECK-WORKLIST: Try combining
...
@@ -137,32 +137,32 @@ body: |
bb.0.entry:
liveins: $x0, $w1
successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
- ; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
+ ; CHECK: [[T0:%[0-9]+]]:_(i32) = G_SEXTLOAD
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %3:_(s32) = G_SEXT %2
- %4:_(s32) = G_CONSTANT i32 1
- %5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
- G_BRCOND %5:_(s1), %bb.1
+ %1:_(i32) = COPY $w1
+ %2:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ ; CHECK: [[T4:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %3:_(i32) = G_SEXT %2
+ %4:_(i32) = G_CONSTANT i32 1
+ %5:_(i1) = G_ICMP intpred(ne), %1:_(i32), %4:_
+ G_BRCOND %5:_(i1), %bb.1
G_BR %bb.2.exit
bb.1.if:
; CHECK: bb.1.if:
successors: %bb.2(0x80000000)
- %10:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %6:_(s8) = G_ADD %2, %10
- ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
+ %10:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T1:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %6:_(i8) = G_ADD %2, %10
+ ; CHECK: [[T2:%[0-9]+]]:_(i8) = G_ADD [[T1]], {{.*}}
G_BR %bb.2.exit
bb.2.exit:
; CHECK: bb.2.exit:
- %8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.0
- ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
- %9:_(s32) = G_ZEXT %8
- ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
- ; CHECK: $w0 = COPY [[T0]](s32)
- ; CHECK: $w1 = COPY [[T6]](s32)
+ %8:_(i8) = G_PHI %6:_(i8), %bb.1, %2:_(i8), %bb.0
+ ; CHECK: [[T5:%[0-9]+]]:_(i8) = G_PHI [[T2]](i8), %bb.1, [[T4]](i8)
+ %9:_(i32) = G_ZEXT %8
+ ; CHECK: [[T6:%[0-9]+]]:_(i32) = G_ZEXT [[T5]](i8)
+ ; CHECK: $w0 = COPY [[T0]](i32)
+ ; CHECK: $w1 = COPY [[T6]](i32)
$w0 = COPY %3
$w1 = COPY %9
...
@@ -175,55 +175,55 @@ body: |
bb.0.entry:
liveins: $x0, $w1
successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
- ; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
+ ; CHECK: [[T0:%[0-9]+]]:_(i32) = G_SEXTLOAD
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- %3:_(s32) = G_CONSTANT i32 1
- %4:_(s1) = G_ICMP intpred(ne), %1:_(s32), %3:_
- G_BRCOND %4:_(s1), %bb.1
+ %1:_(i32) = COPY $w1
+ %2:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ %3:_(i32) = G_CONSTANT i32 1
+ %4:_(i1) = G_ICMP intpred(ne), %1:_(i32), %3:_
+ G_BRCOND %4:_(i1), %bb.1
G_BR %bb.2.else
bb.1.if:
; CHECK: bb.1.if:
successors: %bb.3(0x80000000)
- %5:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %6:_(s8) = G_ADD %2, %5
- ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
+ %5:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T1:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %6:_(i8) = G_ADD %2, %5
+ ; CHECK: [[T2:%[0-9]+]]:_(i8) = G_ADD [[T1]], {{.*}}
G_BR %bb.3.exit
bb.2.else:
; CHECK: bb.2.else:
successors: %bb.3(0x80000000)
- %7:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T3:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %8:_(s8) = G_SUB %2, %7
- ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_ADD [[T3]], {{.*}}
+ %7:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T3:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %8:_(i8) = G_SUB %2, %7
+ ; CHECK: [[T4:%[0-9]+]]:_(i8) = G_ADD [[T3]], {{.*}}
G_BR %bb.3.exit
bb.3.exit:
; CHECK: bb.3.exit:
- %9:_(s8) = G_PHI %6:_(s8), %bb.1, %8:_(s8), %bb.2
- ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
- %10:_(s32) = G_SEXT %2
- %11:_(s32) = G_ZEXT %9
- ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
- ; CHECK: $w0 = COPY [[T0]](s32)
- ; CHECK: $w1 = COPY [[T6]](s32)
+ %9:_(i8) = G_PHI %6:_(i8), %bb.1, %8:_(i8), %bb.2
+ ; CHECK: [[T5:%[0-9]+]]:_(i8) = G_PHI [[T2]](i8), %bb.1, [[T4]](i8)
+ %10:_(i32) = G_SEXT %2
+ %11:_(i32) = G_ZEXT %9
+ ; CHECK: [[T6:%[0-9]+]]:_(i32) = G_ZEXT [[T5]](i8)
+ ; CHECK: $w0 = COPY [[T0]](i32)
+ ; CHECK: $w1 = COPY [[T6]](i32)
$w0 = COPY %10
$w1 = COPY %11
# CHECK-WORKLIST-LABEL: Generic MI Combiner for: sink_to_phi_nondominating
-# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
-# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
+# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(i8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
+# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(i32) = G_SEXT [[IN0]]:_(i8)
+# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(i8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
# CHECK-WORKLIST-DAG: Creating: G_TRUNC
-# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
-# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(s8) = G_ADD [[OUT1:%[0-9]+]]:_, [[IN4]]:_
+# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(i8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
+# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(i8) = G_ADD [[OUT1:%[0-9]+]]:_, [[IN4]]:_
# CHECK-WORKLIST-DAG: Creating: G_TRUNC
-# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
-# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(s8) = G_SUB [[OUT2:%[0-9]+]]:_, [[IN6]]:_
-# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load (s8) from %ir.addr)
-# CHECK-WORKLIST-DAG: Created: [[OUT1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
-# CHECK-WORKLIST-DAG: Created: [[OUT2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
+# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(i8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
+# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(i8) = G_SUB [[OUT2:%[0-9]+]]:_, [[IN6]]:_
+# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(i32) = G_SEXT [[IN0]]:_(i8)
+# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(i32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load (i8) from %ir.addr)
+# CHECK-WORKLIST-DAG: Created: [[OUT1]]:_(i8) = G_TRUNC [[IN2]]:_(i32)
+# CHECK-WORKLIST-DAG: Created: [[OUT2]]:_(i8) = G_TRUNC [[IN2]]:_(i32)
# CHECK-WORKLIST: Try combining
...
@@ -235,22 +235,22 @@ body: |
bb.0.entry:
liveins: $x0, $w1
successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
- ; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
+ ; CHECK: [[T0:%[0-9]+]]:_(i32) = G_SEXTLOAD
%0:_(p0) = COPY $x0
- %1:_(s32) = COPY $w1
- %2:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- %3:_(s32) = G_SEXT %2
- %4:_(s32) = G_CONSTANT i32 1
- %5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
- G_BRCOND %5:_(s1), %bb.1
+ %1:_(i32) = COPY $w1
+ %2:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ %3:_(i32) = G_SEXT %2
+ %4:_(i32) = G_CONSTANT i32 1
+ %5:_(i1) = G_ICMP intpred(ne), %1:_(i32), %4:_
+ G_BRCOND %5:_(i1), %bb.1
G_BR %bb.2.else
bb.1.if:
; CHECK: bb.1.if:
successors: %bb.4(0x80000000)
- %10:_(s8) = G_CONSTANT i8 1
- ; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
- %6:_(s8) = G_ADD %2, %10
- ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
+ %10:_(i8) = G_CONSTANT i8 1
+ ; CHECK: [[T1:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
+ %6:_(i8) = G_ADD %2, %10
+ ; CHECK: [[T2:%[0-9]+]]:_(i8) = G_ADD [[T1]], {{.*}}
G_BR %bb.4.exit
bb.2.else:
; CHECK: bb.2.else:
@@ -259,16 +259,16 @@ body: |
bb.3.else2:
; CHECK: bb.3.else2:
successors: %bb.4(0x80000000)
- ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
+ ; CHECK: [[T4:%[0-9]+]]:_(i8) = G_TRUNC [[T0]](i32)
; Fallthrough
bb.4.exit:
; CHECK: bb.4.exit:
- %8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.3
- ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
- %9:_(s32) = G_ZEXT %8
- ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
- ; CHECK: $w0 = COPY [[T0]](s32)
- ; CHECK: $w1 = COPY [[T6]](s32)
+ %8:_(i8) = G_PHI %6:_(i8), %bb.1, %2:_(i8), %bb.3
+ ; CHECK: [[T5:%[0-9]+]]:_(i8) = G_PHI [[T2]](i8), %bb.1, [[T4]](i8)
+ %9:_(i32) = G_ZEXT %8
+ ; CHECK: [[T6:%[0-9]+]]:_(i32) = G_ZEXT [[T5]](i8)
+ ; CHECK: $w0 = COPY [[T0]](i32)
+ ; CHECK: $w1 = COPY [[T6]](i32)
$w0 = COPY %3
$w1 = COPY %9
...
@@ -287,10 +287,10 @@ body: |
bb.0.entry:
liveins: $x0, $w1
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- ; CHECK: %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.addr)
- G_STORE %1(s8), %0(p0) :: (store (s8) into %ir.addr)
- ; CHECK: G_STORE %1(s8), %0(p0) :: (store (s8) into %ir.addr)
+ %1:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ ; CHECK: %1:_(i8) = G_LOAD %0(p0) :: (load (i8) from %ir.addr)
+ G_STORE %1(i8), %0(p0) :: (store (i8) into %ir.addr)
+ ; CHECK: G_STORE %1(i8), %0(p0) :: (store (i8) into %ir.addr)
...
---
@@ -302,8 +302,8 @@ body: |
bb.0.entry:
liveins: $x0, $w1
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8) from %ir.addr)
- ; CHECK: %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.addr)
- G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(s8)
- ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(s8)
+ %1:_(i8) = G_LOAD %0 :: (load (i8) from %ir.addr)
+ ; CHECK: %1:_(i8) = G_LOAD %0(p0) :: (load (i8) from %ir.addr)
+ G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(i8)
+ ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(i8)
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir
index 072bdc38330b7..26a369b06e8bd 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir
@@ -25,15 +25,15 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[COPY]](p0) :: (load (s1) from %ir.ptr)
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ZEXT]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i1) = G_LOAD [[COPY]](p0) :: (load (i1) from %ir.ptr)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[LOAD]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s1) = G_LOAD %0(p0) :: (load (s1) from %ir.ptr)
- %2:_(s8) = G_ZEXT %1(s1)
- %3:_(s32) = G_ANYEXT %2(s8)
- $w0 = COPY %3(s32)
+ %1:_(i1) = G_LOAD %0(p0) :: (load (i1) from %ir.ptr)
+ %2:_(i8) = G_ZEXT %1(i1)
+ %3:_(i32) = G_ANYEXT %2(i8)
+ $w0 = COPY %3(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
index 28c7485bbf60c..74a56e1ae417d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
@@ -9,11 +9,11 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[LOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
$w0 = COPY %2
...
@@ -26,12 +26,12 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[LOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s8) = COPY %1
- %3:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i8) = COPY %1
+ %3:_(i32) = G_ANYEXT %1
$w0 = COPY %3
...
@@ -44,11 +44,11 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_SEXT %1
$w0 = COPY %2
...
@@ -61,11 +61,11 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ZEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ZEXT %1
$w0 = COPY %2
...
@@ -78,13 +78,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
- ; CHECK-NEXT: $w1 = COPY [[LOAD]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[LOAD]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[LOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
- %3:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i32) = G_ANYEXT %1
$w0 = COPY %2
$w1 = COPY %3
...
@@ -98,13 +98,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](s32)
- ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
- %3:_(s32) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i32) = G_SEXT %1
$w0 = COPY %2
$w1 = COPY %3
...
@@ -118,19 +118,19 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s32)
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 -1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s8) = G_XOR [[TRUNC]], [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
- ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i8) = G_CONSTANT i8 -1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i8) = G_XOR [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[XOR]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s8) = G_CONSTANT i8 -1
- %3:_(s8) = G_XOR %1, %2
- %5:_(s32) = G_ANYEXT %3
- %6:_(s32) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i8) = G_CONSTANT i8 -1
+ %3:_(i8) = G_XOR %1, %2
+ %5:_(i32) = G_ANYEXT %3
+ %6:_(i32) = G_SEXT %1
$w0 = COPY %5
$w1 = COPY %6
...
@@ -144,13 +144,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
- ; CHECK-NEXT: $w1 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[ZEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
- %3:_(s32) = G_ZEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i32) = G_ZEXT %1
$w0 = COPY %2
$w1 = COPY %3
...
@@ -164,15 +164,15 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s32)
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ZEXT]](s32)
- ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i32)
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXT]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ZEXT %1
- %3:_(s32) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ZEXT %1
+ %3:_(i32) = G_SEXT %1
$w0 = COPY %2
$w1 = COPY %3
...
@@ -186,14 +186,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SEXTLOAD]](s32)
- ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
- ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i64) = G_ANYEXT [[SEXTLOAD]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](i64)
+ ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s64) = G_ANYEXT %1
- %3:_(s32) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i64) = G_ANYEXT %1
+ %3:_(i32) = G_SEXT %1
$x0 = COPY %2
$w1 = COPY %3
...
@@ -207,15 +207,15 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s64)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
- ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](s64)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i64) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
+ ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](i64)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
- %3:_(s64) = G_SEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i64) = G_SEXT %1
$w0 = COPY %2
$x1 = COPY %3
...
@@ -229,18 +229,18 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s64)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
- ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
- ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](s64)
- ; CHECK-NEXT: $w2 = COPY [[ANYEXT1]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i64) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC]](i8)
+ ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
+ ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: $w2 = COPY [[ANYEXT1]](i32)
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
- %3:_(s64) = G_SEXT %1
- %4:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i64) = G_SEXT %1
+ %4:_(i32) = G_ANYEXT %1
$w0 = COPY %2
$x1 = COPY %3
$w2 = COPY %4
@@ -255,18 +255,18 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
+ ; CHECK-NEXT: $w0 = COPY [[LOAD]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
G_BR %bb.1
bb.1:
- %2:_(s32) = G_ANYEXT %1
+ %2:_(i32) = G_ANYEXT %1
$w0 = COPY %2
...
@@ -279,18 +279,18 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
G_BR %bb.1
bb.1:
- %2:_(s32) = G_SEXT %1
+ %2:_(i32) = G_SEXT %1
$w0 = COPY %2
...
@@ -303,18 +303,18 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i32) = G_ZEXTLOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](s32)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXTLOAD]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
G_BR %bb.1
bb.1:
- %2:_(s32) = G_ZEXT %1
+ %2:_(i32) = G_ZEXT %1
$w0 = COPY %2
...
@@ -327,20 +327,20 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
- ; CHECK-NEXT: $w1 = COPY [[LOAD]](s32)
+ ; CHECK-NEXT: $w0 = COPY [[LOAD]](i32)
+ ; CHECK-NEXT: $w1 = COPY [[LOAD]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %2:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %2:_(i32) = G_ANYEXT %1
G_BR %bb.1
bb.1:
- %3:_(s32) = G_ANYEXT %1
+ %3:_(i32) = G_ANYEXT %1
$w0 = COPY %2
$w1 = COPY %3
...
@@ -354,21 +354,21 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SEXTLOAD]](s32)
- ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
- ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i64) = G_ANYEXT [[SEXTLOAD]](i32)
+ ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](i64)
+ ; CHECK-NEXT: $w1 = COPY [[SEXTLOAD]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
G_BR %bb.1
bb.1:
- %2:_(s64) = G_ANYEXT %1
- %3:_(s32) = G_SEXT %1
+ %2:_(i64) = G_ANYEXT %1
+ %3:_(i32) = G_SEXT %1
$x0 = COPY %2
$w1 = COPY %3
...
@@ -382,22 +382,22 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i64) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s64)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
- ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](s64)
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
+ ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](i64)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
G_BR %bb.1
bb.1:
- %2:_(s32) = G_ANYEXT %1
- %3:_(s64) = G_SEXT %1
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i64) = G_SEXT %1
$w0 = COPY %2
$x1 = COPY %3
...
@@ -411,26 +411,26 @@ body: |
; CHECK-NEXT: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s64)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s8)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i64) = G_SEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC]](i8)
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[SEXTLOAD]](s64)
- ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s8)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT1]](s32)
- ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](s64)
- ; CHECK-NEXT: $w2 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(i32) = G_ANYEXT [[TRUNC1]](i8)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT1]](i32)
+ ; CHECK-NEXT: $x1 = COPY [[SEXTLOAD]](i64)
+ ; CHECK-NEXT: $w2 = COPY [[ANYEXT]](i32)
bb.0:
liveins: $x0
%0:_(p0) = COPY $x0
- %1:_(s8) = G_LOAD %0 :: (load (s8))
- %4:_(s32) = G_ANYEXT %1
+ %1:_(i8) = G_LOAD %0 :: (load (i8))
+ %4:_(i32) = G_ANYEXT %1
G_BR %bb.1
bb.1:
- %2:_(s32) = G_ANYEXT %1
- %3:_(s64) = G_SEXT %1
+ %2:_(i32) = G_ANYEXT %1
+ %3:_(i64) = G_SEXT %1
$w0 = COPY %2
$x1 = COPY %3
$w2 = COPY %4
@@ -449,14 +449,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load unordered (s16))
- ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ZEXT]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i16) = G_LOAD [[COPY]](p0) :: (load unordered (i16))
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[LOAD]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ZEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s16) = G_LOAD %0(p0) :: (load unordered (s16))
- %2:_(s32) = G_ZEXT %1(s16)
- $w0 = COPY %2(s32)
+ %1:_(i16) = G_LOAD %0(p0) :: (load unordered (i16))
+ %2:_(i32) = G_ZEXT %1(i16)
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
---
@@ -468,13 +468,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: $x0 = COPY [[ZEXTLOAD]](s64)
- ; CHECK-NEXT: $x1 = COPY [[ZEXTLOAD]](s64)
+ ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(i64) = G_ZEXTLOAD [[COPY]](p0) :: (load (i8))
+ ; CHECK-NEXT: $x0 = COPY [[ZEXTLOAD]](i64)
+ ; CHECK-NEXT: $x1 = COPY [[ZEXTLOAD]](i64)
%0:_(p0) = COPY $x0
- %1:_(s32) = G_ZEXTLOAD %0 :: (load (s8))
- %2:_(s64) = G_ZEXT %1
- %3:_(s64) = G_SEXT %1
+ %1:_(i32) = G_ZEXTLOAD %0 :: (load (i8))
+ %2:_(i64) = G_ZEXT %1
+ %3:_(i64) = G_SEXT %1
$x0 = COPY %2
$x1 = COPY %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-funnel-shifts-to-rotates.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-funnel-shifts-to-rotates.mir
index 0ccd3515d2b6e..d69baed60f839 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-funnel-shifts-to-rotates.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-funnel-shifts-to-rotates.mir
@@ -18,15 +18,15 @@ body: |
; CHECK-LABEL: name: test_rotr
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[ROTR:%[0-9]+]]:_(s32) = G_ROTR [[COPY]], [[COPY1]](s32)
- ; CHECK-NEXT: $w0 = COPY [[ROTR]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[ROTR:%[0-9]+]]:_(i32) = G_ROTR [[COPY]], [[COPY1]](i32)
+ ; CHECK-NEXT: $w0 = COPY [[ROTR]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_FSHR %0, %0, %1(s32)
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_FSHR %0, %0, %1(i32)
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -47,15 +47,15 @@ body: |
; CHECK-LABEL: name: test_rotl
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: [[ROTL:%[0-9]+]]:_(s32) = G_ROTL [[COPY]], [[COPY1]](s32)
- ; CHECK-NEXT: $w0 = COPY [[ROTL]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[ROTL:%[0-9]+]]:_(i32) = G_ROTL [[COPY]], [[COPY1]](i32)
+ ; CHECK-NEXT: $w0 = COPY [[ROTL]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_FSHL %0, %0, %1(s32)
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_FSHL %0, %0, %1(i32)
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -76,15 +76,15 @@ body: |
; CHECK-LABEL: name: test_vector_rotr
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[ROTR:%[0-9]+]]:_(<4 x s32>) = G_ROTR [[COPY]], [[COPY1]](<4 x s32>)
- ; CHECK-NEXT: $q0 = COPY [[ROTR]](<4 x s32>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[ROTR:%[0-9]+]]:_(<4 x i32>) = G_ROTR [[COPY]], [[COPY1]](<4 x i32>)
+ ; CHECK-NEXT: $q0 = COPY [[ROTR]](<4 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<4 x s32>) = G_FSHR %0, %0, %1(<4 x s32>)
- $q0 = COPY %2(<4 x s32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<4 x i32>) = G_FSHR %0, %0, %1(<4 x i32>)
+ $q0 = COPY %2(<4 x i32>)
RET_ReallyLR implicit $q0
...
@@ -105,15 +105,15 @@ body: |
; CHECK-LABEL: name: test_vector_rotl
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[ROTL:%[0-9]+]]:_(<4 x s32>) = G_ROTL [[COPY]], [[COPY1]](<4 x s32>)
- ; CHECK-NEXT: $q0 = COPY [[ROTL]](<4 x s32>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[ROTL:%[0-9]+]]:_(<4 x i32>) = G_ROTL [[COPY]], [[COPY1]](<4 x i32>)
+ ; CHECK-NEXT: $q0 = COPY [[ROTL]](<4 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<4 x s32>) = G_FSHL %0, %0, %1(<4 x s32>)
- $q0 = COPY %2(<4 x s32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<4 x i32>) = G_FSHL %0, %0, %1(<4 x i32>)
+ $q0 = COPY %2(<4 x i32>)
RET_ReallyLR implicit $q0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
index 7f51b69c1e20e..c054e1a75d024 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
@@ -14,18 +14,18 @@ body: |
; CHECK-LABEL: name: or_combine_sext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SEXT [[OR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SEXT [[OR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_SEXT %x(s32)
- %hand2:_(s64) = G_SEXT %y(s32)
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_SEXT %x(i32)
+ %hand2:_(i64) = G_SEXT %y(i32)
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -40,18 +40,18 @@ body: |
; CHECK-LABEL: name: or_combine_zext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ZEXT [[OR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ZEXT [[OR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ZEXT %x(s32)
- %hand2:_(s64) = G_ZEXT %y(s32)
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ZEXT %x(i32)
+ %hand2:_(i64) = G_ZEXT %y(i32)
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -66,18 +66,18 @@ body: |
; CHECK-LABEL: name: or_combine_anyext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ANYEXT [[OR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ANYEXT [[OR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ANYEXT %x(s32)
- %hand2:_(s64) = G_ANYEXT %y(s32)
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ANYEXT %x(i32)
+ %hand2:_(i64) = G_ANYEXT %y(i32)
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -92,18 +92,18 @@ body: |
; CHECK-LABEL: name: and_combine_sext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SEXT [[AND]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SEXT [[AND]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_SEXT %x(s32)
- %hand2:_(s64) = G_SEXT %y(s32)
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_SEXT %x(i32)
+ %hand2:_(i64) = G_SEXT %y(i32)
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -118,18 +118,18 @@ body: |
; CHECK-LABEL: name: and_combine_zext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ZEXT [[AND]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ZEXT [[AND]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ZEXT %x(s32)
- %hand2:_(s64) = G_ZEXT %y(s32)
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ZEXT %x(i32)
+ %hand2:_(i64) = G_ZEXT %y(i32)
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -144,18 +144,18 @@ body: |
; CHECK-LABEL: name: and_combine_anyext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ANYEXT [[AND]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i32) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ANYEXT [[AND]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ANYEXT %x(s32)
- %hand2:_(s64) = G_ANYEXT %y(s32)
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ANYEXT %x(i32)
+ %hand2:_(i64) = G_ANYEXT %y(i32)
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -170,18 +170,18 @@ body: |
; CHECK-LABEL: name: xor_combine_sext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SEXT [[XOR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SEXT [[XOR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_SEXT %x(s32)
- %hand2:_(s64) = G_SEXT %y(s32)
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_SEXT %x(i32)
+ %hand2:_(i64) = G_SEXT %y(i32)
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -196,18 +196,18 @@ body: |
; CHECK-LABEL: name: xor_combine_zext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ZEXT [[XOR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ZEXT [[XOR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ZEXT %x(s32)
- %hand2:_(s64) = G_ZEXT %y(s32)
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ZEXT %x(i32)
+ %hand2:_(i64) = G_ZEXT %y(i32)
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -222,18 +222,18 @@ body: |
; CHECK-LABEL: name: xor_combine_anyext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ANYEXT [[XOR]](s32)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ANYEXT [[XOR]](i32)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_ANYEXT %x(s32)
- %hand2:_(s64) = G_ANYEXT %y(s32)
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_ANYEXT %x(i32)
+ %hand2:_(i64) = G_ANYEXT %y(i32)
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -248,21 +248,21 @@ body: |
; CHECK-LABEL: name: dont_combine_
diff erent_types
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %hand1:_(s32) = COPY $w1
- ; CHECK-NEXT: %y:_(s16) = G_TRUNC %hand1(s32)
- ; CHECK-NEXT: %hand2:_(s64) = G_SEXT %x(s32)
- ; CHECK-NEXT: %logic_op:_(s64) = G_SEXT %y(s16)
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %hand2, %logic_op
- ; CHECK-NEXT: $x0 = COPY [[OR]](s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %hand1:_(i32) = COPY $w1
+ ; CHECK-NEXT: %y:_(i16) = G_TRUNC %hand1(i32)
+ ; CHECK-NEXT: %hand2:_(i64) = G_SEXT %x(i32)
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SEXT %y(i16)
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR %hand2, %logic_op
+ ; CHECK-NEXT: $x0 = COPY [[OR]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %hand1:_(s32) = COPY $w1
- %y:_(s16) = G_TRUNC %hand1(s32)
- %hand2:_(s64) = G_SEXT %x(s32)
- %logic_op:_(s64) = G_SEXT %y(s16)
- %5:_(s64) = G_OR %hand2, %logic_op
- $x0 = COPY %5(s64)
+ %x:_(i32) = COPY $w0
+ %hand1:_(i32) = COPY $w1
+ %y:_(i16) = G_TRUNC %hand1(i32)
+ %hand2:_(i64) = G_SEXT %x(i32)
+ %logic_op:_(i64) = G_SEXT %y(i16)
+ %5:_(i64) = G_OR %hand2, %logic_op
+ $x0 = COPY %5(i64)
RET_ReallyLR implicit $x0
...
@@ -277,34 +277,34 @@ body: |
; CHECK-PRE-LABEL: name: illegal_ty
; CHECK-PRE: liveins: $w0, $w1
; CHECK-PRE-NEXT: {{ $}}
- ; CHECK-PRE-NEXT: %x_wide:_(s32) = COPY $w0
- ; CHECK-PRE-NEXT: %y_wide:_(s32) = COPY $w1
- ; CHECK-PRE-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x_wide, %y_wide
- ; CHECK-PRE-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[OR]](s32)
- ; CHECK-PRE-NEXT: %logic_op:_(s64) = G_SEXT [[TRUNC]](s1)
- ; CHECK-PRE-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-PRE-NEXT: %x_wide:_(i32) = COPY $w0
+ ; CHECK-PRE-NEXT: %y_wide:_(i32) = COPY $w1
+ ; CHECK-PRE-NEXT: [[OR:%[0-9]+]]:_(i32) = G_OR %x_wide, %y_wide
+ ; CHECK-PRE-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[OR]](i32)
+ ; CHECK-PRE-NEXT: %logic_op:_(i64) = G_SEXT [[TRUNC]](i1)
+ ; CHECK-PRE-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-PRE-NEXT: RET_ReallyLR implicit $x0
;
; CHECK-POST-LABEL: name: illegal_ty
; CHECK-POST: liveins: $w0, $w1
; CHECK-POST-NEXT: {{ $}}
- ; CHECK-POST-NEXT: %x_wide:_(s32) = COPY $w0
- ; CHECK-POST-NEXT: %y_wide:_(s32) = COPY $w1
- ; CHECK-POST-NEXT: %x:_(s1) = G_TRUNC %x_wide(s32)
- ; CHECK-POST-NEXT: %y:_(s1) = G_TRUNC %y_wide(s32)
- ; CHECK-POST-NEXT: %hand1:_(s64) = G_SEXT %x(s1)
- ; CHECK-POST-NEXT: %hand2:_(s64) = G_SEXT %y(s1)
- ; CHECK-POST-NEXT: %logic_op:_(s64) = G_OR %hand1, %hand2
- ; CHECK-POST-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-POST-NEXT: %x_wide:_(i32) = COPY $w0
+ ; CHECK-POST-NEXT: %y_wide:_(i32) = COPY $w1
+ ; CHECK-POST-NEXT: %x:_(i1) = G_TRUNC %x_wide(i32)
+ ; CHECK-POST-NEXT: %y:_(i1) = G_TRUNC %y_wide(i32)
+ ; CHECK-POST-NEXT: %hand1:_(i64) = G_SEXT %x(i1)
+ ; CHECK-POST-NEXT: %hand2:_(i64) = G_SEXT %y(i1)
+ ; CHECK-POST-NEXT: %logic_op:_(i64) = G_OR %hand1, %hand2
+ ; CHECK-POST-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-POST-NEXT: RET_ReallyLR implicit $x0
- %x_wide:_(s32) = COPY $w0
- %y_wide:_(s32) = COPY $w1
- %x:_(s1) = G_TRUNC %x_wide
- %y:_(s1) = G_TRUNC %y_wide
- %hand1:_(s64) = G_SEXT %x(s1)
- %hand2:_(s64) = G_SEXT %y(s1)
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x_wide:_(i32) = COPY $w0
+ %y_wide:_(i32) = COPY $w1
+ %x:_(i1) = G_TRUNC %x_wide
+ %y:_(i1) = G_TRUNC %y_wide
+ %hand1:_(i64) = G_SEXT %x(i1)
+ %hand2:_(i64) = G_SEXT %y(i1)
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -319,20 +319,20 @@ body: |
; CHECK-LABEL: name: or_combine_and
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_AND [[OR]], %z
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_AND [[OR]], %z
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_AND %x(s64), %z
- %hand2:_(s64) = G_AND %y(s64), %z
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_AND %x(i64), %z
+ %hand2:_(i64) = G_AND %y(i64), %z
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -347,20 +347,20 @@ body: |
; CHECK-LABEL: name: or_combine_ashr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ASHR [[OR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ASHR [[OR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_ASHR %x(s64), %z
- %hand2:_(s64) = G_ASHR %y(s64), %z
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_ASHR %x(i64), %z
+ %hand2:_(i64) = G_ASHR %y(i64), %z
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -375,20 +375,20 @@ body: |
; CHECK-LABEL: name: or_combine_lshr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_LSHR [[OR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_LSHR [[OR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_LSHR %x(s64), %z
- %hand2:_(s64) = G_LSHR %y(s64), %z
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_LSHR %x(i64), %z
+ %hand2:_(i64) = G_LSHR %y(i64), %z
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -403,20 +403,20 @@ body: |
; CHECK-LABEL: name: or_combine_shl
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SHL [[OR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SHL [[OR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_SHL %x(s64), %z
- %hand2:_(s64) = G_SHL %y(s64), %z
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_SHL %x(i64), %z
+ %hand2:_(i64) = G_SHL %y(i64), %z
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -431,20 +431,20 @@ body: |
; CHECK-LABEL: name: xor_combine_and
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_AND [[XOR]], %z
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i64) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_AND [[XOR]], %z
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_AND %x(s64), %z
- %hand2:_(s64) = G_AND %y(s64), %z
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_AND %x(i64), %z
+ %hand2:_(i64) = G_AND %y(i64), %z
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -459,20 +459,20 @@ body: |
; CHECK-LABEL: name: xor_combine_ashr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ASHR [[XOR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i64) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ASHR [[XOR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_ASHR %x(s64), %z
- %hand2:_(s64) = G_ASHR %y(s64), %z
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_ASHR %x(i64), %z
+ %hand2:_(i64) = G_ASHR %y(i64), %z
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -487,20 +487,20 @@ body: |
; CHECK-LABEL: name: xor_combine_lshr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_LSHR [[XOR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i64) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_LSHR [[XOR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_LSHR %x(s64), %z
- %hand2:_(s64) = G_LSHR %y(s64), %z
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_LSHR %x(i64), %z
+ %hand2:_(i64) = G_LSHR %y(i64), %z
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -515,20 +515,20 @@ body: |
; CHECK-LABEL: name: xor_combine_shl
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SHL [[XOR]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i64) = G_XOR %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SHL [[XOR]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_SHL %x(s64), %z
- %hand2:_(s64) = G_SHL %y(s64), %z
- %logic_op:_(s64) = G_XOR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_SHL %x(i64), %z
+ %hand2:_(i64) = G_SHL %y(i64), %z
+ %logic_op:_(i64) = G_XOR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -543,20 +543,20 @@ body: |
; CHECK-LABEL: name: and_combine_and
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_AND [[AND]], %z
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i64) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_AND [[AND]], %z
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_AND %x(s64), %z
- %hand2:_(s64) = G_AND %y(s64), %z
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_AND %x(i64), %z
+ %hand2:_(i64) = G_AND %y(i64), %z
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -571,20 +571,20 @@ body: |
; CHECK-LABEL: name: and_combine_ashr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_ASHR [[AND]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i64) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_ASHR [[AND]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_ASHR %x(s64), %z
- %hand2:_(s64) = G_ASHR %y(s64), %z
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_ASHR %x(i64), %z
+ %hand2:_(i64) = G_ASHR %y(i64), %z
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -599,20 +599,20 @@ body: |
; CHECK-LABEL: name: and_combine_lshr
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_LSHR [[AND]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i64) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_LSHR [[AND]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_LSHR %x(s64), %z
- %hand2:_(s64) = G_LSHR %y(s64), %z
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_LSHR %x(i64), %z
+ %hand2:_(i64) = G_LSHR %y(i64), %z
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -627,20 +627,20 @@ body: |
; CHECK-LABEL: name: and_combine_shl
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z:_(s64) = COPY $x2
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %x, %y
- ; CHECK-NEXT: %logic_op:_(s64) = G_SHL [[AND]], %z(s64)
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z:_(i64) = COPY $x2
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i64) = G_AND %x, %y
+ ; CHECK-NEXT: %logic_op:_(i64) = G_SHL [[AND]], %z(i64)
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z:_(s64) = COPY $x2
- %hand1:_(s64) = G_SHL %x(s64), %z
- %hand2:_(s64) = G_SHL %y(s64), %z
- %logic_op:_(s64) = G_AND %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z:_(i64) = COPY $x2
+ %hand1:_(i64) = G_SHL %x(i64), %z
+ %hand2:_(i64) = G_SHL %y(i64), %z
+ %logic_op:_(i64) = G_AND %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -655,23 +655,23 @@ body: |
; CHECK-LABEL: name: dont_combine_
diff erent_defs_on_binop
; CHECK: liveins: $x0, $x1, $x2, $x3
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s64) = COPY $x0
- ; CHECK-NEXT: %y:_(s64) = COPY $x1
- ; CHECK-NEXT: %z1:_(s64) = COPY $x2
- ; CHECK-NEXT: %z2:_(s64) = COPY $x3
- ; CHECK-NEXT: %hand1:_(s64) = G_AND %x, %z1
- ; CHECK-NEXT: %hand2:_(s64) = G_AND %y, %z2
- ; CHECK-NEXT: %logic_op:_(s64) = G_OR %hand1, %hand2
- ; CHECK-NEXT: $x0 = COPY %logic_op(s64)
+ ; CHECK-NEXT: %x:_(i64) = COPY $x0
+ ; CHECK-NEXT: %y:_(i64) = COPY $x1
+ ; CHECK-NEXT: %z1:_(i64) = COPY $x2
+ ; CHECK-NEXT: %z2:_(i64) = COPY $x3
+ ; CHECK-NEXT: %hand1:_(i64) = G_AND %x, %z1
+ ; CHECK-NEXT: %hand2:_(i64) = G_AND %y, %z2
+ ; CHECK-NEXT: %logic_op:_(i64) = G_OR %hand1, %hand2
+ ; CHECK-NEXT: $x0 = COPY %logic_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s64) = COPY $x0
- %y:_(s64) = COPY $x1
- %z1:_(s64) = COPY $x2
- %z2:_(s64) = COPY $x3
- %hand1:_(s64) = G_AND %x(s64), %z1
- %hand2:_(s64) = G_AND %y(s64), %z2
- %logic_op:_(s64) = G_OR %hand1, %hand2
- $x0 = COPY %logic_op(s64)
+ %x:_(i64) = COPY $x0
+ %y:_(i64) = COPY $x1
+ %z1:_(i64) = COPY $x2
+ %z2:_(i64) = COPY $x3
+ %hand1:_(i64) = G_AND %x(i64), %z1
+ %hand2:_(i64) = G_AND %y(i64), %z2
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ $x0 = COPY %logic_op(i64)
RET_ReallyLR implicit $x0
...
@@ -686,21 +686,21 @@ body: |
; CHECK-LABEL: name: dont_combine_more_than_one_use
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: %hand1:_(s64) = G_SEXT %x(s32)
- ; CHECK-NEXT: %hand2:_(s64) = G_SEXT %y(s32)
- ; CHECK-NEXT: %logic_op:_(s64) = G_OR %hand1, %hand2
- ; CHECK-NEXT: %other_op:_(s64) = G_ADD %hand1, %logic_op
- ; CHECK-NEXT: $x0 = COPY %other_op(s64)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: %hand1:_(i64) = G_SEXT %x(i32)
+ ; CHECK-NEXT: %hand2:_(i64) = G_SEXT %y(i32)
+ ; CHECK-NEXT: %logic_op:_(i64) = G_OR %hand1, %hand2
+ ; CHECK-NEXT: %other_op:_(i64) = G_ADD %hand1, %logic_op
+ ; CHECK-NEXT: $x0 = COPY %other_op(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %hand1:_(s64) = G_SEXT %x(s32)
- %hand2:_(s64) = G_SEXT %y(s32)
- %logic_op:_(s64) = G_OR %hand1, %hand2
- %other_op:_(s64) = G_ADD %hand1, %logic_op
- $x0 = COPY %other_op(s64)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %hand1:_(i64) = G_SEXT %x(i32)
+ %hand2:_(i64) = G_SEXT %y(i32)
+ %logic_op:_(i64) = G_OR %hand1, %hand2
+ %other_op:_(i64) = G_ADD %hand1, %logic_op
+ $x0 = COPY %other_op(i64)
RET_ReallyLR implicit $x0
...
@@ -715,18 +715,18 @@ body: |
; CHECK-LABEL: name: combine_vector
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: %y:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR %x, %y
- ; CHECK-NEXT: %logic_op:_(<2 x s64>) = G_SEXT [[OR]](<2 x s32>)
- ; CHECK-NEXT: $q0 = COPY %logic_op(<2 x s64>)
+ ; CHECK-NEXT: %x:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: %y:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x i32>) = G_OR %x, %y
+ ; CHECK-NEXT: %logic_op:_(<2 x i64>) = G_SEXT [[OR]](<2 x i32>)
+ ; CHECK-NEXT: $q0 = COPY %logic_op(<2 x i64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %x:_(<2 x s32>) = COPY $d0
- %y:_(<2 x s32>) = COPY $d1
- %hand1:_(<2 x s64>) = G_SEXT %x(<2 x s32>)
- %hand2:_(<2 x s64>) = G_SEXT %y(<2 x s32>)
- %logic_op:_(<2 x s64>) = G_OR %hand1, %hand2
- $q0 = COPY %logic_op(<2 x s64>)
+ %x:_(<2 x i32>) = COPY $d0
+ %y:_(<2 x i32>) = COPY $d1
+ %hand1:_(<2 x i64>) = G_SEXT %x(<2 x i32>)
+ %hand2:_(<2 x i64>) = G_SEXT %y(<2 x i32>)
+ %logic_op:_(<2 x i64>) = G_OR %hand1, %hand2
+ $q0 = COPY %logic_op(<2 x i64>)
RET_ReallyLR implicit $q0
...
@@ -740,12 +740,12 @@ body: |
; CHECK-LABEL: name: combine_vector_implicitdef
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %logic_op:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
- ; CHECK-NEXT: $q0 = COPY %logic_op(<2 x s64>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %logic_op:_(<2 x i64>) = G_BUILD_VECTOR [[C]](i64), [[C]](i64)
+ ; CHECK-NEXT: $q0 = COPY %logic_op(<2 x i64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %x:_(<2 x s64>) = G_IMPLICIT_DEF
- %y:_(<2 x s64>) = G_IMPLICIT_DEF
- %logic_op:_(<2 x s64>) = G_AND %x, %y
- $q0 = COPY %logic_op(<2 x s64>)
+ %x:_(<2 x i64>) = G_IMPLICIT_DEF
+ %y:_(<2 x i64>) = G_IMPLICIT_DEF
+ %logic_op:_(<2 x i64>) = G_AND %x, %y
+ $q0 = COPY %logic_op(<2 x i64>)
RET_ReallyLR implicit $q0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir
index 6a944c667cc82..398bc72803ee4 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir
@@ -13,19 +13,19 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %v:_(p0) = COPY $x0
- ; CHECK-NEXT: %load:_(s64) = G_SEXTLOAD %v(p0) :: (load (s32))
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %load(s64), [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: %load:_(i64) = G_SEXTLOAD %v(p0) :: (load (i32))
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(ne), %load(i64), [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%v:_(p0) = COPY $x0
- %load:_(s64) = G_SEXTLOAD %v:_(p0) :: (load (s32))
- %trunc:_(s32) = G_TRUNC %load(s64)
- %zero:_(s32) = G_CONSTANT i32 0
- %cmp:_(s1) = G_ICMP intpred(ne), %trunc(s32), %zero
- %5:_(s32) = G_ANYEXT %cmp
- $w0 = COPY %5(s32)
+ %load:_(i64) = G_SEXTLOAD %v:_(p0) :: (load (i32))
+ %trunc:_(i32) = G_TRUNC %load(i64)
+ %zero:_(i32) = G_CONSTANT i32 0
+ %cmp:_(i1) = G_ICMP intpred(ne), %trunc(i32), %zero
+ %5:_(i32) = G_ANYEXT %cmp
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -39,19 +39,19 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %v:_(p0) = COPY $x0
- ; CHECK-NEXT: %load:_(s64) = G_SEXTLOAD %v(p0) :: (load (s32))
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %load(s64), [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: %load:_(i64) = G_SEXTLOAD %v(p0) :: (load (i32))
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(eq), %load(i64), [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%v:_(p0) = COPY $x0
- %load:_(s64) = G_SEXTLOAD %v:_(p0) :: (load (s32))
- %trunc:_(s32) = G_TRUNC %load(s64)
- %zero:_(s32) = G_CONSTANT i32 0
- %cmp:_(s1) = G_ICMP intpred(eq), %trunc(s32), %zero
- %5:_(s32) = G_ANYEXT %cmp
- $w0 = COPY %5(s32)
+ %load:_(i64) = G_SEXTLOAD %v:_(p0) :: (load (i32))
+ %trunc:_(i32) = G_TRUNC %load(i64)
+ %zero:_(i32) = G_CONSTANT i32 0
+ %cmp:_(i1) = G_ICMP intpred(eq), %trunc(i32), %zero
+ %5:_(i32) = G_ANYEXT %cmp
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -65,20 +65,20 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %v:_(p0) = COPY $x0
- ; CHECK-NEXT: %load:_(s64) = G_SEXTLOAD %v(p0) :: (load (s32))
- ; CHECK-NEXT: %trunc:_(s32) = G_TRUNC %load(s64)
- ; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(slt), %trunc(s32), %zero
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: %load:_(i64) = G_SEXTLOAD %v(p0) :: (load (i32))
+ ; CHECK-NEXT: %trunc:_(i32) = G_TRUNC %load(i64)
+ ; CHECK-NEXT: %zero:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(slt), %trunc(i32), %zero
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%v:_(p0) = COPY $x0
- %load:_(s64) = G_SEXTLOAD %v:_(p0) :: (load (s32))
- %trunc:_(s32) = G_TRUNC %load(s64)
- %zero:_(s32) = G_CONSTANT i32 0
- %cmp:_(s1) = G_ICMP intpred(slt), %trunc(s32), %zero
- %5:_(s32) = G_ANYEXT %cmp
- $w0 = COPY %5(s32)
+ %load:_(i64) = G_SEXTLOAD %v:_(p0) :: (load (i32))
+ %trunc:_(i32) = G_TRUNC %load(i64)
+ %zero:_(i32) = G_CONSTANT i32 0
+ %cmp:_(i1) = G_ICMP intpred(slt), %trunc(i32), %zero
+ %5:_(i32) = G_ANYEXT %cmp
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -92,20 +92,20 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %v:_(p0) = COPY $x0
- ; CHECK-NEXT: %load:_(s64) = G_SEXTLOAD %v(p0) :: (load (s32))
- ; CHECK-NEXT: %trunc:_(s16) = G_TRUNC %load(s64)
- ; CHECK-NEXT: %zero:_(s16) = G_CONSTANT i16 0
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %trunc(s16), %zero
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT %cmp(s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: %load:_(i64) = G_SEXTLOAD %v(p0) :: (load (i32))
+ ; CHECK-NEXT: %trunc:_(i16) = G_TRUNC %load(i64)
+ ; CHECK-NEXT: %zero:_(i16) = G_CONSTANT i16 0
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(ne), %trunc(i16), %zero
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT %cmp(i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%v:_(p0) = COPY $x0
- %load:_(s64) = G_SEXTLOAD %v:_(p0) :: (load (s32))
- %trunc:_(s16) = G_TRUNC %load(s64)
- %zero:_(s16) = G_CONSTANT i16 0
- %cmp:_(s1) = G_ICMP intpred(ne), %trunc(s16), %zero
- %5:_(s32) = G_ANYEXT %cmp
- $w0 = COPY %5(s32)
+ %load:_(i64) = G_SEXTLOAD %v:_(p0) :: (load (i32))
+ %trunc:_(i16) = G_TRUNC %load(i64)
+ %zero:_(i16) = G_CONSTANT i16 0
+ %cmp:_(i1) = G_ICMP intpred(ne), %trunc(i16), %zero
+ %5:_(i32) = G_ANYEXT %cmp
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir
index ca9afa7700fa8..79ca8f7be1a15 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir
@@ -15,19 +15,19 @@ body: |
; CHECK-LABEL: name: icmp
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sle), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[ICMP]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_XOR %3, %2
- %5:_(s32) = G_ANYEXT %4
- $w0 = COPY %5(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_XOR %3, %2
+ %5:_(i32) = G_ANYEXT %4
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -40,19 +40,19 @@ body: |
; CHECK-LABEL: name: fcmp
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ule), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCMP]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(f64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(i1) = G_FCMP floatpred(ule), [[COPY]](f64), [[C]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[FCMP]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_FCMP floatpred(ogt), %0(s64), %1
- %4:_(s1) = G_XOR %3, %2
- %5:_(s32) = G_ANYEXT %4
- $w0 = COPY %5(s32)
+ %0:_(f64) = COPY $x0
+ %1:_(f64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_FCMP floatpred(ogt), %0(f64), %1
+ %4:_(i1) = G_XOR %3, %2
+ %5:_(i32) = G_ANYEXT %4
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -65,21 +65,21 @@ body: |
; CHECK-LABEL: name: icmp_not_xor_with_1
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[C1]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i1) = G_CONSTANT i1 false
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sgt), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i1) = G_XOR [[ICMP]], [[C1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[XOR]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_XOR %3, %2
- %5:_(s32) = G_ANYEXT %4
- $w0 = COPY %5(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_XOR %3, %2
+ %5:_(i32) = G_ANYEXT %4
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
---
@@ -94,19 +94,19 @@ body: |
; CHECK-LABEL: name: icmp_not_xor_with_wrong_bool_contents
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ICMP]], [[C1]]
- ; CHECK-NEXT: $w0 = COPY [[XOR]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 7
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i32) = G_ICMP intpred(sgt), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR [[ICMP]], [[C1]]
+ ; CHECK-NEXT: $w0 = COPY [[XOR]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s32) = G_CONSTANT i32 7
- %3:_(s32) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s32) = G_XOR %3, %2
- $w0 = COPY %4(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i32) = G_CONSTANT i32 7
+ %3:_(i32) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i32) = G_XOR %3, %2
+ $w0 = COPY %4(i32)
RET_ReallyLR implicit $w0
...
---
@@ -119,26 +119,26 @@ body: |
; CHECK-LABEL: name: icmp_multiple_use
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[C1]]
- ; CHECK-NEXT: %other_use:_(s1) = G_AND [[ICMP]], [[C1]]
- ; CHECK-NEXT: %other_use_ext:_(s32) = G_ANYEXT %other_use(s1)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
- ; CHECK-NEXT: $w1 = COPY %other_use_ext(s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sgt), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i1) = G_XOR [[ICMP]], [[C1]]
+ ; CHECK-NEXT: %other_use:_(i1) = G_AND [[ICMP]], [[C1]]
+ ; CHECK-NEXT: %other_use_ext:_(i32) = G_ANYEXT %other_use(i1)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[XOR]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
+ ; CHECK-NEXT: $w1 = COPY %other_use_ext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_XOR %3, %2
- %other_use:_(s1) = G_AND %3, %2
- %other_use_ext:_(s32) = G_ANYEXT %other_use(s1)
- %5:_(s32) = G_ANYEXT %4
- $w0 = COPY %5(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_XOR %3, %2
+ %other_use:_(i1) = G_AND %3, %2
+ %other_use_ext:_(i32) = G_ANYEXT %other_use(i1)
+ %5:_(i32) = G_ANYEXT %4
+ $w0 = COPY %5(i32)
$w1 = COPY %other_use_ext
RET_ReallyLR implicit $w0
...
@@ -152,22 +152,22 @@ body: |
; CHECK-LABEL: name: icmp_vector
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
- ; CHECK-NEXT: %splat_op2:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s1>) = G_ICMP intpred(sle), [[COPY]](<4 x s32>), %splat_op2
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[ICMP]](<4 x s1>)
- ; CHECK-NEXT: $q0 = COPY [[ANYEXT]](<4 x s32>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 5
+ ; CHECK-NEXT: %splat_op2:_(<4 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32), [[C]](i32), [[C]](i32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x i1>) = G_ICMP intpred(sle), [[COPY]](<4 x i32>), %splat_op2
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x i32>) = G_ANYEXT [[ICMP]](<4 x i1>)
+ ; CHECK-NEXT: $q0 = COPY [[ANYEXT]](<4 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<4 x s32>) = COPY $q0
- %1:_(s32) = G_CONSTANT i32 5
- %splat_op2:_(<4 x s32>) = G_BUILD_VECTOR %1, %1, %1, %1
- %2:_(s1) = G_CONSTANT i1 1
- %splat_true:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %3:_(<4 x s1>) = G_ICMP intpred(sgt), %0(<4 x s32>), %splat_op2
- %4:_(<4 x s1>) = G_XOR %3, %splat_true
- %5:_(<4 x s32>) = G_ANYEXT %4
- $q0 = COPY %5(<4 x s32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(i32) = G_CONSTANT i32 5
+ %splat_op2:_(<4 x i32>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %2:_(i1) = G_CONSTANT i1 1
+ %splat_true:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %3:_(<4 x i1>) = G_ICMP intpred(sgt), %0(<4 x i32>), %splat_op2
+ %4:_(<4 x i1>) = G_XOR %3, %splat_true
+ %5:_(<4 x i32>) = G_ANYEXT %4
+ $q0 = COPY %5(<4 x i32>)
RET_ReallyLR implicit $q0
...
---
@@ -180,23 +180,23 @@ body: |
; CHECK-LABEL: name: icmp_and_icmp
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ule), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s1) = G_OR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sle), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(i1) = G_ICMP intpred(ule), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i1) = G_OR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[OR]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_ICMP intpred(ugt), %0(s64), %1
- %5:_(s1) = G_AND %3, %4
- %6:_(s1) = G_XOR %5, %2
- %7:_(s32) = G_ANYEXT %6
- $w0 = COPY %7(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_ICMP intpred(ugt), %0(i64), %1
+ %5:_(i1) = G_AND %3, %4
+ %6:_(i1) = G_XOR %5, %2
+ %7:_(i32) = G_ANYEXT %6
+ $w0 = COPY %7(i32)
RET_ReallyLR implicit $w0
...
---
@@ -209,23 +209,23 @@ body: |
; CHECK-LABEL: name: icmp_or_icmp
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ule), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s1) = G_AND [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sle), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(i1) = G_ICMP intpred(ule), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i1) = G_AND [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[AND]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_ICMP intpred(ugt), %0(s64), %1
- %5:_(s1) = G_OR %3, %4
- %6:_(s1) = G_XOR %5, %2
- %7:_(s32) = G_ANYEXT %6
- $w0 = COPY %7(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_ICMP intpred(ugt), %0(i64), %1
+ %5:_(i1) = G_OR %3, %4
+ %6:_(i1) = G_XOR %5, %2
+ %7:_(i32) = G_ANYEXT %6
+ $w0 = COPY %7(i32)
RET_ReallyLR implicit $w0
...
---
@@ -238,27 +238,27 @@ body: |
; CHECK-LABEL: name: icmp_and_icmp_or_icmp
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ule), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s1) = G_OR [[ICMP]], [[ICMP1]]
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s1) = G_AND [[OR]], [[ICMP2]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sle), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(i1) = G_ICMP intpred(ule), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i1) = G_OR [[ICMP]], [[ICMP1]]
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(i1) = G_ICMP intpred(eq), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i1) = G_AND [[OR]], [[ICMP2]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[AND]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_ICMP intpred(ugt), %0(s64), %1
- %5:_(s1) = G_AND %3, %4
- %6:_(s1) = G_ICMP intpred(ne), %0(s64), %1
- %7:_(s1) = G_OR %5, %6
- %8:_(s1) = G_XOR %7, %2
- %9:_(s32) = G_ANYEXT %8
- $w0 = COPY %9(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_ICMP intpred(ugt), %0(i64), %1
+ %5:_(i1) = G_AND %3, %4
+ %6:_(i1) = G_ICMP intpred(ne), %0(i64), %1
+ %7:_(i1) = G_OR %5, %6
+ %8:_(i1) = G_XOR %7, %2
+ %9:_(i32) = G_ANYEXT %8
+ $w0 = COPY %9(i32)
RET_ReallyLR implicit $w0
...
---
@@ -271,24 +271,24 @@ body: |
; CHECK-LABEL: name: icmp_and_trunc
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s64), [[C]]
- ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s1) = G_AND [[ICMP]], [[TRUNC]]
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[AND]], [[C1]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i1) = G_CONSTANT i1 true
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(i1) = G_ICMP intpred(sgt), [[COPY]](i64), [[C]]
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[COPY]](i64)
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(i1) = G_AND [[ICMP]], [[TRUNC]]
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i1) = G_XOR [[AND]], [[C1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[XOR]](i1)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
- %4:_(s1) = G_TRUNC %0(s64)
- %5:_(s1) = G_AND %3, %4
- %6:_(s1) = G_XOR %5, %2
- %7:_(s32) = G_ANYEXT %6
- $w0 = COPY %7(s32)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i1) = G_ICMP intpred(sgt), %0(i64), %1
+ %4:_(i1) = G_TRUNC %0(i64)
+ %5:_(i1) = G_AND %3, %4
+ %6:_(i1) = G_XOR %5, %2
+ %7:_(i32) = G_ANYEXT %6
+ $w0 = COPY %7(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
index b2d2f99777e4f..c5ac99497ada2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
@@ -24,16 +24,16 @@ body: |
; CHECK-LABEL: name: not_necessarily_equiv_loads
; CHECK: %ptr:_(p0) = G_GLOBAL_VALUE @g
- ; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr(p0) :: (load (s32) from @g)
- ; CHECK-NEXT: %load2:_(s32) = G_LOAD %ptr(p0) :: (load (s32) from @g)
- ; CHECK-NEXT: %or:_(s32) = G_OR %load2, %load1
- ; CHECK-NEXT: G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ ; CHECK-NEXT: %load1:_(i32) = G_LOAD %ptr(p0) :: (load (i32) from @g)
+ ; CHECK-NEXT: %load2:_(i32) = G_LOAD %ptr(p0) :: (load (i32) from @g)
+ ; CHECK-NEXT: %or:_(i32) = G_OR %load2, %load1
+ ; CHECK-NEXT: G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
; CHECK-NEXT: RET_ReallyLR
%ptr:_(p0) = G_GLOBAL_VALUE @g
- %load1:_(s32) = G_LOAD %ptr(p0) :: (load (s32) from @g)
- %load2:_(s32) = G_LOAD %ptr(p0) :: (load (s32) from @g)
- %or:_(s32) = G_OR %load2, %load1
- G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ %load1:_(i32) = G_LOAD %ptr(p0) :: (load (i32) from @g)
+ %load2:_(i32) = G_LOAD %ptr(p0) :: (load (i32) from @g)
+ %or:_(i32) = G_OR %load2, %load1
+ G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
RET_ReallyLR
...
@@ -49,16 +49,16 @@ body: |
; CHECK-LABEL: name: invariant_loads
; CHECK: %ptr:_(p0) = G_GLOBAL_VALUE @g
- ; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- ; CHECK-NEXT: %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- ; CHECK-NEXT: %or:_(s32) = G_OR %load2, %load1
- ; CHECK-NEXT: G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ ; CHECK-NEXT: %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ ; CHECK-NEXT: %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ ; CHECK-NEXT: %or:_(i32) = G_OR %load2, %load1
+ ; CHECK-NEXT: G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
; CHECK-NEXT: RET_ReallyLR
%ptr:_(p0) = G_GLOBAL_VALUE @g
- %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- %or:_(s32) = G_OR %load2, %load1
- G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ %or:_(i32) = G_OR %load2, %load1
+ G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
RET_ReallyLR
...
@@ -73,16 +73,16 @@ body: |
; CHECK-LABEL: name: both_have_to_be_invariant_1
; CHECK: %ptr:_(p0) = G_GLOBAL_VALUE @g
- ; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- ; CHECK-NEXT: %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable load (s32) from @g)
- ; CHECK-NEXT: %or:_(s32) = G_OR %load2, %load1
- ; CHECK-NEXT: G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ ; CHECK-NEXT: %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ ; CHECK-NEXT: %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable load (i32) from @g)
+ ; CHECK-NEXT: %or:_(i32) = G_OR %load2, %load1
+ ; CHECK-NEXT: G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
; CHECK-NEXT: RET_ReallyLR
%ptr:_(p0) = G_GLOBAL_VALUE @g
- %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable load (s32) from @g)
- %or:_(s32) = G_OR %load2, %load1
- G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable load (i32) from @g)
+ %or:_(i32) = G_OR %load2, %load1
+ G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
RET_ReallyLR
...
---
@@ -96,16 +96,16 @@ body: |
; CHECK-LABEL: name: both_have_to_be_invariant_2
; CHECK: %ptr:_(p0) = G_GLOBAL_VALUE @g
- ; CHECK-NEXT: %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable load (s32) from @g)
- ; CHECK-NEXT: %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- ; CHECK-NEXT: %or:_(s32) = G_OR %load2, %load1
- ; CHECK-NEXT: G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ ; CHECK-NEXT: %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable load (i32) from @g)
+ ; CHECK-NEXT: %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ ; CHECK-NEXT: %or:_(i32) = G_OR %load2, %load1
+ ; CHECK-NEXT: G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
; CHECK-NEXT: RET_ReallyLR
%ptr:_(p0) = G_GLOBAL_VALUE @g
- %load1:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable load (s32) from @g)
- %load2:_(s32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (s32) from @g)
- %or:_(s32) = G_OR %load2, %load1
- G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ %load1:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable load (i32) from @g)
+ %load2:_(i32) = G_LOAD %ptr(p0) :: (dereferenceable invariant load (i32) from @g)
+ %or:_(i32) = G_OR %load2, %load1
+ G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
RET_ReallyLR
...
---
@@ -119,15 +119,15 @@ body: |
; CHECK-LABEL: name: both_have_to_have_same_size
; CHECK: %ptr:_(p0) = G_GLOBAL_VALUE @g
- ; CHECK-NEXT: %load1:_(s32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (s8) from @g)
- ; CHECK-NEXT: %load2:_(s32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (s16) from @g)
- ; CHECK-NEXT: %or:_(s32) = G_OR %load2, %load1
- ; CHECK-NEXT: G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ ; CHECK-NEXT: %load1:_(i32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (i8) from @g)
+ ; CHECK-NEXT: %load2:_(i32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (i16) from @g)
+ ; CHECK-NEXT: %or:_(i32) = G_OR %load2, %load1
+ ; CHECK-NEXT: G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
; CHECK-NEXT: RET_ReallyLR
%ptr:_(p0) = G_GLOBAL_VALUE @g
- %load1:_(s32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (s8) from @g)
- %load2:_(s32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (s16) from @g)
- %or:_(s32) = G_OR %load2, %load1
- G_STORE %or(s32), %ptr(p0) :: (store (s32) into @g)
+ %load1:_(i32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (i8) from @g)
+ %load2:_(i32) = G_ZEXTLOAD %ptr(p0) :: (dereferenceable invariant load (i16) from @g)
+ %or:_(i32) = G_OR %load2, %load1
+ G_STORE %or(i32), %ptr(p0) :: (store (i32) into @g)
RET_ReallyLR
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
index 6b8410a83b11a..b146b56f7b0d7 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
@@ -11,49 +11,49 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %ext:_(s64) = G_PHI [[C]](s64), %bb.1, [[C1]](s64), %bb.2
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %ext:_(i64) = G_PHI [[C]](i64), %bb.1, [[C1]](i64), %bb.2
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %cst32_4:_(s32) = G_CONSTANT i32 4
+ %cst32_4:_(i32) = G_CONSTANT i32 4
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %cst32_4(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_SEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %cst32_4(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_SEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -68,49 +68,49 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %ext:_(s64) = G_PHI [[C]](s64), %bb.1, [[C1]](s64), %bb.2
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %ext:_(i64) = G_PHI [[C]](i64), %bb.1, [[C1]](i64), %bb.2
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %cst32_4:_(s32) = G_CONSTANT i32 4
+ %cst32_4:_(i32) = G_CONSTANT i32 4
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %cst32_4(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_ZEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %cst32_4(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_ZEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -126,47 +126,47 @@ body: |
; CHECK-NEXT: liveins: $x0, $q0, $q1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
- ; CHECK-NEXT: %cmp:_(s1) = G_IMPLICIT_DEF
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: %cmp:_(i1) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %ld1:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ ; CHECK-NEXT: %ld1:_(<4 x i32>) = G_LOAD %ptr(p0) :: (load (<4 x i32>))
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %ld2:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ ; CHECK-NEXT: %ld2:_(<4 x i32>) = G_LOAD %ptr(p0) :: (load (<4 x i32>))
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %phi:_(<4 x s32>) = G_PHI %ld1(<4 x s32>), %bb.1, %ld2(<4 x s32>), %bb.2
- ; CHECK-NEXT: %ext:_(<4 x s64>) = G_SEXT %phi(<4 x s32>)
- ; CHECK-NEXT: G_STORE %ext(<4 x s64>), %ptr(p0) :: (store (<4 x s64>))
+ ; CHECK-NEXT: %phi:_(<4 x i32>) = G_PHI %ld1(<4 x i32>), %bb.1, %ld2(<4 x i32>), %bb.2
+ ; CHECK-NEXT: %ext:_(<4 x i64>) = G_SEXT %phi(<4 x i32>)
+ ; CHECK-NEXT: G_STORE %ext(<4 x i64>), %ptr(p0) :: (store (<4 x i64>))
; CHECK-NEXT: RET_ReallyLR
bb.1.entry:
liveins: $x0, $q0, $q1
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
%ptr:_(p0) = COPY $x0
- %cmp:_(s1) = G_IMPLICIT_DEF
- G_BRCOND %cmp(s1), %bb.2
+ %cmp:_(i1) = G_IMPLICIT_DEF
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %ld1:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ %ld1:_(<4 x i32>) = G_LOAD %ptr(p0) :: (load (<4 x i32>))
G_BR %bb.4
bb.3:
- %ld2:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ %ld2:_(<4 x i32>) = G_LOAD %ptr(p0) :: (load (<4 x i32>))
bb.4:
- %phi:_(<4 x s32>) = G_PHI %ld1(<4 x s32>), %bb.2, %ld2(<4 x s32>), %bb.3
- %ext:_(<4 x s64>) = G_SEXT %phi
- G_STORE %ext(<4 x s64>), %ptr(p0) :: (store (<4 x s64>))
+ %phi:_(<4 x i32>) = G_PHI %ld1(<4 x i32>), %bb.2, %ld2(<4 x i32>), %bb.3
+ %ext:_(<4 x i64>) = G_SEXT %phi
+ G_STORE %ext(<4 x i64>), %ptr(p0) :: (store (<4 x i64>))
RET_ReallyLR
...
@@ -183,52 +183,52 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
; CHECK-NEXT: %base:_(p0) = COPY $x2
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_4:_(s32) = G_CONSTANT i32 4
+ ; CHECK-NEXT: %cst32_4:_(i32) = G_CONSTANT i32 4
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_10:_(s32) = G_CONSTANT i32 10
+ ; CHECK-NEXT: %cst32_10:_(i32) = G_CONSTANT i32 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %phi:_(s32) = G_PHI %cst32_4(s32), %bb.1, %cst32_10(s32), %bb.2
- ; CHECK-NEXT: %ext:_(s64) = G_SEXT %phi(s32)
- ; CHECK-NEXT: %ptr:_(p0) = G_PTR_ADD %base, %ext(s64)
+ ; CHECK-NEXT: %phi:_(i32) = G_PHI %cst32_4(i32), %bb.1, %cst32_10(i32), %bb.2
+ ; CHECK-NEXT: %ext:_(i64) = G_SEXT %phi(i32)
+ ; CHECK-NEXT: %ptr:_(p0) = G_PTR_ADD %base, %ext(i64)
; CHECK-NEXT: $x0 = COPY %ptr(p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1, $x2
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
%base:_(p0) = COPY $x2
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %cst32_4:_(s32) = G_CONSTANT i32 4
+ %cst32_4:_(i32) = G_CONSTANT i32 4
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %cst32_4(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_SEXT %phi
+ %phi:_(i32) = G_PHI %cst32_4(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_SEXT %phi
%ptr:_(p0) = G_PTR_ADD %base, %ext
$x0 = COPY %ptr(p0)
RET_ReallyLR implicit $x0
@@ -246,55 +246,55 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1, $x2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
; CHECK-NEXT: %base:_(p0) = COPY $x2
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %ext:_(s64) = G_PHI [[C]](s64), %bb.1, [[C1]](s64), %bb.2
- ; CHECK-NEXT: %ptr:_(p0) = G_PTR_ADD %base, %ext(s64)
+ ; CHECK-NEXT: %ext:_(i64) = G_PHI [[C]](i64), %bb.1, [[C1]](i64), %bb.2
+ ; CHECK-NEXT: %ptr:_(p0) = G_PTR_ADD %base, %ext(i64)
; CHECK-NEXT: $x0 = COPY %ptr(p0)
- ; CHECK-NEXT: $x1 = COPY %ext(s64)
+ ; CHECK-NEXT: $x1 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1, $x2
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
%base:_(p0) = COPY $x2
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %cst32_4:_(s32) = G_CONSTANT i32 4
+ %cst32_4:_(i32) = G_CONSTANT i32 4
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %cst32_4(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_SEXT %phi
+ %phi:_(i32) = G_PHI %cst32_4(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_SEXT %phi
%ptr:_(p0) = G_PTR_ADD %base, %ext
$x0 = COPY %ptr(p0)
- $x1 = COPY %ext(s64)
+ $x1 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -310,64 +310,64 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_4:_(s32) = G_CONSTANT i32 4
- ; CHECK-NEXT: %cond:_(s1) = G_IMPLICIT_DEF
- ; CHECK-NEXT: G_BRCOND %cond(s1), %bb.3
+ ; CHECK-NEXT: %cst32_4:_(i32) = G_CONSTANT i32 4
+ ; CHECK-NEXT: %cond:_(i1) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: G_BRCOND %cond(i1), %bb.3
; CHECK-NEXT: G_BR %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_10:_(s32) = G_CONSTANT i32 10
+ ; CHECK-NEXT: %cst32_10:_(i32) = G_CONSTANT i32 10
; CHECK-NEXT: G_BR %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_42:_(s32) = G_CONSTANT i32 42
+ ; CHECK-NEXT: %cst32_42:_(i32) = G_CONSTANT i32 42
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
- ; CHECK-NEXT: %phi:_(s32) = G_PHI %cst32_4(s32), %bb.1, %cst32_10(s32), %bb.2, %cst32_42(s32), %bb.3
- ; CHECK-NEXT: %ext:_(s64) = G_ZEXT %phi(s32)
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %phi:_(i32) = G_PHI %cst32_4(i32), %bb.1, %cst32_10(i32), %bb.2, %cst32_42(i32), %bb.3
+ ; CHECK-NEXT: %ext:_(i64) = G_ZEXT %phi(i32)
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %cst32_4:_(s32) = G_CONSTANT i32 4
- %cond:_(s1) = G_IMPLICIT_DEF
+ %cst32_4:_(i32) = G_CONSTANT i32 4
+ %cond:_(i1) = G_IMPLICIT_DEF
G_BRCOND %cond, %bb.5
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
G_BR %bb.4
bb.5:
- %cst32_42:_(s32) = G_CONSTANT i32 42
+ %cst32_42:_(i32) = G_CONSTANT i32 42
bb.4:
- %phi:_(s32) = G_PHI %cst32_4(s32), %bb.2, %cst32_10(s32), %bb.3, %cst32_42(s32), %bb.5
- %ext:_(s64) = G_ZEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %cst32_4(i32), %bb.2, %cst32_10(i32), %bb.3, %cst32_42(i32), %bb.5
+ %ext:_(i64) = G_ZEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -382,51 +382,51 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %add:_(s32) = G_ADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: %add:_(i32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst32_10:_(s32) = G_CONSTANT i32 10
+ ; CHECK-NEXT: %cst32_10:_(i32) = G_CONSTANT i32 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %phi:_(s32) = G_PHI %add(s32), %bb.1, %cst32_10(s32), %bb.2
- ; CHECK-NEXT: %ext:_(s64) = G_SEXT %phi(s32)
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %phi:_(i32) = G_PHI %add(i32), %bb.1, %cst32_10(i32), %bb.2
+ ; CHECK-NEXT: %ext:_(i64) = G_SEXT %phi(i32)
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %add:_(s32) = G_ADD %0, %1
+ %add:_(i32) = G_ADD %0, %1
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %add(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_SEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %add(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_SEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -441,51 +441,51 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %add:_(s32) = G_ADD [[COPY]], [[COPY1]]
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %add(s32)
+ ; CHECK-NEXT: %add:_(i32) = G_ADD [[COPY]], [[COPY1]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i64) = G_ANYEXT %add(i32)
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %ext:_(s64) = G_PHI [[ANYEXT]](s64), %bb.1, [[C]](s64), %bb.2
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %ext:_(i64) = G_PHI [[ANYEXT]](i64), %bb.1, [[C]](i64), %bb.2
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %add:_(s32) = G_ADD %0, %1
+ %add:_(i32) = G_ADD %0, %1
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %add(s32), %bb.2, %cst32_10(s32), %bb.3
- %ext:_(s64) = G_ANYEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %add(i32), %bb.2, %cst32_10(i32), %bb.3
+ %ext:_(i64) = G_ANYEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
@@ -499,57 +499,57 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
- ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 2
- ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(sle), [[COPY]](s32), %one
- ; CHECK-NEXT: G_BRCOND %cmp(s1), %bb.2
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
+ ; CHECK-NEXT: %one:_(i32) = G_CONSTANT i32 2
+ ; CHECK-NEXT: %cmp:_(i1) = G_ICMP intpred(sle), [[COPY]](i32), %one
+ ; CHECK-NEXT: G_BRCOND %cmp(i1), %bb.2
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %big0:_(s64) = G_SEXT [[COPY]](s32)
- ; CHECK-NEXT: %big1:_(s64) = G_SEXT [[COPY1]](s32)
- ; CHECK-NEXT: %add:_(s64) = G_ADD %big0, %big1
- ; CHECK-NEXT: %first:_(s32), %second:_(s32) = G_UNMERGE_VALUES %add(s64)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %second(s32)
+ ; CHECK-NEXT: %big0:_(i64) = G_SEXT [[COPY]](i32)
+ ; CHECK-NEXT: %big1:_(i64) = G_SEXT [[COPY1]](i32)
+ ; CHECK-NEXT: %add:_(i64) = G_ADD %big0, %big1
+ ; CHECK-NEXT: %first:_(i32), %second:_(i32) = G_UNMERGE_VALUES %add(i64)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i64) = G_ANYEXT %second(i32)
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
- ; CHECK-NEXT: %ext:_(s64) = G_PHI [[ANYEXT]](s64), %bb.1, [[C]](s64), %bb.2
- ; CHECK-NEXT: $x0 = COPY %ext(s64)
+ ; CHECK-NEXT: %ext:_(i64) = G_PHI [[ANYEXT]](i64), %bb.1, [[C]](i64), %bb.2
+ ; CHECK-NEXT: $x0 = COPY %ext(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
bb.1.entry:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %zero:_(s32) = G_CONSTANT i32 0
- %one:_(s32) = G_CONSTANT i32 2
- %cmp:_(s1) = G_ICMP intpred(sgt), %0(s32), %one
- G_BRCOND %cmp(s1), %bb.2
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %zero:_(i32) = G_CONSTANT i32 0
+ %one:_(i32) = G_CONSTANT i32 2
+ %cmp:_(i1) = G_ICMP intpred(sgt), %0(i32), %one
+ G_BRCOND %cmp(i1), %bb.2
G_BR %bb.3
bb.2:
- %big0:_(s64) = G_SEXT %0
- %big1:_(s64) = G_SEXT %1
- %add:_(s64) = G_ADD %big0, %big1
- %first:_(s32), %second:_(s32) = G_UNMERGE_VALUES %add:_(s64)
+ %big0:_(i64) = G_SEXT %0
+ %big1:_(i64) = G_SEXT %1
+ %add:_(i64) = G_ADD %big0, %big1
+ %first:_(i32), %second:_(i32) = G_UNMERGE_VALUES %add:_(i64)
G_BR %bb.4
bb.3:
- %cst32_10:_(s32) = G_CONSTANT i32 10
+ %cst32_10:_(i32) = G_CONSTANT i32 10
bb.4:
- %phi:_(s32) = G_PHI %second, %bb.2, %cst32_10, %bb.3
- %ext:_(s64) = G_ANYEXT %phi
- $x0 = COPY %ext(s64)
+ %phi:_(i32) = G_PHI %second, %bb.2, %cst32_10, %bb.3
+ %ext:_(i64) = G_ANYEXT %phi
+ $x0 = COPY %ext(i64)
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
index a66fd4faec800..50c77b2c79385 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
@@ -14,13 +14,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 4
- %2:_(s64) = G_CONSTANT i64 12
+ %1:_(i64) = G_CONSTANT i64 4
+ %2:_(i64) = G_CONSTANT i64 12
%3:_(p0) = G_PTR_ADD %0(p0), %1
%4:_(p0) = G_PTR_ADD %3(p0), %2
$x0 = COPY %4(p0)
@@ -36,13 +36,13 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 28
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 28
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 4
- %2:_(s64) = G_CONSTANT i64 12
+ %1:_(i64) = G_CONSTANT i64 4
+ %2:_(i64) = G_CONSTANT i64 12
%3:_(p0) = G_PTR_ADD %0(p0), %1
%4:_(p0) = G_PTR_ADD %3(p0), %2
%5:_(p0) = G_PTR_ADD %4(p0), %2
@@ -59,15 +59,15 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 28
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 28
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 4
- %2:_(s64) = G_CONSTANT i64 12
- %6:_(s32) = G_TRUNC %2(s64)
- %7:_(s64) = G_SEXT %6(s32)
+ %1:_(i64) = G_CONSTANT i64 4
+ %2:_(i64) = G_CONSTANT i64 12
+ %6:_(i32) = G_TRUNC %2(i64)
+ %7:_(i64) = G_SEXT %6(i32)
%3:_(p0) = G_PTR_ADD %0(p0), %1
%4:_(p0) = G_PTR_ADD %3(p0), %2
%5:_(p0) = G_PTR_ADD %4(p0), %7
@@ -85,24 +85,24 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
- ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
- ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
- ; CHECK-NEXT: %ld_other:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
- ; CHECK-NEXT: $x0 = COPY %ld(s64)
- ; CHECK-NEXT: $x1 = COPY %ld_other(s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4096
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](i64)
+ ; CHECK-NEXT: %ld:_(i64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
+ ; CHECK-NEXT: %ld_other:_(i64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
+ ; CHECK-NEXT: $x0 = COPY %ld(i64)
+ ; CHECK-NEXT: $x1 = COPY %ld_other(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 4
- %2:_(s64) = G_CONSTANT i64 4096
+ %1:_(i64) = G_CONSTANT i64 4
+ %2:_(i64) = G_CONSTANT i64 4096
%3:_(p0) = G_PTR_ADD %0(p0), %1
%4:_(p0) = G_PTR_ADD %3(p0), %2
- %ld:_(s64) = G_LOAD %4(p0) :: (load 8)
- %ld_other:_(s64) = G_LOAD %3(p0) :: (load 8)
- $x0 = COPY %ld(s64)
- $x1 = COPY %ld_other(s64)
+ %ld:_(i64) = G_LOAD %4(p0) :: (load 8)
+ %ld_other:_(i64) = G_LOAD %3(p0) :: (load 8)
+ $x0 = COPY %ld(i64)
+ $x1 = COPY %ld_other(i64)
RET_ReallyLR implicit $x0
...
---
@@ -116,24 +116,24 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600136
- ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
- ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
- ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
- ; CHECK-NEXT: %ld_other:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
- ; CHECK-NEXT: $x0 = COPY %ld(s64)
- ; CHECK-NEXT: $x1 = COPY %ld_other(s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1600136
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](i64)
+ ; CHECK-NEXT: %ld:_(i64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
+ ; CHECK-NEXT: %ld_other:_(i64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
+ ; CHECK-NEXT: $x0 = COPY %ld(i64)
+ ; CHECK-NEXT: $x1 = COPY %ld_other(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1600136
- %2:_(s64) = G_CONSTANT i64 8
+ %1:_(i64) = G_CONSTANT i64 1600136
+ %2:_(i64) = G_CONSTANT i64 8
%3:_(p0) = G_PTR_ADD %0(p0), %1
%4:_(p0) = G_PTR_ADD %3(p0), %2
- %ld:_(s64) = G_LOAD %4(p0) :: (load 8)
- %ld_other:_(s64) = G_LOAD %3(p0) :: (load 8)
- $x0 = COPY %ld(s64)
- $x1 = COPY %ld_other(s64)
+ %ld:_(i64) = G_LOAD %4(p0) :: (load 8)
+ %ld_other:_(i64) = G_LOAD %3(p0) :: (load 8)
+ $x0 = COPY %ld(i64)
+ $x1 = COPY %ld_other(i64)
RET_ReallyLR implicit $x0
...
---
@@ -148,20 +148,20 @@ body: |
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
- ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[COPY1]](s64)
- ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C]](s64)
- ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
- ; CHECK-NEXT: $x0 = COPY %ld(s64)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i64) = COPY $x1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[COPY1]](i64)
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C]](i64)
+ ; CHECK-NEXT: %ld:_(i64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
+ ; CHECK-NEXT: $x0 = COPY %ld(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(p0) = COPY $x0
- %1:_(s64) = COPY $x1
- %2:_(s32) = G_CONSTANT i32 8
- %3:_(s64) = G_ZEXT %2:_(s32)
- %4:_(p0) = G_PTR_ADD %0:_, %3:_(s64)
- %5:_(p0) = G_PTR_ADD %4:_, %1:_(s64)
- %ld:_(s64) = G_LOAD %5(p0) :: (load 8)
- $x0 = COPY %ld(s64)
+ %1:_(i64) = COPY $x1
+ %2:_(i32) = G_CONSTANT i32 8
+ %3:_(i64) = G_ZEXT %2:_(i32)
+ %4:_(p0) = G_PTR_ADD %0:_, %3:_(i64)
+ %5:_(p0) = G_PTR_ADD %4:_, %1:_(i64)
+ %ld:_(i64) = G_LOAD %5(p0) :: (load 8)
+ $x0 = COPY %ld(i64)
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir
index 94c93ba1f083e..6ed6626a63b81 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir
@@ -19,14 +19,14 @@ body: |
; CHECK-LABEL: name: self
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %a(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %a(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a, %a
- $w0 = COPY %select(s32)
+ %a:_(i32) = COPY $w0
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a, %a
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
...
@@ -42,15 +42,15 @@ body: |
; CHECK-LABEL: name: self_with_copy
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %a(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %a(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
- %b:_(s32) = COPY %a
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a, %b
- $w0 = COPY %select(s32)
+ %a:_(i32) = COPY $w0
+ %b:_(i32) = COPY %a
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
...
@@ -65,21 +65,21 @@ body: |
; CHECK-LABEL: name: self_not_equivalent_overwrite_w0
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
; CHECK-NEXT: $w0 = COPY $w1
- ; CHECK-NEXT: %b:_(s32) = COPY $w0
- ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w1
- ; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- ; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %a, %b
- ; CHECK-NEXT: $w0 = COPY %select(s32)
+ ; CHECK-NEXT: %b:_(i32) = COPY $w0
+ ; CHECK-NEXT: %cond_wide:gpr(i32) = COPY $w1
+ ; CHECK-NEXT: %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ ; CHECK-NEXT: %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ ; CHECK-NEXT: $w0 = COPY %select(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
+ %a:_(i32) = COPY $w0
$w0 = COPY $w1
- %b:_(s32) = COPY $w0
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a, %b
- $w0 = COPY %select(s32)
+ %b:_(i32) = COPY $w0
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
...
@@ -94,21 +94,21 @@ body: |
; CHECK-LABEL: name: self_not_equivalent_overwrite_w0_implicit
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
; CHECK-NEXT: BL @foo, implicit-def $w0
- ; CHECK-NEXT: %b:_(s32) = COPY $w0
- ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w1
- ; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- ; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %a, %b
- ; CHECK-NEXT: $w0 = COPY %select(s32)
+ ; CHECK-NEXT: %b:_(i32) = COPY $w0
+ ; CHECK-NEXT: %cond_wide:gpr(i32) = COPY $w1
+ ; CHECK-NEXT: %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ ; CHECK-NEXT: %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ ; CHECK-NEXT: $w0 = COPY %select(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
+ %a:_(i32) = COPY $w0
BL @foo, implicit-def $w0
- %b:_(s32) = COPY $w0
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a, %b
- $w0 = COPY %select(s32)
+ %b:_(i32) = COPY $w0
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
...
@@ -122,20 +122,20 @@ body: |
; CHECK-LABEL: name: self_not_equivalent_
diff erent_copies
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: %b:_(s32) = COPY $w1
- ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w1
- ; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- ; CHECK-NEXT: %select:_(s32) = G_SELECT %cond(s1), %a, %b
- ; CHECK-NEXT: $w0 = COPY %select(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: %b:_(i32) = COPY $w1
+ ; CHECK-NEXT: %cond_wide:gpr(i32) = COPY $w1
+ ; CHECK-NEXT: %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ ; CHECK-NEXT: %select:_(i32) = G_SELECT %cond(i1), %a, %b
+ ; CHECK-NEXT: $w0 = COPY %select(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
- %b:_(s32) = COPY $w1
- %c:_(s32) = COPY %b
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a, %c
- $w0 = COPY %select(s32)
+ %a:_(i32) = COPY $w0
+ %b:_(i32) = COPY $w1
+ %c:_(i32) = COPY %b
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a, %c
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
...
@@ -150,15 +150,15 @@ body: |
; CHECK-LABEL: name: self_with_assert_zext
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: %a_assert_zext:_(s32) = G_ASSERT_ZEXT %a, 16
- ; CHECK-NEXT: $w0 = COPY %a_assert_zext(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: %a_assert_zext:_(i32) = G_ASSERT_ZEXT %a, 16
+ ; CHECK-NEXT: $w0 = COPY %a_assert_zext(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %a:_(s32) = COPY $w0
- %a_assert_zext:_(s32) = G_ASSERT_ZEXT %a, 16
- %b:_(s32) = COPY %a_assert_zext
- %cond_wide:gpr(s32) = COPY $w1
- %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
- %select:_(s32) = G_SELECT %cond(s1), %a_assert_zext, %b
- $w0 = COPY %select(s32)
+ %a:_(i32) = COPY $w0
+ %a_assert_zext:_(i32) = G_ASSERT_ZEXT %a, 16
+ %b:_(i32) = COPY %a_assert_zext
+ %cond_wide:gpr(i32) = COPY $w1
+ %cond:gpr(i1) = G_TRUNC %cond_wide(i32)
+ %select:_(i32) = G_SELECT %cond(i1), %a_assert_zext, %b
+ $w0 = COPY %select(i32)
RET_ReallyLR implicit $w0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
index 560ffece5c97f..ccc353f035be1 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
@@ -18,15 +18,15 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s16) = G_SEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXTLOAD]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i16) = G_SEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[SEXTLOAD]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s16) = G_LOAD %0(p0) :: (load (s16))
- %2:_(s16) = G_SEXT_INREG %1, 8
- %3:_(s32) = G_ANYEXT %2(s16)
- $w0 = COPY %3(s32)
+ %1:_(i16) = G_LOAD %0(p0) :: (load (i16))
+ %2:_(i16) = G_SEXT_INREG %1, 8
+ %3:_(i32) = G_ANYEXT %2(i16)
+ $w0 = COPY %3(i32)
RET_ReallyLR implicit $w0
...
@@ -45,17 +45,17 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s16) = G_SEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i16) = G_SEXTLOAD [[COPY]](p0) :: (load (s8), align 2)
; CHECK-NEXT: G_STORE [[COPY]](p0), [[COPY]](p0) :: (store (p0))
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXTLOAD]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[SEXTLOAD]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s16) = G_LOAD %0(p0) :: (load (s16))
+ %1:_(i16) = G_LOAD %0(p0) :: (load (i16))
G_STORE %0(p0), %0(p0) :: (store (p0))
- %2:_(s16) = G_SEXT_INREG %1, 8
- %3:_(s32) = G_ANYEXT %2(s16)
- $w0 = COPY %3(s32)
+ %2:_(i16) = G_SEXT_INREG %1, 8
+ %3:_(i32) = G_ANYEXT %2(i16)
+ $w0 = COPY %3(i32)
RET_ReallyLR implicit $w0
...
@@ -73,14 +73,14 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LOAD]], 24
- ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i32))
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i32) = G_SEXT_INREG [[LOAD]], 24
+ ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s32) = G_LOAD %0(p0) :: (load (s32))
- %2:_(s32) = G_SEXT_INREG %1, 24
- $w0 = COPY %2(s32)
+ %1:_(i32) = G_LOAD %0(p0) :: (load (i32))
+ %2:_(i32) = G_SEXT_INREG %1, 24
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -98,16 +98,16 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load acquire (s16))
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s16) = G_SEXT_INREG [[LOAD]], 8
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXT_INREG]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i16) = G_LOAD [[COPY]](p0) :: (load acquire (i16))
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i16) = G_SEXT_INREG [[LOAD]], 8
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[SEXT_INREG]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s16) = G_LOAD %0(p0) :: (load acquire (s16))
- %2:_(s16) = G_SEXT_INREG %1, 8
- %3:_(s32) = G_ANYEXT %2(s16)
- $w0 = COPY %3(s32)
+ %1:_(i16) = G_LOAD %0(p0) :: (load acquire (i16))
+ %2:_(i16) = G_SEXT_INREG %1, 8
+ %3:_(i32) = G_ANYEXT %2(i16)
+ $w0 = COPY %3(i32)
RET_ReallyLR implicit $w0
...
@@ -125,16 +125,16 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (volatile load (s16))
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s16) = G_SEXT_INREG [[LOAD]], 8
- ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXT_INREG]](s16)
- ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i16) = G_LOAD [[COPY]](p0) :: (volatile load (i16))
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i16) = G_SEXT_INREG [[LOAD]], 8
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[SEXT_INREG]](i16)
+ ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(p0) = COPY $x0
- %1:_(s16) = G_LOAD %0(p0) :: (volatile load (s16))
- %2:_(s16) = G_SEXT_INREG %1, 8
- %3:_(s32) = G_ANYEXT %2(s16)
- $w0 = COPY %3(s32)
+ %1:_(i16) = G_LOAD %0(p0) :: (volatile load (i16))
+ %2:_(i16) = G_SEXT_INREG %1, 8
+ %3:_(i32) = G_ANYEXT %2(i16)
+ $w0 = COPY %3(i32)
RET_ReallyLR implicit $w0
...
@@ -146,17 +146,17 @@ body: |
; CHECK-LABEL: name: test_one_use_copy_multi_use_load
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
- ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s16))
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8
- ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i16))
+ ; CHECK-NEXT: G_STORE [[LOAD]](i32), [[COPY1]](p0) :: (store (i16))
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(i32) = COPY [[LOAD]](i32)
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i32) = G_SEXT_INREG [[COPY2]], 8
+ ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_LOAD %0 :: (load (s16))
- G_STORE %2, %1 :: (store (s16))
- %3:_(s32) = COPY %2
- %4:_(s32) = G_SEXT_INREG %3, 8
+ %2:_(i32) = G_LOAD %0 :: (load (i16))
+ G_STORE %2, %1 :: (store (i16))
+ %3:_(i32) = COPY %2
+ %4:_(i32) = G_SEXT_INREG %3, 8
$w0 = COPY %4
...
@@ -167,14 +167,14 @@ body: |
; CHECK-LABEL: name: test_multi_use_load
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
- ; CHECK-NEXT: G_STORE [[SEXTLOAD]](s32), [[COPY1]](p0) :: (store (s8))
- ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](s32)
+ ; CHECK-NEXT: [[SEXTLOAD:%[0-9]+]]:_(i32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))
+ ; CHECK-NEXT: G_STORE [[SEXTLOAD]](i32), [[COPY1]](p0) :: (store (i8))
+ ; CHECK-NEXT: $w0 = COPY [[SEXTLOAD]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_LOAD %0 :: (load (s8))
- G_STORE %2, %1 :: (store (s8))
- %3:_(s32) = G_SEXT_INREG %2, 8
+ %2:_(i32) = G_LOAD %0 :: (load (i8))
+ G_STORE %2, %1 :: (store (i8))
+ %3:_(i32) = G_SEXT_INREG %2, 8
$w0 = COPY %3
...
@@ -185,14 +185,14 @@ body: |
; CHECK-LABEL: name: test_multi_use_load_large_memsize
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
- ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[COPY1]](p0) :: (store (s16))
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LOAD]], 8
- ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p0) :: (load (i16))
+ ; CHECK-NEXT: G_STORE [[LOAD]](i32), [[COPY1]](p0) :: (store (i16))
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(i32) = G_SEXT_INREG [[LOAD]], 8
+ ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](i32)
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
- %2:_(s32) = G_LOAD %0 :: (load (s16))
- G_STORE %2, %1 :: (store (s16))
- %3:_(s32) = G_SEXT_INREG %2, 8
+ %2:_(i32) = G_LOAD %0 :: (load (i16))
+ G_STORE %2, %1 :: (store (i16))
+ %3:_(i32) = G_SEXT_INREG %2, 8
$w0 = COPY %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
index 914dfa0c58d59..d7a937ebac5fe 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
@@ -11,13 +11,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_unused_lhs
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[DEF]], shufflemask(1, 0, 1, 0)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(3, 2, 3, 2)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[DEF]], shufflemask(1, 0, 1, 0)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(3, 2, 3, 2)
RET_ReallyLR implicit %2
...
@@ -31,13 +31,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_unused_rhs
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[DEF]], shufflemask(0, 0, 1, 1)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0,0,1,1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[DEF]], shufflemask(0, 0, 1, 1)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0,0,1,1)
RET_ReallyLR implicit %2
...
@@ -51,13 +51,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_both_used
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[COPY1]], shufflemask(0, 2, 1, 3)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0,2,1,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[COPY1]], shufflemask(0, 2, 1, 3)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0,2,1,3)
RET_ReallyLR implicit %2
...
@@ -71,12 +71,12 @@ body: |
; CHECK-LABEL: name: shuffle_vector_undef_elems
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[DEF]], shufflemask(undef, 0, 1, undef)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(-1,0,1,-1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[DEF]], shufflemask(undef, 0, 1, undef)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(-1,0,1,-1)
RET_ReallyLR implicit %2
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
index 7a314ba9ab358..bf5a041575a9c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
@@ -11,12 +11,12 @@ body: |
; CHECK-LABEL: name: shuffle_vector_undef_rhs
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[DEF]], shufflemask(0, undef, 1, undef)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = G_IMPLICIT_DEF
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(0, 2, 1, 3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[DEF]], shufflemask(0, undef, 1, undef)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = G_IMPLICIT_DEF
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(0, 2, 1, 3)
RET_ReallyLR implicit %2
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
index 901341003d495..0272daf6de703 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
@@ -13,13 +13,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_0123
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[COPY]](<2 x s32>), [[COPY1]](<2 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<4 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(0, 1, 2, 3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x i32>) = G_CONCAT_VECTORS [[COPY]](<2 x i32>), [[COPY1]](<2 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<4 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(0, 1, 2, 3)
RET_ReallyLR implicit %2
...
# Check that we canonicalize shuffle_vector(Src1, Src2, mask(2,3,0,1,2,3))
@@ -34,13 +34,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_230123
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s32>) = G_CONCAT_VECTORS [[COPY1]](<2 x s32>), [[COPY]](<2 x s32>), [[COPY1]](<2 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,3,0,1,2,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x i32>) = G_CONCAT_VECTORS [[COPY1]](<2 x i32>), [[COPY]](<2 x i32>), [[COPY1]](<2 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,3,0,1,2,3)
RET_ReallyLR implicit %2
...
# Check that we canonicalize shuffle_vector(Src1, Src2, mask(2,undef,0,1,undef,3))
@@ -55,13 +55,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_2undef01undef3
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s32>) = G_CONCAT_VECTORS [[COPY1]](<2 x s32>), [[COPY]](<2 x s32>), [[COPY1]](<2 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,-1,0,1,-1,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x i32>) = G_CONCAT_VECTORS [[COPY1]](<2 x i32>), [[COPY]](<2 x i32>), [[COPY1]](<2 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,-1,0,1,-1,3)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -76,13 +76,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_mixed_src_200123_neg
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[COPY1]], shufflemask(2, 0, 0, 1, 2, 3)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,0,0,1,2,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[COPY1]], shufflemask(2, 0, 0, 1, 2, 3)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,0,0,1,2,3)
RET_ReallyLR implicit %2
...
# Check that we produce implicit_def while canonicalizing shuffle_vector(Src1, Src2, mask(2,undef,undef,undef,undef,1))
@@ -97,14 +97,14 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_2undef1
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s32>) = G_CONCAT_VECTORS [[COPY1]](<2 x s32>), [[DEF]](<2 x s32>), [[COPY]](<2 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,-1,-1,-1,-1,1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x i32>) = G_CONCAT_VECTORS [[COPY1]](<2 x i32>), [[DEF]](<2 x i32>), [[COPY]](<2 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,-1,-1,-1,-1,1)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -119,13 +119,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_src_flipped_230132_neg
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[COPY1]], shufflemask(2, 3, 0, 1, 3, 2)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,3,0,1,3,2)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[COPY1]], shufflemask(2, 3, 0, 1, 3, 2)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,3,0,1,3,2)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -140,13 +140,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_src_flipped_23013undef_neg
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x s32>), [[COPY1]], shufflemask(2, 3, 0, 1, 3, undef)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x s32>)
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<6 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1(<2 x s32>), shufflemask(2,3,0,1,3,-1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x i32>) = COPY $d1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<6 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<2 x i32>), [[COPY1]], shufflemask(2, 3, 0, 1, 3, undef)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<6 x i32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<6 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1(<2 x i32>), shufflemask(2,3,0,1,3,-1)
RET_ReallyLR implicit %2
...
@@ -162,13 +162,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_01234567
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[COPY]](<4 x s32>), [[COPY1]](<4 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<8 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<8 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(0, 1, 2, 3, 4, 5, 6, 7)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x i32>) = G_CONCAT_VECTORS [[COPY]](<4 x i32>), [[COPY1]](<4 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<8 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<8 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(0, 1, 2, 3, 4, 5, 6, 7)
RET_ReallyLR implicit %2
...
# Check that we canonicalize shuffle_vector(Src1, Src2, mask(4,5,6,7,0,1,2,3))
@@ -183,13 +183,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_45670123
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s32>) = G_CONCAT_VECTORS [[COPY1]](<4 x s32>), [[COPY]](<4 x s32>), [[COPY1]](<4 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<12 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,6,7,0,1,2,3,4,5,6,7)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x i32>) = G_CONCAT_VECTORS [[COPY1]](<4 x i32>), [[COPY]](<4 x i32>), [[COPY1]](<4 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<12 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,6,7,0,1,2,3,4,5,6,7)
RET_ReallyLR implicit %2
...
# Check that we canonicalize shuffle_vector(Src1, Src2, mask(4,5,undef,undef,0,1,2,3,undef,undef,6,7))
@@ -204,13 +204,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_45undefundef0123undefundef67
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s32>) = G_CONCAT_VECTORS [[COPY1]](<4 x s32>), [[COPY]](<4 x s32>), [[COPY1]](<4 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<12 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,-1,-1,0,1,2,3,-1,-1,6,7)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x i32>) = G_CONCAT_VECTORS [[COPY1]](<4 x i32>), [[COPY]](<4 x i32>), [[COPY1]](<4 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<12 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,-1,-1,0,1,2,3,-1,-1,6,7)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -225,13 +225,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_mixed_src_456000123_neg
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<8 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x s32>), [[COPY1]], shufflemask(4, 5, 6, 0, 0, 1, 2, 3)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<8 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<8 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,6,0,0,1,2,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<8 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x i32>), [[COPY1]], shufflemask(4, 5, 6, 0, 0, 1, 2, 3)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<8 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<8 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,6,0,0,1,2,3)
RET_ReallyLR implicit %2
...
# Check that we produce implicit_def while canonicalizing shuffle_vector(Src1, Src2, mask(2,undef,undef,undef,undef,1))
@@ -246,14 +246,14 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_45undefundefundefundefundefundefundefundef23
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s32>) = G_CONCAT_VECTORS [[COPY1]](<4 x s32>), [[DEF]](<4 x s32>), [[COPY]](<4 x s32>)
- ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<12 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,-1,-1,-1,-1,-1,-1,-1,-1,2,3)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x i32>) = G_CONCAT_VECTORS [[COPY1]](<4 x i32>), [[DEF]](<4 x i32>), [[COPY]](<4 x i32>)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[CONCAT_VECTORS]](<12 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<12 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,-1,-1,-1,-1,-1,-1,-1,-1,2,3)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -268,13 +268,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_4501_neg
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x s32>), [[COPY1]], shufflemask(4, 5, 0, 1)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<4 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,0,1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x i32>), [[COPY1]], shufflemask(4, 5, 0, 1)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<4 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<4 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,0,1)
RET_ReallyLR implicit %2
...
# Check that we don't canonicalize shuffle_vector into concat_vectors
@@ -289,13 +289,13 @@ body: |
; CHECK-LABEL: name: shuffle_vector_to_concat_vector_src_flipped_4567012367undefundef_neg
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<12 x s32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x s32>), [[COPY1]], shufflemask(4, 5, 6, 7, 0, 1, 2, 3, 6, 7, undef, undef)
- ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<12 x s32>)
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = COPY $q1
- %2:_(<12 x s32>) = G_SHUFFLE_VECTOR %0(<4 x s32>), %1(<4 x s32>), shufflemask(4,5,6,7,0,1,2,3,6,7,-1,-1)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i32>) = COPY $q0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x i32>) = COPY $q1
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<12 x i32>) = G_SHUFFLE_VECTOR [[COPY]](<4 x i32>), [[COPY1]], shufflemask(4, 5, 6, 7, 0, 1, 2, 3, 6, 7, undef, undef)
+ ; CHECK-NEXT: RET_ReallyLR implicit [[SHUF]](<12 x i32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = COPY $q1
+ %2:_(<12 x i32>) = G_SHUFFLE_VECTOR %0(<4 x i32>), %1(<4 x i32>), shufflemask(4,5,6,7,0,1,2,3,6,7,-1,-1)
RET_ReallyLR implicit %2
...
# Check that we canonicalize shuffle_vector(Src1, Src2, mask(4,5,undef,undef,0,1,2,3,undef,undef,6,7))
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-simplify-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-simplify-add.mir
index 83a4db1843a09..9e17b5663d953 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-simplify-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-simplify-add.mir
@@ -9,17 +9,17 @@ body: |
; Fold ((0-A) + B) -> B - A
; CHECK-LABEL: name: pat1
; CHECK: liveins: $x0, $x1
- ; CHECK: %copy1:_(s64) = COPY $x0
- ; CHECK: %copy2:_(s64) = COPY $x1
- ; CHECK: %add:_(s64) = G_SUB %copy2, %copy1
- ; CHECK: $x0 = COPY %add(s64)
+ ; CHECK: %copy1:_(i64) = COPY $x0
+ ; CHECK: %copy2:_(i64) = COPY $x1
+ ; CHECK: %add:_(i64) = G_SUB %copy2, %copy1
+ ; CHECK: $x0 = COPY %add(i64)
; CHECK: RET_ReallyLR implicit $x0
- %copy1:_(s64) = COPY $x0
- %copy2:_(s64) = COPY $x1
- %zero:_(s64) = G_CONSTANT i64 0
- %sub:_(s64) = G_SUB %zero, %copy1
- %add:_(s64) = G_ADD %sub, %copy2
- $x0 = COPY %add(s64)
+ %copy1:_(i64) = COPY $x0
+ %copy2:_(i64) = COPY $x1
+ %zero:_(i64) = G_CONSTANT i64 0
+ %sub:_(i64) = G_SUB %zero, %copy1
+ %add:_(i64) = G_ADD %sub, %copy2
+ $x0 = COPY %add(i64)
RET_ReallyLR implicit $x0
...
@@ -33,17 +33,17 @@ body: |
; CHECK-LABEL: name: pat2
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy1:_(s64) = COPY $x0
- ; CHECK-NEXT: %copy2:_(s64) = COPY $x1
- ; CHECK-NEXT: %add:_(s64) = G_SUB %copy1, %copy2
- ; CHECK-NEXT: $x0 = COPY %add(s64)
+ ; CHECK-NEXT: %copy1:_(i64) = COPY $x0
+ ; CHECK-NEXT: %copy2:_(i64) = COPY $x1
+ ; CHECK-NEXT: %add:_(i64) = G_SUB %copy1, %copy2
+ ; CHECK-NEXT: $x0 = COPY %add(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %copy1:_(s64) = COPY $x0
- %copy2:_(s64) = COPY $x1
- %zero:_(s64) = G_CONSTANT i64 0
- %sub:_(s64) = G_SUB %zero, %copy2
- %add:_(s64) = G_ADD %copy1, %sub
- $x0 = COPY %add(s64)
+ %copy1:_(i64) = COPY $x0
+ %copy2:_(i64) = COPY $x1
+ %zero:_(i64) = G_CONSTANT i64 0
+ %sub:_(i64) = G_SUB %zero, %copy2
+ %add:_(i64) = G_ADD %copy1, %sub
+ $x0 = COPY %add(i64)
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
index d36b382672e60..b0ef2ba8a47ae 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
@@ -10,13 +10,13 @@ body: |
;
; CHECK-LABEL: name: right_ident_sub
; CHECK: liveins: $w0
- ; CHECK: %x:_(s32) = COPY $w0
- ; CHECK: $w0 = COPY %x(s32)
+ ; CHECK: %x:_(i32) = COPY $w0
+ ; CHECK: $w0 = COPY %x(i32)
; CHECK: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_SUB %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_SUB %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -30,13 +30,13 @@ body: |
; CHECK-LABEL: name: right_ident_add
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_ADD %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_ADD %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -50,13 +50,13 @@ body: |
; CHECK-LABEL: name: mul_0
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY %cst(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %cst(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_MUL %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_MUL %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -71,15 +71,15 @@ body: |
; CHECK-LABEL: name: mul_0_cant_replace
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: %op:gpr(s32) = G_MUL %x, %cst
- ; CHECK-NEXT: $w0 = COPY %op(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: %op:gpr(i32) = G_MUL %x, %cst
+ ; CHECK-NEXT: $w0 = COPY %op(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:gpr(s32) = G_MUL %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:gpr(i32) = G_MUL %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -94,13 +94,13 @@ body: |
; CHECK-LABEL: name: sdiv_0
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY %cst(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %cst(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_SDIV %cst, %x
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_SDIV %cst, %x
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -114,13 +114,13 @@ body: |
; CHECK-LABEL: name: udiv_0
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY %cst(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %cst(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_UDIV %cst, %x
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_UDIV %cst, %x
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -134,13 +134,13 @@ body: |
; CHECK-LABEL: name: srem_0
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY %cst(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %cst(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_SREM %cst, %x
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_SREM %cst, %x
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -154,13 +154,13 @@ body: |
; CHECK-LABEL: name: urem_0
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY %cst(s32)
+ ; CHECK-NEXT: %cst:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY %cst(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_UREM %cst, %x
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_UREM %cst, %x
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -175,13 +175,13 @@ body: |
; CHECK-LABEL: name: right_ident_or
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_OR %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_OR %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -195,13 +195,13 @@ body: |
; CHECK-LABEL: name: right_ident_xor
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_XOR %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_XOR %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -215,13 +215,13 @@ body: |
; CHECK-LABEL: name: right_ident_shl
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_SHL %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_SHL %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -235,13 +235,13 @@ body: |
; CHECK-LABEL: name: right_ident_ashr
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_ASHR %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_ASHR %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -255,13 +255,13 @@ body: |
; CHECK-LABEL: name: right_ident_lshr
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %x(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %x(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 0
- %op:_(s32) = G_LSHR %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 0
+ %op:_(i32) = G_LSHR %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -275,15 +275,15 @@ body: |
; CHECK-LABEL: name: dont_fold_sub
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: %op:_(s32) = G_ADD %x, [[C]]
- ; CHECK-NEXT: $w0 = COPY %op(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: %op:_(i32) = G_ADD %x, [[C]]
+ ; CHECK-NEXT: $w0 = COPY %op(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 1
- %op:_(s32) = G_SUB %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 1
+ %op:_(i32) = G_SUB %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -296,14 +296,14 @@ body: |
; CHECK-LABEL: name: look_through_zext
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %zext_zero:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: $x0 = COPY %zext_zero(s64)
+ ; CHECK-NEXT: %zext_zero:_(i64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: $x0 = COPY %zext_zero(i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %zero:_(s8) = G_CONSTANT i8 0
- %zext_zero:_(s64) = G_ZEXT %zero(s8)
- %c:_(s64) = G_CONSTANT i64 72340172838076673
- %mul:_(s64) = G_MUL %c, %zext_zero
- $x0 = COPY %mul(s64)
+ %zero:_(i8) = G_CONSTANT i8 0
+ %zext_zero:_(i64) = G_ZEXT %zero(i8)
+ %c:_(i64) = G_CONSTANT i64 72340172838076673
+ %mul:_(i64) = G_MUL %c, %zext_zero
+ $x0 = COPY %mul(i64)
RET_ReallyLR implicit $x0
...
---
@@ -320,7 +320,7 @@ body: |
; CHECK-NEXT: $x0 = COPY %x(p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(p0) = COPY $x0
- %cst:_(s64) = G_CONSTANT i64 0
+ %cst:_(i64) = G_CONSTANT i64 0
%op:_(p0) = G_PTR_ADD %x(p0), %cst
$x0 = COPY %op(p0)
RET_ReallyLR implicit $x0
@@ -334,13 +334,13 @@ body: |
; CHECK-LABEL: name: right_identity_rotl
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %copy(s32)
+ ; CHECK-NEXT: %copy:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %copy(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %rot:_(s32) = G_ROTL %copy(s32), %zero(s32)
- $w0 = COPY %rot(s32)
+ %copy:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %rot:_(i32) = G_ROTL %copy(i32), %zero(i32)
+ $w0 = COPY %rot(i32)
RET_ReallyLR implicit $w0
...
...
@@ -353,13 +353,13 @@ body: |
; CHECK-LABEL: name: right_identity_rotr
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %copy:_(s32) = COPY $w0
- ; CHECK-NEXT: $w0 = COPY %copy(s32)
+ ; CHECK-NEXT: %copy:_(i32) = COPY $w0
+ ; CHECK-NEXT: $w0 = COPY %copy(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy:_(s32) = COPY $w0
- %zero:_(s32) = G_CONSTANT i32 0
- %rot:_(s32) = G_ROTR %copy(s32), %zero(s32)
- $w0 = COPY %rot(s32)
+ %copy:_(i32) = COPY $w0
+ %zero:_(i32) = G_CONSTANT i32 0
+ %rot:_(i32) = G_ROTR %copy(i32), %zero(i32)
+ $w0 = COPY %rot(i32)
RET_ReallyLR implicit $w0
...
---
@@ -370,14 +370,14 @@ body: |
; CHECK-LABEL: name: lshr_of_vec_zero
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
- ; CHECK-NEXT: $q0 = COPY [[COPY]](<8 x s16>)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x i16>) = COPY $q0
+ ; CHECK-NEXT: $q0 = COPY [[COPY]](<8 x i16>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
- %0:_(<8 x s16>) = COPY $q0
- %5:_(s16) = G_CONSTANT i16 0
- %zero_vec:_(<8 x s16>) = G_BUILD_VECTOR %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16)
- %shift:_(<8 x s16>) = G_LSHR %0, %zero_vec(<8 x s16>)
- $q0 = COPY %shift(<8 x s16>)
+ %0:_(<8 x i16>) = COPY $q0
+ %5:_(i16) = G_CONSTANT i16 0
+ %zero_vec:_(<8 x i16>) = G_BUILD_VECTOR %5(i16), %5(i16), %5(i16), %5(i16), %5(i16), %5(i16), %5(i16), %5(i16)
+ %shift:_(<8 x i16>) = G_LSHR %0, %zero_vec(<8 x i16>)
+ $q0 = COPY %shift(<8 x i16>)
RET_ReallyLR implicit $q0
...
---
@@ -392,9 +392,9 @@ body: |
; CHECK-NEXT: $q0 = COPY [[COPY]](<2 x p0>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x p0>) = COPY $q0
- %5:_(s64) = G_CONSTANT i64 0
- %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %5(s64), %5(s64)
- %ptr:_(<2 x p0>) = G_PTR_ADD %0, %zero_vec(<2 x s64>)
+ %5:_(i64) = G_CONSTANT i64 0
+ %zero_vec:_(<2 x i64>) = G_BUILD_VECTOR %5(i64), %5(i64)
+ %ptr:_(<2 x p0>) = G_PTR_ADD %0, %zero_vec(<2 x i64>)
$q0 = COPY %ptr(<2 x p0>)
RET_ReallyLR implicit $q0
...
@@ -410,16 +410,16 @@ body: |
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (s128))
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 9223372036854775808
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s128) = G_OR [[LOAD]], [[C]]
- ; CHECK-NEXT: G_STORE [[OR]](s128), [[COPY]](p0) :: (store (s128), align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i128) = G_LOAD [[COPY]](p0) :: (load (i128))
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i128) = G_CONSTANT i128 9223372036854775808
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i128) = G_OR [[LOAD]], [[C]]
+ ; CHECK-NEXT: G_STORE [[OR]](i128), [[COPY]](p0) :: (store (i128), align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
- %2:_(s128) = G_LOAD %0(p0) :: (load (s128))
- %4:_(s128) = G_CONSTANT i128 9223372036854775808
- %5:_(s128) = G_OR %2, %4
- G_STORE %5(s128), %0(p0) :: (store (s128), align 4)
+ %2:_(i128) = G_LOAD %0(p0) :: (load (i128))
+ %4:_(i128) = G_CONSTANT i128 9223372036854775808
+ %5:_(i128) = G_OR %2, %4
+ G_STORE %5(i128), %0(p0) :: (store (i128), align 4)
RET_ReallyLR
...
@@ -434,18 +434,18 @@ body: |
; CHECK-LABEL: name: mul_1_shift_of_shift
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[C]]
- ; CHECK-NEXT: $x0 = COPY [[OR]](s64)
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i64) = COPY $x0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(i64) = G_SHL [[COPY]], [[C]](i64)
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(i64) = G_OR [[SHL]], [[C]]
+ ; CHECK-NEXT: $x0 = COPY [[OR]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = COPY $x0
- %1:_(s64) = G_CONSTANT i64 1
- %2:_(s64) = G_SHL %0, %1(s64)
- %3:_(s64) = G_OR %2, %1
- %4:_(s64) = G_MUL %3, %1
- $x0 = COPY %4(s64)
+ %0:_(i64) = COPY $x0
+ %1:_(i64) = G_CONSTANT i64 1
+ %2:_(i64) = G_SHL %0, %1(i64)
+ %3:_(i64) = G_OR %2, %1
+ %4:_(i64) = G_MUL %3, %1
+ $x0 = COPY %4(i64)
RET_ReallyLR implicit $x0
...
@@ -462,15 +462,15 @@ body: |
; CHECK-LABEL: name: udiv_of_sext
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %2:_(s1) = G_CONSTANT i1 true
- %4:_(s2) = G_CONSTANT i2 1
- %3:_(s2) = G_SEXT %2:_(s1)
- %5:_(s2) = G_UDIV %4:_, %3:_
- %6:_(s32) = G_ANYEXT %5:_(s2)
- $w0 = COPY %6:_(s32)
+ %2:_(i1) = G_CONSTANT i1 true
+ %4:_(i2) = G_CONSTANT i2 1
+ %3:_(i2) = G_SEXT %2:_(i1)
+ %5:_(i2) = G_UDIV %4:_, %3:_
+ %6:_(i32) = G_ANYEXT %5:_(i2)
+ $w0 = COPY %6:_(i32)
RET_ReallyLR implicit $w0
...
@@ -483,15 +483,15 @@ body: |
; CHECK-LABEL: name: sub_to_add
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: %op:_(s32) = G_ADD %x, [[C]]
- ; CHECK-NEXT: $w0 = COPY %op(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: %op:_(i32) = G_ADD %x, [[C]]
+ ; CHECK-NEXT: $w0 = COPY %op(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 1
- %op:_(s32) = G_SUB %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 1
+ %op:_(i32) = G_SUB %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -504,15 +504,15 @@ body: |
; CHECK-LABEL: name: sub_to_add_nuw
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: %op:_(s32) = G_ADD %x, [[C]]
- ; CHECK-NEXT: $w0 = COPY %op(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: %op:_(i32) = G_ADD %x, [[C]]
+ ; CHECK-NEXT: $w0 = COPY %op(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 1
- %op:_(s32) = nuw G_SUB %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 1
+ %op:_(i32) = nuw G_SUB %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -525,15 +525,15 @@ body: |
; CHECK-LABEL: name: sub_to_add_nsw
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: %op:_(s32) = nsw G_ADD %x, [[C]]
- ; CHECK-NEXT: $w0 = COPY %op(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: %op:_(i32) = nsw G_ADD %x, [[C]]
+ ; CHECK-NEXT: $w0 = COPY %op(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %cst:_(s32) = G_CONSTANT i32 1
- %op:_(s32) = nsw G_SUB %x(s32), %cst
- $w0 = COPY %op(s32)
+ %x:_(i32) = COPY $w0
+ %cst:_(i32) = G_CONSTANT i32 1
+ %op:_(i32) = nsw G_SUB %x(i32), %cst
+ $w0 = COPY %op(i32)
RET_ReallyLR implicit $w0
...
@@ -546,18 +546,18 @@ body: |
; CHECK-LABEL: name: sub_to_add_nsw_128
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: %b:_(s8) = G_TRUNC %a(s32)
- ; CHECK-NEXT: %c:_(s8) = G_CONSTANT i8 -128
- ; CHECK-NEXT: %add:_(s8) = G_ADD %b, %c
- ; CHECK-NEXT: %d:_(s32) = G_ZEXT %add(s8)
- ; CHECK-NEXT: $w0 = COPY %d(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: %b:_(i8) = G_TRUNC %a(i32)
+ ; CHECK-NEXT: %c:_(i8) = G_CONSTANT i8 -128
+ ; CHECK-NEXT: %add:_(i8) = G_ADD %b, %c
+ ; CHECK-NEXT: %d:_(i32) = G_ZEXT %add(i8)
+ ; CHECK-NEXT: $w0 = COPY %d(i32)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %a:_(s32) = COPY $w0
- %b:_(s8) = G_TRUNC %a
- %c:_(s8) = G_CONSTANT i8 -128
- %add:_(s8) = nsw nuw G_SUB %b, %c
- %d:_(s32) = G_ZEXT %add
+ %a:_(i32) = COPY $w0
+ %b:_(i8) = G_TRUNC %a
+ %c:_(i8) = G_CONSTANT i8 -128
+ %add:_(i8) = nsw nuw G_SUB %b, %c
+ %d:_(i32) = G_ZEXT %add
$w0 = COPY %d
RET_ReallyLR implicit $x0
@@ -571,14 +571,14 @@ body: |
; CHECK-LABEL: name: sub_to_add_nsw_intmin
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:_(s32) = COPY $w0
- ; CHECK-NEXT: %c:_(s32) = G_CONSTANT i32 -2147483648
- ; CHECK-NEXT: %add:_(s32) = G_ADD %a, %c
- ; CHECK-NEXT: $w0 = COPY %add(s32)
+ ; CHECK-NEXT: %a:_(i32) = COPY $w0
+ ; CHECK-NEXT: %c:_(i32) = G_CONSTANT i32 -2147483648
+ ; CHECK-NEXT: %add:_(i32) = G_ADD %a, %c
+ ; CHECK-NEXT: $w0 = COPY %add(i32)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %a:_(s32) = COPY $w0
- %c:_(s32) = G_CONSTANT i32 -2147483648
- %add:_(s32) = nsw nuw G_SUB %a, %c
+ %a:_(i32) = COPY $w0
+ %c:_(i32) = G_CONSTANT i32 -2147483648
+ %add:_(i32) = nsw nuw G_SUB %a, %c
$w0 = COPY %add
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
index 3a10f47aa3068..33905111eb0f2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
@@ -7,12 +7,12 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: uitofp_to_zero
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK: $s0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK: $s0 = COPY [[C]](f32)
; CHECK: RET_ReallyLR implicit $s0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_UITOFP %0(s32)
- $s0 = COPY %1(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(f32) = G_UITOFP %0(i32)
+ $s0 = COPY %1(f32)
RET_ReallyLR implicit $s0
...
@@ -23,12 +23,12 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: sitofp_to_zero
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
- ; CHECK-NEXT: $s0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(f32) = G_FCONSTANT float 0.000000e+00
+ ; CHECK-NEXT: $s0 = COPY [[C]](f32)
; CHECK-NEXT: RET_ReallyLR implicit $s0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_SITOFP %0(s32)
- $s0 = COPY %1(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(f32) = G_SITOFP %0(i32)
+ $s0 = COPY %1(f32)
RET_ReallyLR implicit $s0
...
@@ -39,13 +39,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: and_to_zero
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_AND %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_AND %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -56,13 +56,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: mul_to_zero
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_MUL %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_MUL %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -73,13 +73,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: or_to_negative_one
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: $w0 = COPY [[C]](s32)
+ ; CHECK: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: $w0 = COPY [[C]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_OR %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_OR %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -90,13 +90,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: xor_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $w0 = COPY [[DEF]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_XOR %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_XOR %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -107,13 +107,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: add_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $w0 = COPY [[DEF]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_ADD %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_ADD %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -124,13 +124,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: sub_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $w0 = COPY [[DEF]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_SUB %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_SUB %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -141,12 +141,12 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: fptoui_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $w0 = COPY [[DEF]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_FPTOUI %0(s32)
- $w0 = COPY %1(s32)
+ %0:_(f32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_FPTOUI %0(f32)
+ $w0 = COPY %1(i32)
RET_ReallyLR implicit $w0
...
@@ -157,12 +157,12 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: fptosi_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $w0 = COPY [[DEF]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_FPTOSI %0(s32)
- $w0 = COPY %1(s32)
+ %0:_(f32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_FPTOSI %0(f32)
+ $w0 = COPY %1(i32)
RET_ReallyLR implicit $w0
...
@@ -173,13 +173,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: shufflevector_undef_ops_to_undef
- ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x s32>)
+ ; CHECK: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %1:_(<2 x s32>) = G_IMPLICIT_DEF
- %2:_(<2 x s32>) = G_IMPLICIT_DEF
- %0:_(<2 x s32>) = G_SHUFFLE_VECTOR %1(<2 x s32>), %2(<2 x s32>), shufflemask(0, 1)
- $d0 = COPY %0(<2 x s32>)
+ %1:_(<2 x i32>) = G_IMPLICIT_DEF
+ %2:_(<2 x i32>) = G_IMPLICIT_DEF
+ %0:_(<2 x i32>) = G_SHUFFLE_VECTOR %1(<2 x i32>), %2(<2 x i32>), shufflemask(0, 1)
+ $d0 = COPY %0(<2 x i32>)
RET_ReallyLR implicit $d0
...
@@ -193,13 +193,13 @@ body: |
; CHECK-LABEL: name: shufflevector_undef_mask_to_undef
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x s32>)
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %0:_(<2 x s32>) = COPY $d0
- %1:_(<2 x s32>) = COPY $d1
- %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(undef, undef)
- $d0 = COPY %2(<2 x s32>)
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(<2 x i32>) = COPY $d1
+ %2:_(<2 x i32>) = G_SHUFFLE_VECTOR %0(<2 x i32>), %1, shufflemask(undef, undef)
+ $d0 = COPY %2(<2 x i32>)
RET_ReallyLR implicit $d0
...
@@ -214,15 +214,15 @@ body: |
; CHECK-LABEL: name: shufflevector_not_all_ops_undef
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
- ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<2 x s32>) = G_SHUFFLE_VECTOR [[DEF]](<2 x s32>), [[COPY]], shufflemask(0, 1)
- ; CHECK-NEXT: $d0 = COPY [[SHUF]](<2 x s32>)
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x i32>) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $d0
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<2 x i32>) = G_SHUFFLE_VECTOR [[DEF]](<2 x i32>), [[COPY]], shufflemask(0, 1)
+ ; CHECK-NEXT: $d0 = COPY [[SHUF]](<2 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
- %1:_(<2 x s32>) = G_IMPLICIT_DEF
- %2:_(<2 x s32>) = COPY $d0
- %0:_(<2 x s32>) = G_SHUFFLE_VECTOR %1(<2 x s32>), %2(<2 x s32>), shufflemask(0, 1)
- $d0 = COPY %0(<2 x s32>)
+ %1:_(<2 x i32>) = G_IMPLICIT_DEF
+ %2:_(<2 x i32>) = COPY $d0
+ %0:_(<2 x i32>) = G_SHUFFLE_VECTOR %1(<2 x i32>), %2(<2 x i32>), shufflemask(0, 1)
+ $d0 = COPY %0(<2 x i32>)
RET_ReallyLR implicit $d0
...
@@ -233,13 +233,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: shl_undef_rhs
- ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $x0 = COPY [[DEF]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = G_CONSTANT i64 10
- %1:_(s64) = G_IMPLICIT_DEF
- %2:_(s64) = G_SHL %0, %1
- $x0 = COPY %2(s64)
+ %0:_(i64) = G_CONSTANT i64 10
+ %1:_(i64) = G_IMPLICIT_DEF
+ %2:_(i64) = G_SHL %0, %1
+ $x0 = COPY %2(i64)
RET_ReallyLR implicit $x0
...
@@ -250,13 +250,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: lshr_undef_rhs
- ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $x0 = COPY [[DEF]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = G_CONSTANT i64 10
- %1:_(s64) = G_IMPLICIT_DEF
- %2:_(s64) = G_LSHR %0, %1
- $x0 = COPY %2(s64)
+ %0:_(i64) = G_CONSTANT i64 10
+ %1:_(i64) = G_IMPLICIT_DEF
+ %2:_(i64) = G_LSHR %0, %1
+ $x0 = COPY %2(i64)
RET_ReallyLR implicit $x0
...
@@ -267,13 +267,13 @@ tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: ashr_undef_rhs
- ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
+ ; CHECK: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: $x0 = COPY [[DEF]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = G_CONSTANT i64 10
- %1:_(s64) = G_IMPLICIT_DEF
- %2:_(s64) = G_ASHR %0, %1
- $x0 = COPY %2(s64)
+ %0:_(i64) = G_CONSTANT i64 10
+ %1:_(i64) = G_IMPLICIT_DEF
+ %2:_(i64) = G_ASHR %0, %1
+ $x0 = COPY %2(i64)
RET_ReallyLR implicit $x0
...
@@ -285,15 +285,15 @@ body: |
bb.0:
; Optimize these to zero?
; CHECK-LABEL: name: lshr_undef_lhs
- ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[DEF]], [[C]](s64)
- ; CHECK-NEXT: $x0 = COPY [[LSHR]](s64)
+ ; CHECK: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(i64) = G_LSHR [[DEF]], [[C]](i64)
+ ; CHECK-NEXT: $x0 = COPY [[LSHR]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = G_CONSTANT i64 10
- %1:_(s64) = G_IMPLICIT_DEF
- %2:_(s64) = G_LSHR %1, %0
- $x0 = COPY %2(s64)
+ %0:_(i64) = G_CONSTANT i64 10
+ %1:_(i64) = G_IMPLICIT_DEF
+ %2:_(i64) = G_LSHR %1, %0
+ $x0 = COPY %2(i64)
RET_ReallyLR implicit $x0
...
@@ -305,15 +305,15 @@ body: |
bb.0:
; Optimize these to zero?
; CHECK-LABEL: name: ashr_undef_lhs
- ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[DEF]], [[C]](s64)
- ; CHECK-NEXT: $x0 = COPY [[ASHR]](s64)
+ ; CHECK: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 10
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(i64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(i64) = G_ASHR [[DEF]], [[C]](i64)
+ ; CHECK-NEXT: $x0 = COPY [[ASHR]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %0:_(s64) = G_CONSTANT i64 10
- %1:_(s64) = G_IMPLICIT_DEF
- %2:_(s64) = G_ASHR %1, %0
- $x0 = COPY %2(s64)
+ %0:_(i64) = G_CONSTANT i64 10
+ %1:_(i64) = G_IMPLICIT_DEF
+ %2:_(i64) = G_ASHR %1, %0
+ $x0 = COPY %2(i64)
RET_ReallyLR implicit $x0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir
index f0cd970602d55..83473e6805536 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir
@@ -13,18 +13,18 @@ body: |
; CHECK-LABEL: name: fold_scalar
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, [[C]]
- ; CHECK-NEXT: %xor:_(s32) = G_AND [[XOR]], %y
- ; CHECK-NEXT: $w0 = COPY %xor(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, [[C]]
+ ; CHECK-NEXT: %xor:_(i32) = G_AND [[XOR]], %y
+ ; CHECK-NEXT: $w0 = COPY %xor(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %and:_(s32) = G_AND %x, %y
- %xor:_(s32) = G_XOR %and, %y
- $w0 = COPY %xor(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %and:_(i32) = G_AND %x, %y
+ %xor:_(i32) = G_XOR %and, %y
+ $w0 = COPY %xor(i32)
RET_ReallyLR implicit $w0
...
@@ -38,19 +38,19 @@ body: |
; CHECK-LABEL: name: fold_vector
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
- ; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR %x, [[BUILD_VECTOR]]
- ; CHECK-NEXT: %xor:_(<2 x s32>) = G_AND [[XOR]], %y
- ; CHECK-NEXT: $x0 = COPY %xor(<2 x s32>)
+ ; CHECK-NEXT: %x:_(<2 x i32>) = COPY $x0
+ ; CHECK-NEXT: %y:_(<2 x i32>) = COPY $x1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i32>) = G_BUILD_VECTOR [[C]](i32), [[C]](i32)
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x i32>) = G_XOR %x, [[BUILD_VECTOR]]
+ ; CHECK-NEXT: %xor:_(<2 x i32>) = G_AND [[XOR]], %y
+ ; CHECK-NEXT: $x0 = COPY %xor(<2 x i32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
- %x:_(<2 x s32>) = COPY $x0
- %y:_(<2 x s32>) = COPY $x1
- %and:_(<2 x s32>) = G_AND %x, %y
- %xor:_(<2 x s32>) = G_XOR %and, %y
- $x0 = COPY %xor(<2 x s32>)
+ %x:_(<2 x i32>) = COPY $x0
+ %y:_(<2 x i32>) = COPY $x1
+ %and:_(<2 x i32>) = G_AND %x, %y
+ %xor:_(<2 x i32>) = G_XOR %and, %y
+ $x0 = COPY %xor(<2 x i32>)
RET_ReallyLR implicit $x0
...
@@ -64,18 +64,18 @@ body: |
; CHECK-LABEL: name: fold_commuted_and
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, [[C]]
- ; CHECK-NEXT: %xor:_(s32) = G_AND [[XOR]], %y
- ; CHECK-NEXT: $w0 = COPY %xor(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, [[C]]
+ ; CHECK-NEXT: %xor:_(i32) = G_AND [[XOR]], %y
+ ; CHECK-NEXT: $w0 = COPY %xor(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %and:_(s32) = G_AND %y, %x
- %xor:_(s32) = G_XOR %and, %y
- $w0 = COPY %xor(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %and:_(i32) = G_AND %y, %x
+ %xor:_(i32) = G_XOR %and, %y
+ $w0 = COPY %xor(i32)
RET_ReallyLR implicit $w0
...
@@ -89,18 +89,18 @@ body: |
; CHECK-LABEL: name: fold_commuted_xor
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, [[C]]
- ; CHECK-NEXT: %xor:_(s32) = G_AND [[XOR]], %y
- ; CHECK-NEXT: $w0 = COPY %xor(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, [[C]]
+ ; CHECK-NEXT: %xor:_(i32) = G_AND [[XOR]], %y
+ ; CHECK-NEXT: $w0 = COPY %xor(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %and:_(s32) = G_AND %x, %y
- %xor:_(s32) = G_XOR %y, %and
- $w0 = COPY %xor(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %and:_(i32) = G_AND %x, %y
+ %xor:_(i32) = G_XOR %y, %and
+ $w0 = COPY %xor(i32)
RET_ReallyLR implicit $w0
...
@@ -114,18 +114,18 @@ body: |
; CHECK-LABEL: name: fold_commuted_xor_and
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %x, [[C]]
- ; CHECK-NEXT: %xor:_(s32) = G_AND [[XOR]], %y
- ; CHECK-NEXT: $w0 = COPY %xor(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -1
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR %x, [[C]]
+ ; CHECK-NEXT: %xor:_(i32) = G_AND [[XOR]], %y
+ ; CHECK-NEXT: $w0 = COPY %xor(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %and:_(s32) = G_AND %y, %x
- %xor:_(s32) = G_XOR %y, %and
- $w0 = COPY %xor(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %and:_(i32) = G_AND %y, %x
+ %xor:_(i32) = G_XOR %y, %and
+ $w0 = COPY %xor(i32)
RET_ReallyLR implicit $w0
...
@@ -139,19 +139,19 @@ body: |
; CHECK-LABEL: name: dont_fold_
diff erent_regs
; CHECK: liveins: $w0, $w1, $w2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: %z:_(s32) = COPY $w2
- ; CHECK-NEXT: %and:_(s32) = G_AND %x, %z
- ; CHECK-NEXT: %xor:_(s32) = G_XOR %and, %y
- ; CHECK-NEXT: $w0 = COPY %xor(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: %z:_(i32) = COPY $w2
+ ; CHECK-NEXT: %and:_(i32) = G_AND %x, %z
+ ; CHECK-NEXT: %xor:_(i32) = G_XOR %and, %y
+ ; CHECK-NEXT: $w0 = COPY %xor(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %z:_(s32) = COPY $w2
- %and:_(s32) = G_AND %x, %z
- %xor:_(s32) = G_XOR %and, %y
- $w0 = COPY %xor(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %z:_(i32) = COPY $w2
+ %and:_(i32) = G_AND %x, %z
+ %xor:_(i32) = G_XOR %and, %y
+ $w0 = COPY %xor(i32)
RET_ReallyLR implicit $w0
...
@@ -165,19 +165,19 @@ body: |
; CHECK-LABEL: name: dont_fold_more_than_one_use
; CHECK: liveins: $w0, $w1, $w2
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %x:_(s32) = COPY $w0
- ; CHECK-NEXT: %y:_(s32) = COPY $w1
- ; CHECK-NEXT: %z:_(s32) = COPY $w2
- ; CHECK-NEXT: %and:_(s32) = G_AND %x, %z
- ; CHECK-NEXT: %xor:_(s32) = G_XOR %and, %y
- ; CHECK-NEXT: %add:_(s32) = G_ADD %and, %xor
- ; CHECK-NEXT: $w0 = COPY %add(s32)
+ ; CHECK-NEXT: %x:_(i32) = COPY $w0
+ ; CHECK-NEXT: %y:_(i32) = COPY $w1
+ ; CHECK-NEXT: %z:_(i32) = COPY $w2
+ ; CHECK-NEXT: %and:_(i32) = G_AND %x, %z
+ ; CHECK-NEXT: %xor:_(i32) = G_XOR %and, %y
+ ; CHECK-NEXT: %add:_(i32) = G_ADD %and, %xor
+ ; CHECK-NEXT: $w0 = COPY %add(i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %x:_(s32) = COPY $w0
- %y:_(s32) = COPY $w1
- %z:_(s32) = COPY $w2
- %and:_(s32) = G_AND %x, %z
- %xor:_(s32) = G_XOR %and, %y
- %add:_(s32) = G_ADD %and, %xor
- $w0 = COPY %add(s32)
+ %x:_(i32) = COPY $w0
+ %y:_(i32) = COPY $w1
+ %z:_(i32) = COPY $w2
+ %and:_(i32) = G_AND %x, %z
+ %xor:_(i32) = G_XOR %and, %y
+ %add:_(i32) = G_ADD %and, %xor
+ $w0 = COPY %add(i32)
RET_ReallyLR implicit $w0
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