[llvm] 3b2fe5a - [SLP][NFC]Add a test with the non-profitable vectorization, NFC
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 30 07:14:09 PDT 2026
Author: Alexey Bataev
Date: 2026-07-30T10:14:04-04:00
New Revision: 3b2fe5ae137b845c83a3e435b23f1d9c2abb17f6
URL: https://github.com/llvm/llvm-project/commit/3b2fe5ae137b845c83a3e435b23f1d9c2abb17f6
DIFF: https://github.com/llvm/llvm-project/commit/3b2fe5ae137b845c83a3e435b23f1d9c2abb17f6.diff
LOG: [SLP][NFC]Add a test with the non-profitable vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/213028
Added:
llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-node-gather-cost.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-node-gather-cost.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-node-gather-cost.ll
new file mode 100644
index 0000000000000..e344fcbebbb79
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-node-gather-cost.ll
@@ -0,0 +1,133 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=aarch64 | FileCheck %s
+
+define void @test(ptr %start1, ptr %start2, ptr %start3, ptr %r, i32 %n) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[START1:%.*]], ptr [[START2:%.*]], ptr [[START3:%.*]], ptr [[R:%.*]], i32 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: [[CMP253:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP253]], label %[[FOR_BODY4:.*]], label %[[FOR_COND_CLEANUP_SPLIT:.*]]
+; CHECK: [[FOR_COND_CLEANUP_SPLIT]]:
+; CHECK-NEXT: ret void
+; CHECK: [[FOR_BODY4]]:
+; CHECK-NEXT: [[J_058:%.*]] = phi i32 [ [[INC:%.*]], %[[IF_END18:.*]] ], [ 0, %[[ENTRY]] ]
+; CHECK-NEXT: [[START1_ADDR_157:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], %[[IF_END18]] ], [ [[START1]], %[[ENTRY]] ]
+; CHECK-NEXT: [[R_ADDR_156:%.*]] = phi ptr [ [[INCDEC_PTR25:%.*]], %[[IF_END18]] ], [ [[R]], %[[ENTRY]] ]
+; CHECK-NEXT: [[START3_ADDR_155:%.*]] = phi ptr [ [[INCDEC_PTR6:%.*]], %[[IF_END18]] ], [ [[START3]], %[[ENTRY]] ]
+; CHECK-NEXT: [[START2_ADDR_154:%.*]] = phi ptr [ [[INCDEC_PTR5:%.*]], %[[IF_END18]] ], [ [[START2]], %[[ENTRY]] ]
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr [[START1_ADDR_157]], i64 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[START1_ADDR_157]], align 4
+; CHECK-NEXT: [[INCDEC_PTR5]] = getelementptr inbounds nuw i8, ptr [[START2_ADDR_154]], i64 4
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[START2_ADDR_154]], align 4
+; CHECK-NEXT: [[INCDEC_PTR6]] = getelementptr inbounds nuw i8, ptr [[START3_ADDR_155]], i64 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[START3_ADDR_155]], align 4
+; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP2]], [[TMP1]]
+; CHECK-NEXT: br i1 [[CMP7]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+; CHECK: [[IF_THEN]]:
+; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @call()
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[TMP0]]
+; CHECK-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP1]], 1
+; CHECK-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP2]], 1
+; CHECK-NEXT: br label %[[IF_END]]
+; CHECK: [[IF_END]]:
+; CHECK-NEXT: [[M1_0:%.*]] = phi i32 [ [[ADD]], %[[IF_THEN]] ], [ [[TMP0]], %[[FOR_BODY4]] ]
+; CHECK-NEXT: [[M2_0:%.*]] = phi i32 [ [[ADD8]], %[[IF_THEN]] ], [ [[TMP1]], %[[FOR_BODY4]] ]
+; CHECK-NEXT: [[M3_0:%.*]] = phi i32 [ [[ADD9]], %[[IF_THEN]] ], [ [[TMP2]], %[[FOR_BODY4]] ]
+; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[M1_0]], [[M2_0]]
+; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[M1_0]], i64 0
+; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[M2_0]], i64 1
+; CHECK-NEXT: br i1 [[CMP10]], label %[[IF_THEN11:.*]], label %[[IF_END18]]
+; CHECK: [[IF_THEN11]]:
+; CHECK-NEXT: [[TMP5:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP4]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[TMP5]], <2 x i32> splat (i32 128))
+; CHECK-NEXT: [[TMP7:%.*]] = tail call i32 @llvm.smax.i32(i32 [[M3_0]], i32 0)
+; CHECK-NEXT: [[TMP8:%.*]] = tail call i32 @llvm.umin.i32(i32 [[TMP7]], i32 128)
+; CHECK-NEXT: br label %[[IF_END18]]
+; CHECK: [[IF_END18]]:
+; CHECK-NEXT: [[M3_1:%.*]] = phi i32 [ [[TMP8]], %[[IF_THEN11]] ], [ [[M3_0]], %[[IF_END]] ]
+; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ [[TMP6]], %[[IF_THEN11]] ], [ [[TMP4]], %[[IF_END]] ]
+; CHECK-NEXT: [[M1_1:%.*]] = extractelement <2 x i32> [[TMP9]], i64 0
+; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[M1_1]], 4
+; CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[SHR]] to i8
+; CHECK-NEXT: [[INCDEC_PTR19:%.*]] = getelementptr inbounds nuw i8, ptr [[R_ADDR_156]], i64 1
+; CHECK-NEXT: store i8 [[CONV]], ptr [[R_ADDR_156]], align 1
+; CHECK-NEXT: [[M2_1:%.*]] = extractelement <2 x i32> [[TMP9]], i64 1
+; CHECK-NEXT: [[SHR20:%.*]] = lshr i32 [[M2_1]], 4
+; CHECK-NEXT: [[CONV21:%.*]] = trunc i32 [[SHR20]] to i8
+; CHECK-NEXT: [[INCDEC_PTR22:%.*]] = getelementptr inbounds nuw i8, ptr [[R_ADDR_156]], i64 2
+; CHECK-NEXT: store i8 [[CONV21]], ptr [[INCDEC_PTR19]], align 1
+; CHECK-NEXT: [[SHR23:%.*]] = lshr i32 [[M3_1]], 4
+; CHECK-NEXT: [[CONV24:%.*]] = trunc i32 [[SHR23]] to i8
+; CHECK-NEXT: [[INCDEC_PTR25]] = getelementptr inbounds nuw i8, ptr [[R_ADDR_156]], i64 3
+; CHECK-NEXT: store i8 [[CONV24]], ptr [[INCDEC_PTR22]], align 1
+; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_058]], 1
+; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[N]]
+; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_SPLIT]], label %[[FOR_BODY4]]
+;
+entry:
+ %cmp253 = icmp sgt i32 %n, 0
+ br i1 %cmp253, label %for.body4, label %for.cond.cleanup.split
+
+for.cond.cleanup.split:
+ ret void
+
+for.body4:
+ %j.058 = phi i32 [ %inc, %if.end18 ], [ 0, %entry ]
+ %start1.addr.157 = phi ptr [ %incdec.ptr, %if.end18 ], [ %start1, %entry ]
+ %r.addr.156 = phi ptr [ %incdec.ptr25, %if.end18 ], [ %r, %entry ]
+ %start3.addr.155 = phi ptr [ %incdec.ptr6, %if.end18 ], [ %start3, %entry ]
+ %start2.addr.154 = phi ptr [ %incdec.ptr5, %if.end18 ], [ %start2, %entry ]
+ %incdec.ptr = getelementptr inbounds nuw i8, ptr %start1.addr.157, i64 4
+ %0 = load i32, ptr %start1.addr.157, align 4
+ %incdec.ptr5 = getelementptr inbounds nuw i8, ptr %start2.addr.154, i64 4
+ %1 = load i32, ptr %start2.addr.154, align 4
+ %incdec.ptr6 = getelementptr inbounds nuw i8, ptr %start3.addr.155, i64 4
+ %2 = load i32, ptr %start3.addr.155, align 4
+ %cmp7 = icmp sgt i32 %2, %1
+ br i1 %cmp7, label %if.then, label %if.end
+
+if.then:
+ %call = tail call i32 @call()
+ %add = add nsw i32 %call, %0
+ %add8 = add nsw i32 %1, 1
+ %add9 = add nsw i32 %2, 1
+ br label %if.end
+
+if.end:
+ %m1.0 = phi i32 [ %add, %if.then ], [ %0, %for.body4 ]
+ %m2.0 = phi i32 [ %add8, %if.then ], [ %1, %for.body4 ]
+ %m3.0 = phi i32 [ %add9, %if.then ], [ %2, %for.body4 ]
+ %cmp10 = icmp sgt i32 %m1.0, %m2.0
+ br i1 %cmp10, label %if.then11, label %if.end18
+
+if.then11:
+ %3 = tail call i32 @llvm.smax.i32(i32 %m1.0, i32 0)
+ %4 = tail call i32 @llvm.umin.i32(i32 %3, i32 128)
+ %5 = tail call i32 @llvm.smax.i32(i32 %m2.0, i32 0)
+ %6 = tail call i32 @llvm.umin.i32(i32 %5, i32 128)
+ %7 = tail call i32 @llvm.smax.i32(i32 %m3.0, i32 0)
+ %8 = tail call i32 @llvm.umin.i32(i32 %7, i32 128)
+ br label %if.end18
+
+if.end18:
+ %m1.1 = phi i32 [ %4, %if.then11 ], [ %m1.0, %if.end ]
+ %m2.1 = phi i32 [ %6, %if.then11 ], [ %m2.0, %if.end ]
+ %m3.1 = phi i32 [ %8, %if.then11 ], [ %m3.0, %if.end ]
+ %shr = lshr i32 %m1.1, 4
+ %conv = trunc i32 %shr to i8
+ %incdec.ptr19 = getelementptr inbounds nuw i8, ptr %r.addr.156, i64 1
+ store i8 %conv, ptr %r.addr.156, align 1
+ %shr20 = lshr i32 %m2.1, 4
+ %conv21 = trunc i32 %shr20 to i8
+ %incdec.ptr22 = getelementptr inbounds nuw i8, ptr %r.addr.156, i64 2
+ store i8 %conv21, ptr %incdec.ptr19, align 1
+ %shr23 = lshr i32 %m3.1, 4
+ %conv24 = trunc i32 %shr23 to i8
+ %incdec.ptr25 = getelementptr inbounds nuw i8, ptr %r.addr.156, i64 3
+ store i8 %conv24, ptr %incdec.ptr22, align 1
+ %inc = add nuw nsw i32 %j.058, 1
+ %exitcond.not = icmp eq i32 %inc, %n
+ br i1 %exitcond.not, label %for.cond.cleanup.split, label %for.body4
+}
+
+declare i32 @call(...)
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