[llvm] 508b5be - AMDGPU: Add supports-wgp subtarget feature (#212704)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 29 20:53:05 PDT 2026
Author: Matt Arsenault
Date: 2026-07-30T05:53:00+02:00
New Revision: 508b5be88431b3cce7546baf752ed628a531d699
URL: https://github.com/llvm/llvm-project/commit/508b5be88431b3cce7546baf752ed628a531d699
DIFF: https://github.com/llvm/llvm-project/commit/508b5be88431b3cce7546baf752ed628a531d699.diff
LOG: AMDGPU: Add supports-wgp subtarget feature (#212704)
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
llvm/lib/Target/AMDGPU/GCNSubtarget.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index fbfd0e2f6937f..09db1a9f3f009 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -238,6 +238,15 @@ def FeatureXNACK : SubtargetFeature<"xnack",
InlineIgnore
>;
+// Whether the hardware supports WGP (work-group processor) execution
+// mode, as opposed to the per-kernel CU-mode selection
+// (FeatureCuMode).
+defm SupportsWGP : AMDGPUSubtargetFeature<"supports-wgp",
+ "Hardware supports WGP mode",
+ /*GenPredicate=*/false, /*GenAssemblerPredicate=*/false,
+ [], InlineIgnore
+>;
+
def FeatureCuMode : SubtargetFeature<"cumode",
"EnableCuMode",
"true",
@@ -1578,7 +1587,7 @@ def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
"gfx10",
[FeatureFP64, FeatureAddressableLocalMemorySize65536, FeatureMIMG_R128,
- FeatureSupportsWave32, FeatureSupportsWave64,
+ FeatureSupportsWave32, FeatureSupportsWave64, FeatureSupportsWGP,
FeatureFlatAddressSpace,
FeatureCIInsts, Feature16BitInsts,
FeatureSMemRealTime, FeatureInv2PiInlineImm,
@@ -1609,7 +1618,7 @@ def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
"gfx11",
[FeatureFP64, FeatureAddressableLocalMemorySize65536, FeatureMIMG_R128,
- FeatureSupportsWave32, FeatureSupportsWave64,
+ FeatureSupportsWave32, FeatureSupportsWave64, FeatureSupportsWGP,
FeatureFlatAddressSpace, Feature16BitInsts,
FeatureInv2PiInlineImm, FeatureApertureRegs,
FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
@@ -1666,7 +1675,7 @@ def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
def FeatureGFX13 : GCNSubtargetFeatureGeneration<"GFX13",
"gfx13",
[FeatureFP64, FeatureMIMG_R128,
- FeatureSupportsWave32, FeatureSupportsWave64,
+ FeatureSupportsWave32, FeatureSupportsWave64, FeatureSupportsWGP,
FeatureFlatAddressSpace, Feature16BitInsts,
FeatureInv2PiInlineImm, FeatureApertureRegs,
FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
@@ -2137,7 +2146,7 @@ def FeatureISAVersion11_7_Generic: FeatureSet<
def FeatureISAVersion12 : FeatureSet<
[FeatureGFX12,
- FeatureSupportsWave64,
+ FeatureSupportsWave64, FeatureSupportsWGP,
FeatureBackOffBarrier,
FeatureAddressableLocalMemorySize65536,
FeatureLDSBankCount32,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index e1800c4ebded2..3d337a466a75e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -1444,7 +1444,7 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
CreateExpr(STM.getWavefrontSize()), Ctx),
CreateExpr(1ULL << ScratchAlignShift));
- if (STM.supportsWGP()) {
+ if (STM.hasSupportsWGP()) {
ProgInfo.WgpMode = STM.isCuModeEnabled() ? 0 : 1;
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
index 793554e9bb432..900b5d6717619 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
@@ -507,7 +507,7 @@ MetadataStreamerMsgPackV4::getHSAKernelProps(const MachineFunction &MF,
ProgramInfo.DynamicCallStack);
}
- if (CodeObjectVersion >= AMDGPU::AMDHSA_COV5 && STM.supportsWGP())
+ if (CodeObjectVersion >= AMDGPU::AMDHSA_COV5 && STM.hasSupportsWGP())
Kern[".workgroup_processor_mode"] =
Kern.getDocument()->getNode(ProgramInfo.WgpMode);
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index c7937d8d33ed5..78ffad6875057 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -218,12 +218,6 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
/// the original value.
bool zeroesHigh16BitsOfDest(unsigned Opcode) const;
- bool supportsWGP() const {
- if (HasGFX1250Insts)
- return false;
- return getGeneration() >= GFX10;
- }
-
bool hasHWFP64() const { return HasFP64; }
bool hasAddr64() const {
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