[llvm] [AMDGPU] Use alias analysis for SMEM/VMEM WAR waitcnts (PR #206569)

[Matt Arsenault via llvm-commits]

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@@ -2418,18 +2419,37 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
       // instruction to guarantee the right WAW order.
       // 2) If a destination operand that was used by a recent export/store ins,
       // add s_waitcnt on exp_cnt to guarantee the WAR order.
-
+      bool CheckedPendingSMRDLoads = false;
       for (const MachineMemOperand *Memop : MI.memoperands()) {
         const Value *Ptr = Memop->getValue();
-        if (Memop->isStore()) {
-          if (auto It = SLoadAddresses.find(Ptr); It != SLoadAddresses.end()) {
+        unsigned AS = Memop->getAddrSpace();
+
+        bool IsLDSDMARelevantAS =
+            AS == AMDGPUAS::FLAT_ADDRESS || AS == AMDGPUAS::LOCAL_ADDRESS;
+        // TODO: Rely on SIInstrInfo::areMemAccessesTriviallyDisjoint for this
+        // once it uses MMO address spaces to distinguish lowered memory forms.
+        bool IsSMRDWARRelevantAS =
+            AS == AMDGPUAS::FLAT_ADDRESS || AS == AMDGPUAS::GLOBAL_ADDRESS;
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arsenm wrote:

Use isExtendedGlobalAddrSpace

https://github.com/llvm/llvm-project/pull/206569