[llvm] [PreISelIntrinsicLowering] Lower bounded memcpy/memmove to masked load/store (PR #212710)

[via llvm-commits]

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Harishankar14 wrote:

@RKSimon So replaced the hardcoded 64 with the target's fixed vector register width (getRegisterBitWidth(RGK_FixedWidthVector)) divided by the element size, so it's derived rather than magic  64 bytes (which i kind of just used for the sake of understanding and testing) on AVX512, and the isLegalMaskedLoad/isLegalMaskedStore checks do the final per width target gating. On a target without byte-granular masked loads (like  AVX2, which only has element-wise vpmaskmov), the legality check declines and it falls through to the libcall. Added tests covering the width adaptation (16/32/64-byte) and a non-AVX512BW target that correctly declines.

https://github.com/llvm/llvm-project/pull/212710