[llvm] [BOLT][RISCV] Fix conditional tail call (PR #209474)

[via llvm-commits]

Thrrreeee wrote:

cc @aaupov , I noticed that your PR mentioned support for new backends. We may submit a substantial number of patches to improve RISC-V support in the future, so I would appreciate your thoughts on the review process and the best strategy for upstreaming these changes.

My current plan is to submit the RISC-V-specific code first, and then keep changes to the shared code paths as small as possible, adding RISC-V-specific handling guarded by  `BC->isRISCV()`  where necessary.

Alternatively, we could first develop a draft implementation that can handle large programs, use it to evaluate **processing-time and peak-memory impact on existing targets** and then split the changes into smaller PRs. What approach would you recommend?

https://github.com/llvm/llvm-project/pull/209474