[llvm] [CodeGen][ARM] Add regression tests for #202263 (PR #202599)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,112 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=armv8a-unknown-linux -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s
+
+# Regression test for issue #202263 (and the long-standing #200378). After
+# RegisterCoalescer eliminates the COPY of an undefined value, the partial
+# subregister redef that implicitly read it must become a read-undef def;
+# otherwise the coalescer asserts "Instruction is reading nonexistent value"
+# on targets that do not track subregister liveness.
+#
+# The original failures reach this pattern through REG_SEQUENCE lowering.
+# This focused test starts at the RegisterCoalescer boundary, after that
+# lowering has produced the undef COPY and partial redef sequence.
+
+--- |
+  define void @init(i64 %0, i1 %c, ptr %1) {
+    ret void
+  }
+...
+---
+name:            init
+tracksRegLiveness: true
+registers:
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arsenm wrote:

Don't need registers section 

https://github.com/llvm/llvm-project/pull/202599