[llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)

[Jack Styles via llvm-commits]

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@@ -711,6 +711,12 @@ AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
                                         MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32,
                                         MVT::nxv2i64};
     auto LT = getTypeLegalizationCost(RetTy);
+    // Type promotion for v2i8 and v2i16 types have a heavy cost when vectorising.
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Stylie777 wrote:

In reflection I have taken a different approach to tackle this. For the TC=5 loops, the Scalar cost was coming in high, and to adjust the vector cost to match would have been unrealistically high adjustment, and I was not comfortable taking that approach.

I have instead taken a targeted approach in `isProfitableOneScalarTail` to reject vectorisation for the operations and types in question. It has Debug Information explaining that Vectorisation with Type Promotion in this case is unprofitable.

https://github.com/llvm/llvm-project/pull/195823