[llvm] [gn] Port 1e1274b2ddfe (R600TargetParserDef.inc) (PR #212525)

[Nico Weber via llvm-commits]

https://github.com/nico created https://github.com/llvm/llvm-project/pull/212525

None

>From a81d6f34f2e82242d9a3fa65e9c556bb36557777 Mon Sep 17 00:00:00 2001
From: Nico Weber <thakis at chromium.org>
Date: Tue, 28 Jul 2026 11:53:08 -0400
Subject: [PATCH] [gn] Port 1e1274b2ddfe (R600TargetParserDef.inc)

---
 .../gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn  | 8 ++++++++
 .../utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn | 1 +
 2 files changed, 9 insertions(+)

diff --git a/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn b/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
index c3cdf46ccfb96..62dca6b422c1b 100644
--- a/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
@@ -28,11 +28,19 @@ tablegen("RISCVTargetParserDef") {
   tblgen_target = "//llvm/utils/TableGen:llvm-min-tblgen"
 }
 
+tablegen("R600TargetParserDef") {
+  visibility = [ ":gen" ]
+  args = [ "-gen-amdgpu-target-def" ]
+  td_file = "//llvm/lib/Target/AMDGPU/R600.td"
+  tblgen_target = "//llvm/utils/TableGen:llvm-min-tblgen"
+}
+
 group("gen") {
   deps = [
     ":AArch64TargetParserDef",
     ":ARMTargetParserDef",
     ":PPCGenTargetFeatures",
     ":RISCVTargetParserDef",
+    ":R600TargetParserDef",
   ]
 }
diff --git a/llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn b/llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
index b0a4da040b44c..2da886c5469c3 100644
--- a/llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
@@ -4,6 +4,7 @@ source_set("Basic") {
     "//llvm/lib/TableGen",
   ]
   sources = [
+    "AMDGPUTargetDefEmitter.cpp",
     "ARMTargetDefEmitter.cpp",
     "Attributes.cpp",
     "CodeGenIntrinsics.cpp",