[llvm] [AMDGPU] Track async events for vm_vsrc simplifications (PR #211333)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 28 08:47:57 PDT 2026


================
@@ -0,0 +1,122 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 --amdgpu-expert-scheduling-mode -run-pass=si-insert-waitcnts -o - %s | FileCheck %s
+
+---
+name:            test_vm_vsrc
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_vm_vsrc
+    ; CHECK: GLOBAL_PREFETCH_B8_SADDR undef $sgpr0_sgpr1, undef $vgpr0, 0, 8, implicit $exec
+    ; CHECK-NEXT: V_NOP_e32 implicit $exec
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 2, 2074, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 1, 1601, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: $vgpr5 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr2_vgpr3 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
+    ; CHECK-NEXT: GLOBAL_LOAD_ASYNC_TO_LDS_B128 killed $vgpr5, $vgpr2_vgpr3, 0, 0, implicit-def dead $asynccnt, implicit $exec, implicit $asynccnt
+    ; CHECK-NEXT: S_WAIT_DSCNT 0
+    ; CHECK-NEXT: S_WAITCNT_DEPCTR .VmVsrc_0
+    ; CHECK-NEXT: renamable $vgpr4_vgpr5_vgpr6_vgpr7 = DS_LOAD_TR16_B128 killed renamable $vgpr4, 0, 0, implicit $exec
+    ; CHECK-NEXT: S_ENDPGM 0
+    S_SETREG_IMM32_B32 1, 1601, implicit-def $mode, implicit $mode
+    $vgpr5 = IMPLICIT_DEF
+    $vgpr2_vgpr3 = IMPLICIT_DEF
+    $vgpr4 = IMPLICIT_DEF
+    GLOBAL_LOAD_ASYNC_TO_LDS_B128 killed $vgpr5, $vgpr2_vgpr3, 0, 0, implicit-def dead $asynccnt, implicit $exec, implicit $asynccnt
+    S_WAIT_DSCNT 0
+    renamable $vgpr4_vgpr5_vgpr6_vgpr7 = DS_LOAD_TR16_B128 killed renamable $vgpr4, 0, 0, implicit $exec
+    S_ENDPGM 0
+...
+
+---
+name:            test_vm_vsrc_implied
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_vm_vsrc_implied
+    ; CHECK: GLOBAL_PREFETCH_B8_SADDR undef $sgpr0_sgpr1, undef $vgpr0, 0, 8, implicit $exec
+    ; CHECK-NEXT: V_NOP_e32 implicit $exec
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 2, 2074, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 1, 1601, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: $vgpr5 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr2_vgpr3 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
+    ; CHECK-NEXT: renamable $vgpr6_vgpr7_vgpr8_vgpr9 = DS_LOAD_TR16_B128 killed renamable $vgpr4, 0, 0, implicit $exec
+    ; CHECK-NEXT: S_WAIT_DSCNT 0
+    ; CHECK-NEXT: $vgpr4 = V_ADD_U32_e32 $vgpr2, $vgpr3, implicit $exec
+    ; CHECK-NEXT: S_ENDPGM 0
+    S_SETREG_IMM32_B32 1, 1601, implicit-def $mode, implicit $mode
+    $vgpr5 = IMPLICIT_DEF
+    $vgpr2_vgpr3 = IMPLICIT_DEF
+    $vgpr4 = IMPLICIT_DEF
+    renamable $vgpr6_vgpr7_vgpr8_vgpr9 = DS_LOAD_TR16_B128 killed renamable $vgpr4, 0, 0, implicit $exec
+    S_WAIT_DSCNT 0
+    $vgpr4 = V_ADD_U32_e32 $vgpr2, $vgpr3, implicit $exec
+    S_ENDPGM 0
+...
+
+---
+name:            test_vm_vsrc_asyncmark
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_vm_vsrc_asyncmark
+    ; CHECK: GLOBAL_PREFETCH_B8_SADDR undef $sgpr0_sgpr1, undef $vgpr0, 0, 8, implicit $exec
+    ; CHECK-NEXT: V_NOP_e32 implicit $exec
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 2, 2074, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: S_SETREG_IMM32_B32 1, 1601, implicit-def $mode, implicit $mode
+    ; CHECK-NEXT: $vgpr5 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr2_vgpr3 = IMPLICIT_DEF
+    ; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
+    ; CHECK-NEXT: renamable $vgpr6_vgpr7_vgpr8_vgpr9 = DS_LOAD_TR16_B128 killed renamable $vgpr4, 0, 0, implicit $exec
+    ; CHECK-NEXT: ASYNCMARK
+    ; CHECK-NEXT: S_WAIT_DSCNT 0
+    ; CHECK-NEXT: S_WAITCNT_DEPCTR .VmVsrc_0
----------------
jayfoad wrote:

I don't understand why the presence of the ASYNCMARK means we would need to wait on VM_VSRC here?

https://github.com/llvm/llvm-project/pull/211333


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