[llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)

[Alexey Bataev via llvm-commits]

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@@ -126,6 +126,122 @@ class BinOpSameOpcodeHelper {
   }
 };
 
+/// Main data required for vectorization of instructions.
+class InstructionsState {
+  /// MainOp and AltOp are primarily determined by getSameOpcode. Currently,
+  /// only BinaryOperator, CastInst, and CmpInst support alternate instructions
+  /// (i.e., AltOp is not equal to MainOp; this can be checked using
+  /// isAltShuffle).
+  /// A rare exception is TrySplitNode, where the InstructionsState is derived
+  /// from getMainAltOpsNoStateVL.
+  /// For those InstructionsState that use alternate instructions, the resulting
+  /// vectorized output ultimately comes from a shufflevector. For example,
+  /// given a vector list (VL):
+  /// VL[0] = add i32 a, e
+  /// VL[1] = sub i32 b, f
+  /// VL[2] = add i32 c, g
+  /// VL[3] = sub i32 d, h
+  /// The vectorized result would be:
+  /// intermediated_0 = add <4 x i32> <a, b, c, d>, <e, f, g, h>
+  /// intermediated_1 = sub <4 x i32> <a, b, c, d>, <e, f, g, h>
+  /// result = shufflevector <4 x i32> intermediated_0,
+  ///                        <4 x i32> intermediated_1,
+  ///                        <4 x i32> <i32 0, i32 5, i32 2, i32 7>
+  /// Since shufflevector is used in the final result, when calculating the cost
+  /// (getEntryCost), we must account for the usage of shufflevector in
+  /// GetVectorCost.
+  Instruction *MainOp = nullptr;
+  Instruction *AltOp = nullptr;
+  /// Wether the instruction state represents copyable instructions.
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alexey-bataev wrote:

`/// Whether the instruction state represents copyable instructions.`

https://github.com/llvm/llvm-project/pull/211461